1*f58fcf6aSkiyohara /* $NetBSD: aupscvar.h,v 1.4 2012/01/03 07:36:02 kiyohara Exp $ */ 2ac76a40eSshige 3ac76a40eSshige /*- 4ac76a40eSshige * Copyright (c) 2006 Shigeyuki Fukushima. 5ac76a40eSshige * All rights reserved. 6ac76a40eSshige * 7ac76a40eSshige * Written by Shigeyuki Fukushima. 8ac76a40eSshige * 9ac76a40eSshige * Redistribution and use in source and binary forms, with or without 10ac76a40eSshige * modification, are permitted provided that the following conditions 11ac76a40eSshige * are met: 12ac76a40eSshige * 1. Redistributions of source code must retain the above copyright 13ac76a40eSshige * notice, this list of conditions and the following disclaimer. 14ac76a40eSshige * 2. Redistributions in binary form must reproduce the above 15ac76a40eSshige * copyright notice, this list of conditions and the following 16ac76a40eSshige * disclaimer in the documentation and/or other materials provided 17ac76a40eSshige * with the distribution. 18ac76a40eSshige * 3. The name of the author may not be used to endorse or promote 19ac76a40eSshige * products derived from this software without specific prior 20ac76a40eSshige * written permission. 21ac76a40eSshige * 22ac76a40eSshige * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS 23ac76a40eSshige * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 24ac76a40eSshige * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25ac76a40eSshige * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY 26ac76a40eSshige * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27ac76a40eSshige * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 28ac76a40eSshige * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29ac76a40eSshige * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 30ac76a40eSshige * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 31ac76a40eSshige * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 32ac76a40eSshige * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33ac76a40eSshige */ 34ac76a40eSshige 35ac76a40eSshige #ifndef _MIPS_ALCHEMY_DEV_AUPSCVAR_H_ 36ac76a40eSshige #define _MIPS_ALCHEMY_DEV_AUPSCVAR_H_ 37ac76a40eSshige 3801a719a4Sshige struct aupsc_controller { 3901a719a4Sshige bus_space_tag_t psc_bust; /* Bus space tag */ 4001a719a4Sshige bus_space_handle_t psc_bush; /* Bus space handle */ 4101a719a4Sshige int * psc_sel; /* current protocol selection */ 4201a719a4Sshige void (*psc_enable)(void *, int); 4301a719a4Sshige void (*psc_disable)(void *); 4401a719a4Sshige void (*psc_suspend)(void *); 4501a719a4Sshige }; 4601a719a4Sshige 47ac76a40eSshige struct aupsc_attach_args { 48ac76a40eSshige const char * aupsc_name; 4901a719a4Sshige struct aupsc_controller aupsc_ctrl; 503bd9bd2fSgdamore bus_addr_t aupsc_addr; /* Bus address */ 513bd9bd2fSgdamore int aupsc_irq; 5201a719a4Sshige }; 5301a719a4Sshige 5401a719a4Sshige struct aupsc_protocol_device { 55*f58fcf6aSkiyohara device_t sc_dev; 5601a719a4Sshige struct aupsc_controller sc_ctrl; 57ac76a40eSshige }; 58ac76a40eSshige 59ac76a40eSshige #endif /* _MIPS_ALCHEMY_DEV_AUPSCVAR_H_ */ 60