xref: /netbsd-src/sys/arch/mips/alchemy/dev/aupcmciareg.h (revision 79321668cc9b1889a5a626de4d6867dc2de38a51)
1*79321668Sandvar /* $NetBSD: aupcmciareg.h,v 1.2 2024/12/15 21:39:28 andvar Exp $ */
26dd67e32Sgdamore 
36dd67e32Sgdamore /*-
46dd67e32Sgdamore  * Copyright (c) 2006 Itronix Inc.
56dd67e32Sgdamore  * All rights reserved.
66dd67e32Sgdamore  *
76dd67e32Sgdamore  * Written by Garrett D'Amore for Itronix Inc.
86dd67e32Sgdamore  *
96dd67e32Sgdamore  * Redistribution and use in source and binary forms, with or without
106dd67e32Sgdamore  * modification, are permitted provided that the following conditions
116dd67e32Sgdamore  * are met:
126dd67e32Sgdamore  * 1. Redistributions of source code must retain the above copyright
136dd67e32Sgdamore  *    notice, this list of conditions and the following disclaimer.
146dd67e32Sgdamore  * 2. Redistributions in binary form must reproduce the above copyright
156dd67e32Sgdamore  *    notice, this list of conditions and the following disclaimer in the
166dd67e32Sgdamore  *    documentation and/or other materials provided with the distribution.
176dd67e32Sgdamore  * 3. The name of Itronix Inc. may not be used to endorse
186dd67e32Sgdamore  *    or promote products derived from this software without specific
196dd67e32Sgdamore  *    prior written permission.
206dd67e32Sgdamore  *
216dd67e32Sgdamore  * THIS SOFTWARE IS PROVIDED BY ITRONIX INC. ``AS IS'' AND
226dd67e32Sgdamore  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
236dd67e32Sgdamore  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
246dd67e32Sgdamore  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL ITRONIX INC. BE LIABLE FOR ANY
256dd67e32Sgdamore  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
266dd67e32Sgdamore  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
276dd67e32Sgdamore  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
286dd67e32Sgdamore  * ON ANY THEORY OF LIABILITY, WHETHER IN
296dd67e32Sgdamore  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
306dd67e32Sgdamore  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
316dd67e32Sgdamore  * POSSIBILITY OF SUCH DAMAGE.
326dd67e32Sgdamore  */
336dd67e32Sgdamore 
346dd67e32Sgdamore #ifndef _MIPS_ALCHEMY_DEV_AUPCMCIAREG_H
356dd67e32Sgdamore #define	_MIPS_ALCHEMY_DEV_AUPCMCIAREG_H
366dd67e32Sgdamore 
376dd67e32Sgdamore /*
386dd67e32Sgdamore  * PCMCIA address ranges.  The Alchemy provides 64 MB mappings for
39*79321668Sandvar  * each of the three ranges.  Of particular, please note that
406dd67e32Sgdamore  * AUCMCIA_IO_START begins at offset zero.
416dd67e32Sgdamore  */
426dd67e32Sgdamore #define	AUPCMCIA_IO_OFFSET	0x00000000
436dd67e32Sgdamore #define	AUPCMCIA_ATTR_OFFSET	0x40000000
446dd67e32Sgdamore #define	AUPCMCIA_MEM_OFFSET	0x80000000
456dd67e32Sgdamore 
466dd67e32Sgdamore #endif	/* _MIPS_ALCHEMY_DEV_AUPCMCIAREG_H */
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