1*95e1ffb1Schristos /* $NetBSD: viareg.h,v 1.14 2005/12/11 12:18:03 christos Exp $ */ 28326aaddSbriggs 38326aaddSbriggs /*- 48326aaddSbriggs * Copyright (C) 1993 Allen K. Briggs, Chris P. Caputo, 58326aaddSbriggs * Michael L. Finch, Bradley A. Grantham, and 68326aaddSbriggs * Lawrence A. Kesteloot 78326aaddSbriggs * All rights reserved. 88326aaddSbriggs * 98326aaddSbriggs * Redistribution and use in source and binary forms, with or without 108326aaddSbriggs * modification, are permitted provided that the following conditions 118326aaddSbriggs * are met: 128326aaddSbriggs * 1. Redistributions of source code must retain the above copyright 138326aaddSbriggs * notice, this list of conditions and the following disclaimer. 148326aaddSbriggs * 2. Redistributions in binary form must reproduce the above copyright 158326aaddSbriggs * notice, this list of conditions and the following disclaimer in the 168326aaddSbriggs * documentation and/or other materials provided with the distribution. 178326aaddSbriggs * 3. All advertising materials mentioning features or use of this software 188326aaddSbriggs * must display the following acknowledgement: 198326aaddSbriggs * This product includes software developed by the Alice Group. 208326aaddSbriggs * 4. The names of the Alice Group or any of its members may not be used 218326aaddSbriggs * to endorse or promote products derived from this software without 228326aaddSbriggs * specific prior written permission. 238326aaddSbriggs * 248326aaddSbriggs * THIS SOFTWARE IS PROVIDED BY THE ALICE GROUP ``AS IS'' AND ANY EXPRESS OR 258326aaddSbriggs * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 268326aaddSbriggs * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 278326aaddSbriggs * IN NO EVENT SHALL THE ALICE GROUP BE LIABLE FOR ANY DIRECT, INDIRECT, 288326aaddSbriggs * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 298326aaddSbriggs * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 308326aaddSbriggs * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 318326aaddSbriggs * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 328326aaddSbriggs * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 338326aaddSbriggs * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 348326aaddSbriggs * 358326aaddSbriggs */ 368326aaddSbriggs /* 378326aaddSbriggs 388326aaddSbriggs Prototype VIA control definitions 398326aaddSbriggs 408326aaddSbriggs 06/04/92,22:33:57 BG Let's see what I can do. 418326aaddSbriggs 428326aaddSbriggs */ 438326aaddSbriggs 448326aaddSbriggs 458326aaddSbriggs /* VIA1 data register A */ 468326aaddSbriggs #define DA1I_vSCCWrReq 0x80 478326aaddSbriggs #define DA1O_vPage2 0x40 488326aaddSbriggs #define DA1I_CPU_ID1 0x40 498326aaddSbriggs #define DA1O_vHeadSel 0x20 508326aaddSbriggs #define DA1O_vOverlay 0x10 518326aaddSbriggs #define DA1O_vSync 0x08 528326aaddSbriggs #define DA1O_RESERVED2 0x04 538326aaddSbriggs #define DA1O_RESERVED1 0x02 548326aaddSbriggs #define DA1O_RESERVED0 0x01 558326aaddSbriggs 568326aaddSbriggs /* VIA1 data register B */ 578326aaddSbriggs #define DB1I_Par_Err 0x80 588326aaddSbriggs #define DB1O_vSndEnb 0x80 598326aaddSbriggs #define DB1O_Par_Enb 0x40 6071a4446bSbriggs #define DB1O_AuxIntEnb 0x40 /* 0 = enabled, 1 = disabled */ 618326aaddSbriggs #define DB1O_vFDesk2 0x20 628326aaddSbriggs #define DB1O_vFDesk1 0x10 638326aaddSbriggs #define DB1I_vFDBInt 0x08 648326aaddSbriggs #define DB1O_rTCEnb 0x04 658326aaddSbriggs #define DB1O_rTCCLK 0x02 668326aaddSbriggs #define DB1O_rTCData 0x01 678326aaddSbriggs #define DB1I_rTCData 0x01 688326aaddSbriggs 698326aaddSbriggs /* VIA2 data register A */ 708326aaddSbriggs #define DA2O_v2Ram1 0x80 718326aaddSbriggs #define DA2O_v2Ram0 0x40 72c1c09c75Sscottr #define DA2I_v2IRQ0 0x40 738326aaddSbriggs #define DA2I_v2IRQE 0x20 748326aaddSbriggs #define DA2I_v2IRQD 0x10 758326aaddSbriggs #define DA2I_v2IRQC 0x08 768326aaddSbriggs #define DA2I_v2IRQB 0x04 778326aaddSbriggs #define DA2I_v2IRQA 0x02 788326aaddSbriggs #define DA2I_v2IRQ9 0x01 798326aaddSbriggs 808326aaddSbriggs /* VIA2 data register B */ 818326aaddSbriggs #define DB2O_v2VBL 0x80 828326aaddSbriggs #define DB2O_Par_Test 0x80 838326aaddSbriggs #define DB2I_v2SNDEXT 0x40 848326aaddSbriggs #define DB2I_v2TM0A 0x20 858326aaddSbriggs #define DB2I_v2TM1A 0x10 868326aaddSbriggs #define DB2I_vFC3 0x08 878326aaddSbriggs #define DB2O_vFC3 0x08 888326aaddSbriggs #define DB2O_v2PowerOff 0x04 898326aaddSbriggs #define DB2O_v2BusLk 0x02 908326aaddSbriggs #define DB2O_vCDis 0x01 918326aaddSbriggs #define DB2O_CEnable 0x01 928326aaddSbriggs 938f37a298Sscottr /* 948f37a298Sscottr * VIA1 interrupts 958f37a298Sscottr */ 968f37a298Sscottr #define VIA1_T1 6 978f37a298Sscottr #define VIA1_T2 5 988f37a298Sscottr #define VIA1_ADBCLK 4 998f37a298Sscottr #define VIA1_ADBDATA 3 1008f37a298Sscottr #define VIA1_ADBRDY 2 1018f37a298Sscottr #define VIA1_VBLNK 1 1028f37a298Sscottr #define VIA1_ONESEC 0 1038f37a298Sscottr 1048326aaddSbriggs /* VIA1 interrupt bits */ 1058326aaddSbriggs #define V1IF_IRQ 0x80 1068f37a298Sscottr #define V1IF_T1 (1 << VIA1_T1) 1078f37a298Sscottr #define V1IF_T2 (1 << VIA1_T2) 1088f37a298Sscottr #define V1IF_ADBCLK (1 << VIA1_ADBCLK) 1098f37a298Sscottr #define V1IF_ADBDATA (1 << VIA1_ADBDATA) 1108f37a298Sscottr #define V1IF_ADBRDY (1 << VIA1_ADBRDY) 1118f37a298Sscottr #define V1IF_VBLNK (1 << VIA1_VBLNK) 1128f37a298Sscottr #define V1IF_ONESEC (1 << VIA1_ONESEC) 1138f37a298Sscottr 1148f37a298Sscottr /* 1158f37a298Sscottr * VIA2 interrupts 1168f37a298Sscottr */ 1178f37a298Sscottr #define VIA2_T1 6 1188f37a298Sscottr #define VIA2_T2 5 1198f37a298Sscottr #define VIA2_ASC 4 1208f37a298Sscottr #define VIA2_SCSIIRQ 3 1218f37a298Sscottr #define VIA2_EXPIRQ 2 1228f37a298Sscottr #define VIA2_SLOTINT 1 1238f37a298Sscottr #define VIA2_SCSIDRQ 0 1248326aaddSbriggs 1258326aaddSbriggs /* VIA2 interrupt bits */ 1268326aaddSbriggs #define V2IF_IRQ 0x80 1278f37a298Sscottr #define V2IF_T1 (1 << VIA2_T1) 1288f37a298Sscottr #define V2IF_T2 (1 << VIA2_T2) 1298f37a298Sscottr #define V2IF_ASC (1 << VIA2_ASC) 1308f37a298Sscottr #define V2IF_SCSIIRQ (1 << VIA2_SCSIIRQ) 1318f37a298Sscottr #define V2IF_EXPIRQ (1 << VIA2_EXPIRQ) 1328f37a298Sscottr #define V2IF_SLOTINT (1 << VIA2_SLOTINT) 1338f37a298Sscottr #define V2IF_SCSIDRQ (1 << VIA2_SCSIDRQ) 1348326aaddSbriggs 1358326aaddSbriggs #define VIA1_INTS (V1IF_T1 | V1IF_ADBRDY) 1368326aaddSbriggs #define VIA2_INTS (V2IF_T1 | V2IF_ASC | V2IF_SCSIIRQ | V2IF_SLOTINT | \ 1378326aaddSbriggs V2IF_SCSIDRQ) 1388326aaddSbriggs 1398326aaddSbriggs #define RBV_INTS (V2IF_T1 | V2IF_ASC | V2IF_SCSIIRQ | V2IF_SLOTINT | \ 1408326aaddSbriggs V2IF_SCSIDRQ | V1IF_ADBRDY) 1418326aaddSbriggs 1428326aaddSbriggs #define ACR_T1LATCH 0x40 1438326aaddSbriggs 1448326aaddSbriggs extern volatile unsigned char *Via1Base; 1458326aaddSbriggs extern volatile unsigned char *Via2Base; /* init in VIA_Initialize */ 1468326aaddSbriggs #define VIA1_addr Via1Base /* at PA 0x50f00000 */ 14771a4446bSbriggs 14871a4446bSbriggs #define VIA2OFF 1 /* VIA2 addr = VIA1_addr + 0x2000 */ 14971a4446bSbriggs #define RBVOFF 0x13 /* RBV addr = VIA1_addr + 0x26000 */ 15071a4446bSbriggs #define OSSOFF 0xd /* OSS addr = VIA1_addr + 0x1A000 */ 1518326aaddSbriggs 1528326aaddSbriggs #define VIA1 0 1538326aaddSbriggs extern int VIA2; 1548326aaddSbriggs 1558326aaddSbriggs /* VIA interface registers */ 1568326aaddSbriggs #define vBufA 0x1e00 /* register A */ 1578326aaddSbriggs #define vBufB 0 /* register B */ 1588326aaddSbriggs #define vDirA 0x0600 /* data direction register */ 1598326aaddSbriggs #define vDirB 0x0400 /* data direction register */ 1608326aaddSbriggs #define vT1C 0x0800 1618326aaddSbriggs #define vT1CH 0x0a00 1628326aaddSbriggs #define vT1L 0x0c00 1638326aaddSbriggs #define vT1LH 0x0e00 1648326aaddSbriggs #define vT2C 0x1000 1658326aaddSbriggs #define vT2CH 0x1200 1668326aaddSbriggs #define vSR 0x1400 /* shift register */ 1678326aaddSbriggs #define vACR 0x1600 /* aux control register */ 1688326aaddSbriggs #define vPCR 0x1800 /* peripheral control register */ 1698326aaddSbriggs #define vIFR 0x1a00 /* interrupt flag register */ 1708326aaddSbriggs #define vIER 0x1c00 /* interrupt enable register */ 1718326aaddSbriggs 1728326aaddSbriggs /* RBV interface registers */ 1738326aaddSbriggs #define rBufB 0 /* register B */ 1748326aaddSbriggs #define rBufA 2 /* register A */ 1758326aaddSbriggs #define rIFR 0x3 /* interrupt flag register (writes?) */ 1768326aaddSbriggs #define rIER 0x13 /* interrupt enable register */ 1778326aaddSbriggs #define rMonitor 0x10 /* Monitor type */ 1788326aaddSbriggs #define rSlotInt 0x12 /* Slot interrupt */ 1798326aaddSbriggs 1808326aaddSbriggs /* RBV monitor type flags and masks */ 181e91873beSscottr #define RBVDepthMask 0x07 /* Depth in bits */ 1828326aaddSbriggs #define RBVMonitorMask 0x38 /* Type numbers */ 183e91873beSscottr #define RBVOff 0x40 /* Monitor turned off */ 184faabac8cSscottr #define RBVMonIDBWP 0x08 /* 15 inch BW portrait */ 185faabac8cSscottr #define RBVMonIDRGB12 0x10 /* 12 inch color */ 1868326aaddSbriggs #define RBVMonIDRGB15 0x28 /* 15 inch RGB */ 187faabac8cSscottr #define RBVMonIDStd 0x30 /* 12 inch BW or 13 inch color */ 188faabac8cSscottr #define RBVMonIDNone 0x38 /* No monitor connected */ 1898326aaddSbriggs 19071a4446bSbriggs /* OSS registers */ 19171a4446bSbriggs #define OSS_IFR 0x202 19271a4446bSbriggs #define OSS_PENDING_IRQ (*(volatile u_short *)(Via2Base + (OSS_IFR))) 19371a4446bSbriggs 19471a4446bSbriggs #define OSS_oRCR 0x204 19571a4446bSbriggs #define OSS_POWEROFF 0x80 19671a4446bSbriggs 1978326aaddSbriggs #define via_reg(v, r) (*(Via1Base+(v)*0x2000+(r))) 1988326aaddSbriggs #define via2_reg(r) (*(Via2Base+(r))) 1998326aaddSbriggs 2008326aaddSbriggs #define vDirA_ADBState 0x30 2018326aaddSbriggs 2027acd68b1Schs void via_init(void); 2037acd68b1Schs void via_powerdown(void); 2047acd68b1Schs void via_set_modem(int); 2057acd68b1Schs int add_nubus_intr(int, void (*)(void *), void *); 2067acd68b1Schs void enable_nubus_intr(void); 2077acd68b1Schs void via1_register_irq(int, void (*)(void *), void *); 2087acd68b1Schs void via2_register_irq(int, void (*)(void *), void *); 2098326aaddSbriggs 2107acd68b1Schs extern void (*via1itab[7])(void *); 2117acd68b1Schs extern void (*via2itab[7])(void *); 212