1*8b8575d9Stsutsui /* $NetBSD: xpbusvar.h,v 1.1 2022/06/10 21:42:23 tsutsui Exp $ */ 2*8b8575d9Stsutsui 3*8b8575d9Stsutsui /*- 4*8b8575d9Stsutsui * Copyright (c) 2016 Izumi Tsutsui. All rights reserved. 5*8b8575d9Stsutsui * 6*8b8575d9Stsutsui * Redistribution and use in source and binary forms, with or without 7*8b8575d9Stsutsui * modification, are permitted provided that the following conditions 8*8b8575d9Stsutsui * are met: 9*8b8575d9Stsutsui * 1. Redistributions of source code must retain the above copyright 10*8b8575d9Stsutsui * notice, this list of conditions and the following disclaimer. 11*8b8575d9Stsutsui * 2. Redistributions in binary form must reproduce the above copyright 12*8b8575d9Stsutsui * notice, this list of conditions and the following disclaimer in the 13*8b8575d9Stsutsui * documentation and/or other materials provided with the distribution. 14*8b8575d9Stsutsui * 15*8b8575d9Stsutsui * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16*8b8575d9Stsutsui * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17*8b8575d9Stsutsui * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18*8b8575d9Stsutsui * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19*8b8575d9Stsutsui * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20*8b8575d9Stsutsui * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21*8b8575d9Stsutsui * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22*8b8575d9Stsutsui * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23*8b8575d9Stsutsui * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24*8b8575d9Stsutsui * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25*8b8575d9Stsutsui */ 26*8b8575d9Stsutsui 27*8b8575d9Stsutsui #ifndef _XPBUSVAR_H_ 28*8b8575d9Stsutsui #define _XPBUSVAR_H_ 29*8b8575d9Stsutsui 30*8b8575d9Stsutsui #include <machine/board.h> 31*8b8575d9Stsutsui 32*8b8575d9Stsutsui #define TRI_PORT_RAM_XP_OFFSET 0x00000 33*8b8575d9Stsutsui 34*8b8575d9Stsutsui #define XP_SHM_BASE (TRI_PORT_RAM + TRI_PORT_RAM_XP_OFFSET) 35*8b8575d9Stsutsui #define XP_SHM_SIZE 0x00010000 /* 64KB for XP; rest 64KB for lance */ 36*8b8575d9Stsutsui #define XP_TAS_ADDR OBIO_TAS 37*8b8575d9Stsutsui 38*8b8575d9Stsutsui #define XP_CPU_FREQ 6144000 39*8b8575d9Stsutsui 40*8b8575d9Stsutsui struct xpbus_attach_args { 41*8b8575d9Stsutsui const char *xa_name; 42*8b8575d9Stsutsui }; 43*8b8575d9Stsutsui 44*8b8575d9Stsutsui /* xpbus sharing control */ 45*8b8575d9Stsutsui #define XP_ACQ_EXCL (1 << 31) 46*8b8575d9Stsutsui u_int xp_acquire(int, u_int); 47*8b8575d9Stsutsui void xp_release(int); 48*8b8575d9Stsutsui void xp_set_shm_dirty(void); 49*8b8575d9Stsutsui void xp_ensure_firmware(void); 50*8b8575d9Stsutsui 51*8b8575d9Stsutsui /* PIO control */ 52*8b8575d9Stsutsui uint8_t put_pio0c(uint8_t, uint8_t); 53*8b8575d9Stsutsui 54*8b8575d9Stsutsui /* XP reset control */ 55*8b8575d9Stsutsui void xp_cpu_reset_hold(void); 56*8b8575d9Stsutsui void xp_cpu_reset_release(void); 57*8b8575d9Stsutsui void xp_cpu_reset(void); 58*8b8575d9Stsutsui 59*8b8575d9Stsutsui /* XP interrupt control */ 60*8b8575d9Stsutsui void xp_intr1_enable(void); 61*8b8575d9Stsutsui void xp_intr1_disable(void); 62*8b8575d9Stsutsui void xp_intr1_acknowledge(void); 63*8b8575d9Stsutsui 64*8b8575d9Stsutsui void xp_intr5_enable(void); 65*8b8575d9Stsutsui void xp_intr5_disable(void); 66*8b8575d9Stsutsui void xp_intr5_acknowledge(void); 67*8b8575d9Stsutsui 68*8b8575d9Stsutsui /* XP SHM control */ 69*8b8575d9Stsutsui void *xp_shmptr(int); 70*8b8575d9Stsutsui int xp_readmem8(int); 71*8b8575d9Stsutsui int xp_readmem16le(int); 72*8b8575d9Stsutsui void xp_writemem8(int, int); 73*8b8575d9Stsutsui void xp_writemem16le(int, int); 74*8b8575d9Stsutsui 75*8b8575d9Stsutsui #endif /* !_XPBUSVAR_H_ */ 76