xref: /netbsd-src/sys/arch/luna68k/dev/timekeeper.c (revision b59f66e17c500a0d8ac8904c4c2fe7f387334983)
1*b59f66e1Schristos /* $NetBSD: timekeeper.c,v 1.15 2014/11/20 16:34:25 christos Exp $ */
295d00ea7Snisimura 
395d00ea7Snisimura /*-
495d00ea7Snisimura  * Copyright (c) 2000 The NetBSD Foundation, Inc.
595d00ea7Snisimura  * All rights reserved.
695d00ea7Snisimura  *
795d00ea7Snisimura  * This code is derived from software contributed to The NetBSD Foundation
895d00ea7Snisimura  * by Tohru Nishimura.
995d00ea7Snisimura  *
1095d00ea7Snisimura  * Redistribution and use in source and binary forms, with or without
1195d00ea7Snisimura  * modification, are permitted provided that the following conditions
1295d00ea7Snisimura  * are met:
1395d00ea7Snisimura  * 1. Redistributions of source code must retain the above copyright
1495d00ea7Snisimura  *    notice, this list of conditions and the following disclaimer.
1595d00ea7Snisimura  * 2. Redistributions in binary form must reproduce the above copyright
1695d00ea7Snisimura  *    notice, this list of conditions and the following disclaimer in the
1795d00ea7Snisimura  *    documentation and/or other materials provided with the distribution.
1895d00ea7Snisimura  *
1995d00ea7Snisimura  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
2095d00ea7Snisimura  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
2195d00ea7Snisimura  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
2295d00ea7Snisimura  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
2395d00ea7Snisimura  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
2495d00ea7Snisimura  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
2595d00ea7Snisimura  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
2695d00ea7Snisimura  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
2795d00ea7Snisimura  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
2895d00ea7Snisimura  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
2995d00ea7Snisimura  * POSSIBILITY OF SUCH DAMAGE.
3095d00ea7Snisimura  */
3195d00ea7Snisimura 
3295d00ea7Snisimura #include <sys/cdefs.h>			/* RCS ID & Copyright macro defns */
3395d00ea7Snisimura 
34*b59f66e1Schristos __KERNEL_RCSID(0, "$NetBSD: timekeeper.c,v 1.15 2014/11/20 16:34:25 christos Exp $");
3595d00ea7Snisimura 
3695d00ea7Snisimura #include <sys/param.h>
3795d00ea7Snisimura #include <sys/systm.h>
3895d00ea7Snisimura #include <sys/device.h>
3995d00ea7Snisimura #include <sys/kernel.h>
4095d00ea7Snisimura 
4195d00ea7Snisimura #include <machine/cpu.h>
4295d00ea7Snisimura 
4395d00ea7Snisimura #include <dev/clock_subr.h>
4495d00ea7Snisimura #include <luna68k/dev/timekeeper.h>
4595d00ea7Snisimura #include <machine/autoconf.h>
4695d00ea7Snisimura 
47406ab3f0Stsutsui #include "ioconf.h"
48406ab3f0Stsutsui 
4995d00ea7Snisimura #define	YEAR0	1970	/* year offset */
5095d00ea7Snisimura 
5195d00ea7Snisimura struct timekeeper_softc {
52406ab3f0Stsutsui 	device_t sc_dev;
5395d00ea7Snisimura 	void *sc_clock, *sc_nvram;
5495d00ea7Snisimura 	int sc_nvramsize;
55e571eaa8Stsutsui 	uint8_t sc_image[2040];
568e61a34dSgdamore 	struct todr_chip_handle sc_todr;
5795d00ea7Snisimura };
5895d00ea7Snisimura 
59406ab3f0Stsutsui static int  clock_match(device_t, cfdata_t, void *);
60406ab3f0Stsutsui static void clock_attach(device_t, device_t, void *);
61b0074c5dStsutsui static void dsclock_init(struct timekeeper_softc *);
6295d00ea7Snisimura 
63406ab3f0Stsutsui CFATTACH_DECL_NEW(clock, sizeof (struct timekeeper_softc),
64c5e91d44Sthorpej     clock_match, clock_attach, NULL, NULL);
6595d00ea7Snisimura 
6602cdf4d2Sdsl static int mkclock_get(todr_chip_handle_t, struct clock_ymdhms *);
6702cdf4d2Sdsl static int mkclock_set(todr_chip_handle_t, struct clock_ymdhms *);
6802cdf4d2Sdsl static int dsclock_get(todr_chip_handle_t, struct clock_ymdhms *);
6902cdf4d2Sdsl static int dsclock_set(todr_chip_handle_t, struct clock_ymdhms *);
7095d00ea7Snisimura 
7195d00ea7Snisimura static int
clock_match(device_t parent,cfdata_t cf,void * aux)72406ab3f0Stsutsui clock_match(device_t parent, cfdata_t cf, void *aux)
7395d00ea7Snisimura {
7495d00ea7Snisimura 	struct mainbus_attach_args *ma = aux;
7595d00ea7Snisimura 
7695d00ea7Snisimura 	if (strcmp(ma->ma_name, clock_cd.cd_name))
7795d00ea7Snisimura 		return 0;
7895d00ea7Snisimura 	return 1;
7995d00ea7Snisimura }
8095d00ea7Snisimura 
8195d00ea7Snisimura static void
clock_attach(device_t parent,device_t self,void * aux)82406ab3f0Stsutsui clock_attach(device_t parent, device_t self, void *aux)
8395d00ea7Snisimura {
84406ab3f0Stsutsui 	struct timekeeper_softc *sc = device_private(self);
8595d00ea7Snisimura 	struct mainbus_attach_args *ma = aux;
8695d00ea7Snisimura 
87406ab3f0Stsutsui 	sc->sc_dev = self;
88406ab3f0Stsutsui 
8995d00ea7Snisimura 	switch (machtype) {
9095d00ea7Snisimura 	default:
9195d00ea7Snisimura 	case LUNA_I:	/* Mostek MK48T02 */
9295d00ea7Snisimura 		sc->sc_clock = (void *)(ma->ma_addr + 2040);
9395d00ea7Snisimura 		sc->sc_nvram = (void *)ma->ma_addr;
9495d00ea7Snisimura 		sc->sc_nvramsize = 2040;
958e61a34dSgdamore 		sc->sc_todr.todr_gettime_ymdhms = mkclock_get;
968e61a34dSgdamore 		sc->sc_todr.todr_settime_ymdhms = mkclock_set;
978e61a34dSgdamore 		sc->sc_todr.cookie = sc;
98406ab3f0Stsutsui 		aprint_normal(": mk48t02\n");
9995d00ea7Snisimura 		break;
10095d00ea7Snisimura 	case LUNA_II: /* Dallas DS1287A */
10195d00ea7Snisimura 		sc->sc_clock = (void *)ma->ma_addr;
102b8ac92c0Stsutsui 		sc->sc_nvram = (void *)(ma->ma_addr + MC_NREGS);
10395d00ea7Snisimura 		sc->sc_nvramsize = 50;
1048e61a34dSgdamore 		sc->sc_todr.todr_gettime_ymdhms = dsclock_get;
1058e61a34dSgdamore 		sc->sc_todr.todr_settime_ymdhms = dsclock_set;
1068e61a34dSgdamore 		sc->sc_todr.cookie = sc;
107b0074c5dStsutsui 		dsclock_init(sc);
108406ab3f0Stsutsui 		aprint_normal(": ds1287a\n");
10995d00ea7Snisimura 		break;
11095d00ea7Snisimura 	}
1118e61a34dSgdamore 	todr_attach(&sc->sc_todr);
11295d00ea7Snisimura 	memcpy(sc->sc_image, sc->sc_nvram, sc->sc_nvramsize);
11395d00ea7Snisimura }
11495d00ea7Snisimura 
11595d00ea7Snisimura /*
11695d00ea7Snisimura  * Get the time of day, based on the clock's value and/or the base value.
11795d00ea7Snisimura  */
1188e61a34dSgdamore static int
mkclock_get(todr_chip_handle_t tch,struct clock_ymdhms * dt)1198e61a34dSgdamore mkclock_get(todr_chip_handle_t tch, struct clock_ymdhms *dt)
12095d00ea7Snisimura {
1218e61a34dSgdamore 	struct timekeeper_softc *sc = (void *)tch->cookie;
122e571eaa8Stsutsui 	volatile uint8_t *chiptime = (void *)sc->sc_clock;
12395d00ea7Snisimura 	int s;
12495d00ea7Snisimura 
12595d00ea7Snisimura 	s = splclock();
12695d00ea7Snisimura 	chiptime[MK_CSR] |= MK_CSR_READ;	/* enable read (stop time) */
127*b59f66e1Schristos 	dt->dt_sec = bcdtobin(chiptime[MK_SEC]);
128*b59f66e1Schristos 	dt->dt_min = bcdtobin(chiptime[MK_MIN]);
129*b59f66e1Schristos 	dt->dt_hour = bcdtobin(chiptime[MK_HOUR]);
130*b59f66e1Schristos 	dt->dt_wday = bcdtobin(chiptime[MK_DOW]);
131*b59f66e1Schristos 	dt->dt_day = bcdtobin(chiptime[MK_DOM]);
132*b59f66e1Schristos 	dt->dt_mon = bcdtobin(chiptime[MK_MONTH]);
133*b59f66e1Schristos 	dt->dt_year = bcdtobin(chiptime[MK_YEAR]) + YEAR0;
13495d00ea7Snisimura 	chiptime[MK_CSR] &= ~MK_CSR_READ;	/* time wears on */
13595d00ea7Snisimura 	splx(s);
1368e61a34dSgdamore 	return 0;
13795d00ea7Snisimura }
13895d00ea7Snisimura 
13995d00ea7Snisimura /*
14095d00ea7Snisimura  * Reset the TODR based on the time value.
14195d00ea7Snisimura  */
1428e61a34dSgdamore static int
mkclock_set(todr_chip_handle_t tch,struct clock_ymdhms * dt)1438e61a34dSgdamore mkclock_set(todr_chip_handle_t tch, struct clock_ymdhms *dt)
14495d00ea7Snisimura {
1458e61a34dSgdamore 	struct timekeeper_softc *sc = (void *)tch->cookie;
146e571eaa8Stsutsui 	volatile uint8_t *chiptime = (void *)sc->sc_clock;
147e571eaa8Stsutsui 	volatile uint8_t *stamp = (uint8_t *)sc->sc_nvram + 0x10;
14895d00ea7Snisimura 	int s;
14995d00ea7Snisimura 
15095d00ea7Snisimura 	s = splclock();
15195d00ea7Snisimura 	chiptime[MK_CSR] |= MK_CSR_WRITE;	/* enable write */
152*b59f66e1Schristos 	chiptime[MK_SEC] = bintobcd(dt->dt_sec);
153*b59f66e1Schristos 	chiptime[MK_MIN] = bintobcd(dt->dt_min);
154*b59f66e1Schristos 	chiptime[MK_HOUR] = bintobcd(dt->dt_hour);
155*b59f66e1Schristos 	chiptime[MK_DOW] = bintobcd(dt->dt_wday);
156*b59f66e1Schristos 	chiptime[MK_DOM] = bintobcd(dt->dt_day);
157*b59f66e1Schristos 	chiptime[MK_MONTH] = bintobcd(dt->dt_mon);
158*b59f66e1Schristos 	chiptime[MK_YEAR] = bintobcd(dt->dt_year - YEAR0);
15995d00ea7Snisimura 	chiptime[MK_CSR] &= ~MK_CSR_WRITE;	/* load them up */
16095d00ea7Snisimura 	splx(s);
16195d00ea7Snisimura 
16295d00ea7Snisimura 	stamp[0] = 'R'; stamp[1] = 'T'; stamp[2] = 'C'; stamp[3] = '\0';
1638e61a34dSgdamore 	return 0;
16495d00ea7Snisimura }
16595d00ea7Snisimura 
166b0074c5dStsutsui static void
dsclock_init(struct timekeeper_softc * sc)167b0074c5dStsutsui dsclock_init(struct timekeeper_softc *sc)
168b0074c5dStsutsui {
169b0074c5dStsutsui 	volatile uint8_t *chiptime = (void *)sc->sc_clock;
170b0074c5dStsutsui 
171b0074c5dStsutsui 	/*
172b0074c5dStsutsui 	 * It looks the firmware ROM doesn't initialize DS1287 at all
173b0074c5dStsutsui 	 * even after the chip is replaced, so explicitly initialize
174b0074c5dStsutsui 	 * control registers here.
175b0074c5dStsutsui 	 */
176b0074c5dStsutsui 	chiptime = (void *)sc->sc_clock;
177b0074c5dStsutsui 
178b0074c5dStsutsui 	/* No DSE, 24HR, BINARY */
179b0074c5dStsutsui 	chiptime[MC_REGB] =
180b0074c5dStsutsui 	    (chiptime[MC_REGB] & ~MC_REGB_DSE) |
181b0074c5dStsutsui 	    (MC_REGB_24HR | MC_REGB_BINARY);
182b0074c5dStsutsui 
183b0074c5dStsutsui 	/* make sure to start integrated clock OSC */
184b0074c5dStsutsui 	chiptime[MC_REGA] =
185b0074c5dStsutsui 	    (chiptime[MC_REGA] & ~MC_REGA_DVMASK) | MC_BASE_32_KHz;
186b0074c5dStsutsui }
187b0074c5dStsutsui 
18895d00ea7Snisimura /*
18995d00ea7Snisimura  * Get the time of day, based on the clock's value and/or the base value.
19095d00ea7Snisimura  */
1918e61a34dSgdamore static int
dsclock_get(todr_chip_handle_t tch,struct clock_ymdhms * dt)1928e61a34dSgdamore dsclock_get(todr_chip_handle_t tch, struct clock_ymdhms *dt)
19395d00ea7Snisimura {
1948e61a34dSgdamore 	struct timekeeper_softc *sc = (void *)tch->cookie;
195e571eaa8Stsutsui 	volatile uint8_t *chiptime = (void *)sc->sc_clock;
19695d00ea7Snisimura 	int s;
19795d00ea7Snisimura 
19895d00ea7Snisimura 	s = splclock();
19995d00ea7Snisimura 	/* update in progress; spin loop */
20095d00ea7Snisimura 	while (chiptime[MC_REGA] & MC_REGA_UIP)
201e571eaa8Stsutsui 		continue;
20295d00ea7Snisimura 	dt->dt_sec = chiptime[MC_SEC];
20395d00ea7Snisimura 	dt->dt_min = chiptime[MC_MIN];
20495d00ea7Snisimura 	dt->dt_hour = chiptime[MC_HOUR];
20595d00ea7Snisimura 	dt->dt_wday = chiptime[MC_DOW];
20695d00ea7Snisimura 	dt->dt_day = chiptime[MC_DOM];
20795d00ea7Snisimura 	dt->dt_mon = chiptime[MC_MONTH];
20895d00ea7Snisimura 	dt->dt_year = chiptime[MC_YEAR] + YEAR0;
20995d00ea7Snisimura 	splx(s);
2108e61a34dSgdamore 	return 0;
21195d00ea7Snisimura }
21295d00ea7Snisimura 
21395d00ea7Snisimura /*
21495d00ea7Snisimura  * Reset the TODR based on the time value.
21595d00ea7Snisimura  */
2168e61a34dSgdamore static int
dsclock_set(todr_chip_handle_t tch,struct clock_ymdhms * dt)2178e61a34dSgdamore dsclock_set(todr_chip_handle_t tch, struct clock_ymdhms *dt)
21895d00ea7Snisimura {
2198e61a34dSgdamore 	struct timekeeper_softc *sc = (void *)tch->cookie;
220e571eaa8Stsutsui 	volatile uint8_t *chiptime = (void *)sc->sc_clock;
22195d00ea7Snisimura 	int s;
22295d00ea7Snisimura 
22395d00ea7Snisimura 	s = splclock();
22495d00ea7Snisimura 	chiptime[MC_REGB] |= MC_REGB_SET;	/* enable write */
22595d00ea7Snisimura 	chiptime[MC_SEC] = dt->dt_sec;
22695d00ea7Snisimura 	chiptime[MC_MIN] = dt->dt_min;
22795d00ea7Snisimura 	chiptime[MC_HOUR] = dt->dt_hour;
22895d00ea7Snisimura 	chiptime[MC_DOW] = dt->dt_wday;
22995d00ea7Snisimura 	chiptime[MC_DOM] = dt->dt_day;
23095d00ea7Snisimura 	chiptime[MC_MONTH] = dt->dt_mon;
23195d00ea7Snisimura 	chiptime[MC_YEAR] = dt->dt_year - YEAR0;
23295d00ea7Snisimura 	chiptime[MC_REGB] &= ~MC_REGB_SET;	/* load them up */
23395d00ea7Snisimura 	splx(s);
2348e61a34dSgdamore 	return 0;
23595d00ea7Snisimura }
236