xref: /netbsd-src/sys/arch/landisk/include/intr.h (revision 33a7857517f2e2619724139673aa0d5098ee186f)
1*33a78575Sryo /*	$NetBSD: intr.h,v 1.7 2021/11/02 11:26:04 ryo Exp $	*/
21fd097bfSuwe 
31fd097bfSuwe /*-
41fd097bfSuwe  * Copyright (c) 2002 The NetBSD Foundation, Inc.
51fd097bfSuwe  * All rights reserved.
61fd097bfSuwe  *
71fd097bfSuwe  * Redistribution and use in source and binary forms, with or without
81fd097bfSuwe  * modification, are permitted provided that the following conditions
91fd097bfSuwe  * are met:
101fd097bfSuwe  * 1. Redistributions of source code must retain the above copyright
111fd097bfSuwe  *    notice, this list of conditions and the following disclaimer.
121fd097bfSuwe  * 2. Redistributions in binary form must reproduce the above copyright
131fd097bfSuwe  *    notice, this list of conditions and the following disclaimer in the
141fd097bfSuwe  *    documentation and/or other materials provided with the distribution.
151fd097bfSuwe  *
161fd097bfSuwe  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
171fd097bfSuwe  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
181fd097bfSuwe  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
191fd097bfSuwe  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
201fd097bfSuwe  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
211fd097bfSuwe  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
221fd097bfSuwe  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
231fd097bfSuwe  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
241fd097bfSuwe  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
251fd097bfSuwe  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
261fd097bfSuwe  * POSSIBILITY OF SUCH DAMAGE.
271fd097bfSuwe  */
281fd097bfSuwe 
291fd097bfSuwe #ifndef _LANDISK_INTR_H_
301fd097bfSuwe #define _LANDISK_INTR_H_
311fd097bfSuwe 
321fd097bfSuwe #include <sh3/intr.h>
331fd097bfSuwe 
341fd097bfSuwe /* Number of interrupt source */
351fd097bfSuwe #define _INTR_N		16
361fd097bfSuwe 
371fd097bfSuwe /* Interrupt priority levels */
382505fdfdSad #define	IPL_VM		12	/* low i/o */
392505fdfdSad #define	IPL_SCHED	14	/* clock */
401fd097bfSuwe #define	IPL_HIGH	15	/* everything */
411fd097bfSuwe 
42b07ec3fcSad typedef uint8_t ipl_t;
438bf76628Syamt typedef struct {
448bf76628Syamt 	ipl_t _ipl;
458bf76628Syamt } ipl_cookie_t;
468bf76628Syamt 
47*33a78575Sryo static inline __always_inline ipl_cookie_t
makeiplcookie(ipl_t ipl)488bf76628Syamt makeiplcookie(ipl_t ipl)
498bf76628Syamt {
508bf76628Syamt 
518bf76628Syamt 	return (ipl_cookie_t){._ipl = ipl << 4};
528bf76628Syamt }
538bf76628Syamt 
54*33a78575Sryo static inline __always_inline int
splraiseipl(ipl_cookie_t icookie)558bf76628Syamt splraiseipl(ipl_cookie_t icookie)
568bf76628Syamt {
578bf76628Syamt 
588bf76628Syamt 	return _cpu_intr_raise(icookie._ipl);
598bf76628Syamt }
608bf76628Syamt 
618bf76628Syamt #include <sys/spl.h>
621fd097bfSuwe 
631fd097bfSuwe #define	spl0()			_cpu_intr_resume(IPL_NONE << 4)
641fd097bfSuwe #define	splx(x)			_cpu_intr_resume(x)
651fd097bfSuwe 
661fd097bfSuwe void intr_init(void);
671fd097bfSuwe void *extintr_establish(int irq, int level, int (*func)(void *), void *arg);
681fd097bfSuwe void extintr_disestablish(void *ih);
691fd097bfSuwe void extintr_enable(void *ih);
701fd097bfSuwe void extintr_disable(void *ih);
711fd097bfSuwe void extintr_disable_by_num(int irq);
721fd097bfSuwe 
731fd097bfSuwe #endif /* !_LANDISK_INTR_H_ */
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