1*a6ce3504Sthorpej /* $NetBSD: autoconf.c,v 1.18 2023/12/20 15:00:08 thorpej Exp $ */
20560d8b9Sgavan
30560d8b9Sgavan /*-
40560d8b9Sgavan * Copyright (c) 2001 The NetBSD Foundation, Inc.
50560d8b9Sgavan * All rights reserved.
60560d8b9Sgavan *
70560d8b9Sgavan * This code is derived from software contributed to The NetBSD Foundation
80560d8b9Sgavan * by Matt Thomas <matt@3am-software.com>.
90560d8b9Sgavan *
100560d8b9Sgavan * Redistribution and use in source and binary forms, with or without
110560d8b9Sgavan * modification, are permitted provided that the following conditions
120560d8b9Sgavan * are met:
130560d8b9Sgavan * 1. Redistributions of source code must retain the above copyright
140560d8b9Sgavan * notice, this list of conditions and the following disclaimer.
150560d8b9Sgavan * 2. Redistributions in binary form must reproduce the above copyright
160560d8b9Sgavan * notice, this list of conditions and the following disclaimer in the
170560d8b9Sgavan * documentation and/or other materials provided with the distribution.
180560d8b9Sgavan *
190560d8b9Sgavan * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
200560d8b9Sgavan * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
210560d8b9Sgavan * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
220560d8b9Sgavan * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
230560d8b9Sgavan * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
240560d8b9Sgavan * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
250560d8b9Sgavan * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
260560d8b9Sgavan * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
270560d8b9Sgavan * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
280560d8b9Sgavan * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
290560d8b9Sgavan * POSSIBILITY OF SUCH DAMAGE.
300560d8b9Sgavan */
310560d8b9Sgavan
320560d8b9Sgavan #include <sys/cdefs.h>
33*a6ce3504Sthorpej __KERNEL_RCSID(0, "$NetBSD: autoconf.c,v 1.18 2023/12/20 15:00:08 thorpej Exp $");
340560d8b9Sgavan
350560d8b9Sgavan #include "opt_md.h"
360560d8b9Sgavan
370560d8b9Sgavan #include <sys/param.h>
380560d8b9Sgavan #include <sys/systm.h>
390560d8b9Sgavan #include <sys/reboot.h>
400560d8b9Sgavan #include <sys/disklabel.h>
410560d8b9Sgavan #include <sys/device.h>
420560d8b9Sgavan #include <sys/conf.h>
430560d8b9Sgavan #include <sys/kernel.h>
440560d8b9Sgavan
4560b9fa0cSgavan #include <net/if.h>
4660b9fa0cSgavan #include <net/if_ether.h>
4760b9fa0cSgavan
480560d8b9Sgavan #include <machine/autoconf.h>
490560d8b9Sgavan #include <machine/intr.h>
500560d8b9Sgavan
5160b9fa0cSgavan #include <iyonix/iyonix/iyonixvar.h>
5260b9fa0cSgavan
5323869c78Sgavan #include <acorn32/include/bootconfig.h>
5423869c78Sgavan
5523869c78Sgavan extern struct bootconfig bootconfig;
5623869c78Sgavan
570560d8b9Sgavan /*
580560d8b9Sgavan * Set up the root device from the boot args
590560d8b9Sgavan */
600560d8b9Sgavan void
cpu_rootconf(void)610560d8b9Sgavan cpu_rootconf(void)
620560d8b9Sgavan {
630560d8b9Sgavan aprint_normal("boot device: %s\n",
64cbab9cadSchs booted_device != NULL ? device_xname(booted_device) : "<unknown>");
658ce44338Smlelstv rootconf();
660560d8b9Sgavan }
670560d8b9Sgavan
680560d8b9Sgavan
690560d8b9Sgavan /*
700560d8b9Sgavan * void cpu_configure()
710560d8b9Sgavan *
720560d8b9Sgavan * Configure all the root devices
730560d8b9Sgavan * The root devices are expected to configure their own children
740560d8b9Sgavan */
750560d8b9Sgavan void
cpu_configure(void)760560d8b9Sgavan cpu_configure(void)
770560d8b9Sgavan {
780560d8b9Sgavan struct mainbus_attach_args maa;
790560d8b9Sgavan
800560d8b9Sgavan (void) splhigh();
810560d8b9Sgavan (void) splserial(); /* XXX need an splextreme() */
820560d8b9Sgavan
830560d8b9Sgavan maa.ma_name = "mainbus";
840560d8b9Sgavan
850560d8b9Sgavan config_rootfound("mainbus", &maa);
860560d8b9Sgavan
870560d8b9Sgavan /* Time to start taking interrupts so lets open the flood gates .... */
880560d8b9Sgavan spl0();
890560d8b9Sgavan }
900560d8b9Sgavan
9160b9fa0cSgavan #define BUILTIN_ETHERNET_P(pa) \
9260b9fa0cSgavan ((pa)->pa_bus == 0 && (pa)->pa_device == 4 && (pa)->pa_function == 0)
9360b9fa0cSgavan
94fb44a857Sthorpej #define SETPROP(x, y) \
95fb44a857Sthorpej do { \
96fb44a857Sthorpej if (prop_dictionary_set(device_properties(dev), \
9709c5f9ccSthorpej x, y) == false) { \
9860b9fa0cSgavan printf("WARNING: unable to set " x " " \
99cbab9cadSchs "property for %s\n", device_xname(dev)); \
100fb44a857Sthorpej } \
101fb44a857Sthorpej prop_object_release(y); \
1029bc69fdbSthorpej } while (/*CONSTCOND*/0)
10360b9fa0cSgavan
1040560d8b9Sgavan void
device_register(device_t dev,void * aux)105cbab9cadSchs device_register(device_t dev, void *aux)
1060560d8b9Sgavan {
107cbab9cadSchs device_t pdev;
108132ce1f0Sthorpej
109132ce1f0Sthorpej if ((pdev = device_parent(dev)) != NULL &&
11057e79561Skleink device_is_a(pdev, "pci")) {
11160b9fa0cSgavan struct pci_attach_args *pa = aux;
1120560d8b9Sgavan
11360b9fa0cSgavan if (BUILTIN_ETHERNET_P(pa)) {
114fb44a857Sthorpej prop_number_t cfg1, cfg2, swdpin;
115fb44a857Sthorpej prop_data_t mac;
11660b9fa0cSgavan
11760b9fa0cSgavan /*
11860b9fa0cSgavan * We set these configuration registers to 0,
11960b9fa0cSgavan * because it's the closest we have to "leave them
12060b9fa0cSgavan * alone". That and, it works.
12160b9fa0cSgavan */
122fb44a857Sthorpej cfg1 = prop_number_create_integer(0);
123fb44a857Sthorpej KASSERT(cfg1 != NULL);
124fb44a857Sthorpej cfg2 = prop_number_create_integer(0);
125fb44a857Sthorpej KASSERT(cfg2 != NULL);
126fb44a857Sthorpej swdpin = prop_number_create_integer(0);
127fb44a857Sthorpej KASSERT(swdpin != NULL);
12860b9fa0cSgavan
129fb44a857Sthorpej mac = prop_data_create_data_nocopy(iyonix_macaddr,
130fb44a857Sthorpej ETHER_ADDR_LEN);
131fb44a857Sthorpej KASSERT(mac != NULL);
132fb44a857Sthorpej
133f9e1815aSmartin SETPROP("mac-address", mac);
134fb44a857Sthorpej SETPROP("i82543-cfg1", cfg1);
135fb44a857Sthorpej SETPROP("i82543-cfg2", cfg2);
136fb44a857Sthorpej SETPROP("i82543-swdpin", swdpin);
13760b9fa0cSgavan }
13860b9fa0cSgavan }
13923869c78Sgavan
140d622ce01Smacallan if ((device_is_a(dev, "genfb") || device_is_a(dev, "gffb")) &&
14123869c78Sgavan device_is_a(device_parent(dev), "pci") ) {
14223869c78Sgavan prop_dictionary_t dict = device_properties(dev);
14323869c78Sgavan struct pci_attach_args *pa = aux;
14423869c78Sgavan pcireg_t bar0, bar1;
14523869c78Sgavan uint32_t fbaddr;
14623869c78Sgavan bus_space_handle_t vgah;
14723869c78Sgavan
14823869c78Sgavan bar0 = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_MAPREG_START);
14923869c78Sgavan bar1 = pci_conf_read(pa->pa_pc, pa->pa_tag,
15023869c78Sgavan PCI_MAPREG_START + 0x04);
15123869c78Sgavan
15223869c78Sgavan /*
15323869c78Sgavan * We need to prod the VGA card to disable interrupts, since
15423869c78Sgavan * RISC OS has been using them and we don't know how to
15523869c78Sgavan * handle them. This assumes that we have a NVidia
15623869c78Sgavan * GeForce 2 MX card as supplied with the Iyonix and
15723869c78Sgavan * as (probably) required by RISC OS in order to boot.
15823869c78Sgavan * If you write your own RISC OS driver for a different card,
15923869c78Sgavan * you're on your own.
16023869c78Sgavan */
16123869c78Sgavan
16223869c78Sgavan /* We're guessing at the numbers here, guys */
16323869c78Sgavan #define VGASIZE 0x1000
16423869c78Sgavan #define IRQENABLE_ADDR 0x140
16523869c78Sgavan
16623869c78Sgavan bus_space_map(pa->pa_memt, PCI_MAPREG_MEM_ADDR(bar0),
16723869c78Sgavan VGASIZE, 0, &vgah);
16823869c78Sgavan bus_space_write_4(pa->pa_memt, vgah, 0x140, 0);
16923869c78Sgavan bus_space_unmap(pa->pa_memt, vgah, 0x1000);
17023869c78Sgavan
17123869c78Sgavan fbaddr = PCI_MAPREG_MEM_ADDR(bar1);
17223869c78Sgavan
17323869c78Sgavan prop_dictionary_set_bool(dict, "is_console", 1);
17423869c78Sgavan prop_dictionary_set_uint32(dict, "width",
17523869c78Sgavan bootconfig.width + 1);
17623869c78Sgavan prop_dictionary_set_uint32(dict, "height",
17723869c78Sgavan bootconfig.height + 1);
17823869c78Sgavan prop_dictionary_set_uint32(dict, "depth",
17923869c78Sgavan 1 << bootconfig.log2_bpp);
180d622ce01Smacallan /*
181d622ce01Smacallan * XXX
182d622ce01Smacallan * at least RISC OS 5.28 seems to use the graphics hardware in
183d622ce01Smacallan * BGR mode when in 32bit colour, so take that into account
184d622ce01Smacallan */
185d622ce01Smacallan if (bootconfig.log2_bpp == 5)
186d622ce01Smacallan prop_dictionary_set_bool(dict, "is_bgr", 1);
18723869c78Sgavan prop_dictionary_set_uint32(dict, "address", fbaddr);
18823869c78Sgavan }
1897c730df9Smacallan if (device_is_a(dev, "dsrtc")) {
1907c730df9Smacallan prop_dictionary_t dict = device_properties(dev);
1917c730df9Smacallan prop_dictionary_set_bool(dict, "base_year_is_2000", 1);
1927c730df9Smacallan }
1930560d8b9Sgavan }
194