xref: /netbsd-src/sys/arch/i386/pci/opti82c700reg.h (revision 9a7e0d82ac02720bf40117c69c94964daf6c1417)
1*9a7e0d82Ssoda /*	$NetBSD: opti82c700reg.h,v 1.2 2000/07/18 11:07:21 soda Exp $	*/
2d6d9fbe2Sthorpej 
3d6d9fbe2Sthorpej /*
4d6d9fbe2Sthorpej  * Copyright (c) 1999, by UCHIYAMA Yasushi
5d6d9fbe2Sthorpej  * All rights reserved.
6d6d9fbe2Sthorpej  *
7d6d9fbe2Sthorpej  * Redistribution and use in source and binary forms, with or without
8d6d9fbe2Sthorpej  * modification, are permitted provided that the following conditions
9d6d9fbe2Sthorpej  * are met:
10d6d9fbe2Sthorpej  * 1. Redistributions of source code must retain the above copyright
11d6d9fbe2Sthorpej  *    notice, this list of conditions and the following disclaimer.
12d6d9fbe2Sthorpej  * 2. The name of the developer may NOT be used to endorse or promote products
13d6d9fbe2Sthorpej  *    derived from this software without specific prior written permission.
14d6d9fbe2Sthorpej  *
15d6d9fbe2Sthorpej  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16d6d9fbe2Sthorpej  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17d6d9fbe2Sthorpej  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18d6d9fbe2Sthorpej  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19d6d9fbe2Sthorpej  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20d6d9fbe2Sthorpej  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21d6d9fbe2Sthorpej  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22d6d9fbe2Sthorpej  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23d6d9fbe2Sthorpej  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24d6d9fbe2Sthorpej  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25d6d9fbe2Sthorpej  * SUCH DAMAGE.
26d6d9fbe2Sthorpej  */
27d6d9fbe2Sthorpej 
28d6d9fbe2Sthorpej /*
29d6d9fbe2Sthorpej  * Register definitions for the Opti 82c700 PCI-ISA bridge interrupt
30d6d9fbe2Sthorpej  * controller.
31d6d9fbe2Sthorpej  */
32d6d9fbe2Sthorpej 
33d6d9fbe2Sthorpej #define	FIRESTAR_CFG_INTR_IRQ	0xb0	/* PCI configuration space */
34d6d9fbe2Sthorpej #define	FIRESTAR_CFG_INTR_PIRQ	0xb8	/* PCI configuration space */
35d6d9fbe2Sthorpej 
36d6d9fbe2Sthorpej #define	FIRESTAR_PIRQ_NONE	0
37d6d9fbe2Sthorpej #define	FIRESTAR_PIRQ_MASK	0xdffa
38d6d9fbe2Sthorpej #define	FIRESTAR_LEGAL_IRQ(irq)	((irq) >= 0 && (irq) <= 15 &&		\
39d6d9fbe2Sthorpej 				 ((1 << (irq)) & FIRESTAR_PIRQ_MASK) != 0)
40d6d9fbe2Sthorpej 
41d6d9fbe2Sthorpej #define	FIRESTAR_CFG_PIRQ_MASK	0x0f
42d6d9fbe2Sthorpej 
43d6d9fbe2Sthorpej #define	FIRESTAR_TRIGGER_MASK	0x01
44d6d9fbe2Sthorpej #define	FIRESTAR_TRIGGER_SHIFT	4
45d6d9fbe2Sthorpej 
46d6d9fbe2Sthorpej /*
47d6d9fbe2Sthorpej  * Opti's suggested Link values.
48d6d9fbe2Sthorpej  */
49d6d9fbe2Sthorpej #define	FIRESTAR_PIR_REGOFS_MASK	0x07
50d6d9fbe2Sthorpej #define	FIRESTAR_PIR_REGOFS_SHIFT	4
51d6d9fbe2Sthorpej #define	FIRESTAR_PIR_REGOFS(link)					\
52d6d9fbe2Sthorpej 	(((link) >> FIRESTAR_PIR_REGOFS_SHIFT) & FIRESTAR_PIR_REGOFS_MASK)
53d6d9fbe2Sthorpej 
54d6d9fbe2Sthorpej #define	FIRESTAR_PIR_SELECTSRC_MASK	0x07
55d6d9fbe2Sthorpej #define	FIRESTAR_PIR_SELECTSRC_SHIFT	0
56d6d9fbe2Sthorpej #define	FIRESTAR_PIR_SELECTSRC(link)					\
57d6d9fbe2Sthorpej 	(((link) >> FIRESTAR_PIR_SELECTSRC_SHIFT) & FIRESTAR_PIR_SELECTSRC_MASK)
58d6d9fbe2Sthorpej 
59d6d9fbe2Sthorpej #define	FIRESTAR_PIR_SELECT_NONE	0
60d6d9fbe2Sthorpej #define	FIRESTAR_PIR_SELECT_IRQ		1
61d6d9fbe2Sthorpej #define	FIRESTAR_PIR_SELECT_PIRQ	2
62d6d9fbe2Sthorpej #define	FIRESTAR_PIR_SELECT_BRIDGE	3
63d6d9fbe2Sthorpej 
64d6d9fbe2Sthorpej #define	FIRESTAR_PIR_MAKELINK(src, ofs)					\
65d6d9fbe2Sthorpej 	(((src) << FIRESTAR_PIR_SELECTSRC_SHIFT) |			\
66d6d9fbe2Sthorpej 	 ((ofs) << FIRESTAR_PIR_REGOFS_SHIFT))
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