1*ce099b40Smartin /* $NetBSD: amd756reg.h,v 1.2 2008/04/28 20:23:24 martin Exp $ */ 29b730bc3Such 39b730bc3Such /*- 49b730bc3Such * Copyright (c) 2001 The NetBSD Foundation, Inc. 59b730bc3Such * All rights reserved. 69b730bc3Such * 79b730bc3Such * Redistribution and use in source and binary forms, with or without 89b730bc3Such * modification, are permitted provided that the following conditions 99b730bc3Such * are met: 109b730bc3Such * 1. Redistributions of source code must retain the above copyright 119b730bc3Such * notice, this list of conditions and the following disclaimer. 129b730bc3Such * 2. Redistributions in binary form must reproduce the above copyright 139b730bc3Such * notice, this list of conditions and the following disclaimer in the 149b730bc3Such * documentation and/or other materials provided with the distribution. 159b730bc3Such * 169b730bc3Such * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 179b730bc3Such * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 189b730bc3Such * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 199b730bc3Such * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 209b730bc3Such * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 219b730bc3Such * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 229b730bc3Such * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 239b730bc3Such * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 249b730bc3Such * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 259b730bc3Such * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 269b730bc3Such * POSSIBILITY OF SUCH DAMAGE. 279b730bc3Such */ 289b730bc3Such 299b730bc3Such /* 309b730bc3Such * Register definitions for the AMD756 Peripheral Bus Controller. 319b730bc3Such */ 329b730bc3Such 339b730bc3Such /* 349b730bc3Such * Edge Triggered Interrupt Select register. (0x54) 359b730bc3Such * bits 7-4: reserved 369b730bc3Such * bit 3: Edge Triggered Interrupt Select for PCI Interrupt D 379b730bc3Such * bit 2: Edge Triggered Interrupt Select for PCI Interrupt C 389b730bc3Such * bit 1: Edge Triggered Interrupt Select for PCI Interrupt B 399b730bc3Such * bit 0: Edge Triggered Interrupt Select for PCI Interrupt A 409b730bc3Such * 0 = active Low and level triggered 419b730bc3Such * 1 = active High and edge triggered 429b730bc3Such * 439b730bc3Such * PIRQ Select register. (0x56-57) 449b730bc3Such * bits 15-12: PIRQD# Select 459b730bc3Such * bits 11-8: PIRQD# Select 469b730bc3Such * bits 7-4: PIRQD# Select 479b730bc3Such * bits 3-0: PIRQD# Select 489b730bc3Such * 0000: Reserved 0100: IRQ4 1000: Reserved 1100: IRQ12 499b730bc3Such * 0001: IRQ1 0101: IRQ5 1001: IRQ9 1101: Reserved 509b730bc3Such * 0010: Reserved 0110: IRQ6 1010: IRQ10 1110: IRQ14 519b730bc3Such * 0011: IRQ3 0111: IRQ7 1011: IRQ11 1111: IRQ15 529b730bc3Such */ 539b730bc3Such #define AMD756_CFG_PIR 0x54 549b730bc3Such 559b730bc3Such #define AMD756_GET_EDGESEL(ph) \ 569b730bc3Such (pci_conf_read((ph)->ph_pc, (ph)->ph_tag, AMD756_CFG_PIR) \ 579b730bc3Such & 0xff) 589b730bc3Such 599b730bc3Such #define AMD756_GET_PIIRQSEL(ph) \ 609b730bc3Such (pci_conf_read((ph)->ph_pc, (ph)->ph_tag, AMD756_CFG_PIR) \ 619b730bc3Such >> 16) 629b730bc3Such 639b730bc3Such #define AMD756_SET_EDGESEL(ph, n) \ 649b730bc3Such pci_conf_write((ph)->ph_pc, (ph)->ph_tag, AMD756_CFG_PIR, \ 659b730bc3Such (pci_conf_read((ph)->ph_pc, (ph)->ph_tag, AMD756_CFG_PIR) \ 669b730bc3Such & 0xffff0000) | (n)) 679b730bc3Such 689b730bc3Such #define AMD756_SET_PIIRQSEL(ph, n) \ 699b730bc3Such pci_conf_write((ph)->ph_pc, (ph)->ph_tag, AMD756_CFG_PIR, \ 709b730bc3Such (pci_conf_read((ph)->ph_pc, (ph)->ph_tag, AMD756_CFG_PIR) \ 719b730bc3Such & 0x000000ff) | ((n) << 16)) 729b730bc3Such 739b730bc3Such #define AMD756_PIRQ_MASK 0xdefa 749b730bc3Such #define AMD756_LEGAL_LINK(link) ((link) >= 0 && (link) <= 3) 759b730bc3Such #define AMD756_LEGAL_IRQ(irq) ((irq) >= 0 && (irq) <= 15 && \ 769b730bc3Such ((1 << (irq)) & AMD756_PIRQ_MASK) != 0) 77