xref: /netbsd-src/sys/arch/hppa/spmath/dfcmp.c (revision d72340ff8e2fb5c3ca49ab85c798389cda4408d6)
1*d72340ffSskrll /*	$NetBSD: dfcmp.c,v 1.4 2012/02/04 17:03:09 skrll Exp $	*/
2f4f0d8a3Sfredette 
3f4f0d8a3Sfredette /*	$OpenBSD: dfcmp.c,v 1.4 2001/03/29 03:58:17 mickey Exp $	*/
4f4f0d8a3Sfredette 
5f4f0d8a3Sfredette /*
6f4f0d8a3Sfredette  * Copyright 1996 1995 by Open Software Foundation, Inc.
7f4f0d8a3Sfredette  *              All Rights Reserved
8f4f0d8a3Sfredette  *
9f4f0d8a3Sfredette  * Permission to use, copy, modify, and distribute this software and
10f4f0d8a3Sfredette  * its documentation for any purpose and without fee is hereby granted,
11f4f0d8a3Sfredette  * provided that the above copyright notice appears in all copies and
12f4f0d8a3Sfredette  * that both the copyright notice and this permission notice appear in
13f4f0d8a3Sfredette  * supporting documentation.
14f4f0d8a3Sfredette  *
15f4f0d8a3Sfredette  * OSF DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE
16f4f0d8a3Sfredette  * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
17f4f0d8a3Sfredette  * FOR A PARTICULAR PURPOSE.
18f4f0d8a3Sfredette  *
19f4f0d8a3Sfredette  * IN NO EVENT SHALL OSF BE LIABLE FOR ANY SPECIAL, INDIRECT, OR
20f4f0d8a3Sfredette  * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
21f4f0d8a3Sfredette  * LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT,
22f4f0d8a3Sfredette  * NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION
23f4f0d8a3Sfredette  * WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
24f4f0d8a3Sfredette  */
25f4f0d8a3Sfredette /*
26f4f0d8a3Sfredette  * pmk1.1
27f4f0d8a3Sfredette  */
28f4f0d8a3Sfredette /*
29f4f0d8a3Sfredette  * (c) Copyright 1986 HEWLETT-PACKARD COMPANY
30f4f0d8a3Sfredette  *
31f4f0d8a3Sfredette  * To anyone who acknowledges that this file is provided "AS IS"
32f4f0d8a3Sfredette  * without any express or implied warranty:
33f4f0d8a3Sfredette  *     permission to use, copy, modify, and distribute this file
34f4f0d8a3Sfredette  * for any purpose is hereby granted without fee, provided that
35f4f0d8a3Sfredette  * the above copyright notice and this notice appears in all
36f4f0d8a3Sfredette  * copies, and that the name of Hewlett-Packard Company not be
37f4f0d8a3Sfredette  * used in advertising or publicity pertaining to distribution
38f4f0d8a3Sfredette  * of the software without specific, written prior permission.
39f4f0d8a3Sfredette  * Hewlett-Packard Company makes no representations about the
40f4f0d8a3Sfredette  * suitability of this software for any purpose.
41f4f0d8a3Sfredette  */
42f4f0d8a3Sfredette 
43f4f0d8a3Sfredette 
440c82163cSlukem #include <sys/cdefs.h>
45*d72340ffSskrll __KERNEL_RCSID(0, "$NetBSD: dfcmp.c,v 1.4 2012/02/04 17:03:09 skrll Exp $");
460c82163cSlukem 
47f4f0d8a3Sfredette #include "../spmath/float.h"
48f4f0d8a3Sfredette #include "../spmath/dbl_float.h"
49f4f0d8a3Sfredette 
50f4f0d8a3Sfredette /*
51f4f0d8a3Sfredette  * dbl_cmp: compare two values
52f4f0d8a3Sfredette  */
53f4f0d8a3Sfredette int
dbl_fcmp(dbl_floating_point * leftptr,dbl_floating_point * rightptr,unsigned int cond,unsigned int * status)54*d72340ffSskrll dbl_fcmp(dbl_floating_point *leftptr, dbl_floating_point *rightptr,
55*d72340ffSskrll     unsigned int cond, unsigned int *status)
56f4f0d8a3Sfredette {
57f4f0d8a3Sfredette     register unsigned int leftp1, leftp2, rightp1, rightp2;
58f4f0d8a3Sfredette     register int xorresult;
59f4f0d8a3Sfredette 
60f4f0d8a3Sfredette     /* Create local copies of the numbers */
61f4f0d8a3Sfredette     Dbl_copyfromptr(leftptr,leftp1,leftp2);
62f4f0d8a3Sfredette     Dbl_copyfromptr(rightptr,rightp1,rightp2);
63f4f0d8a3Sfredette     /*
64f4f0d8a3Sfredette      * Test for NaN
65f4f0d8a3Sfredette      */
66f4f0d8a3Sfredette     if(    (Dbl_exponent(leftp1) == DBL_INFINITY_EXPONENT)
67f4f0d8a3Sfredette 	|| (Dbl_exponent(rightp1) == DBL_INFINITY_EXPONENT) )
68f4f0d8a3Sfredette 	{
69f4f0d8a3Sfredette 	/* Check if a NaN is involved.  Signal an invalid exception when
70f4f0d8a3Sfredette 	 * comparing a signaling NaN or when comparing quiet NaNs and the
71f4f0d8a3Sfredette 	 * low bit of the condition is set */
72f4f0d8a3Sfredette 	if( ((Dbl_exponent(leftp1) == DBL_INFINITY_EXPONENT)
73f4f0d8a3Sfredette 	    && Dbl_isnotzero_mantissa(leftp1,leftp2)
74f4f0d8a3Sfredette 	    && (Exception(cond) || Dbl_isone_signaling(leftp1)))
75f4f0d8a3Sfredette 	   ||
76f4f0d8a3Sfredette 	    ((Dbl_exponent(rightp1) == DBL_INFINITY_EXPONENT)
77f4f0d8a3Sfredette 	    && Dbl_isnotzero_mantissa(rightp1,rightp2)
78f4f0d8a3Sfredette 	    && (Exception(cond) || Dbl_isone_signaling(rightp1))) )
79f4f0d8a3Sfredette 	    {
80f4f0d8a3Sfredette 	    if( Is_invalidtrap_enabled() ) {
81f4f0d8a3Sfredette 		Set_status_cbit(Unordered(cond));
82f4f0d8a3Sfredette 		return(INVALIDEXCEPTION);
83f4f0d8a3Sfredette 	    }
84f4f0d8a3Sfredette 	    else Set_invalidflag();
85f4f0d8a3Sfredette 	    Set_status_cbit(Unordered(cond));
86f4f0d8a3Sfredette 	    return(NOEXCEPTION);
87f4f0d8a3Sfredette 	    }
88f4f0d8a3Sfredette 	/* All the exceptional conditions are handled, now special case
89f4f0d8a3Sfredette 	   NaN compares */
90f4f0d8a3Sfredette 	else if( ((Dbl_exponent(leftp1) == DBL_INFINITY_EXPONENT)
91f4f0d8a3Sfredette 	    && Dbl_isnotzero_mantissa(leftp1,leftp2))
92f4f0d8a3Sfredette 	   ||
93f4f0d8a3Sfredette 	    ((Dbl_exponent(rightp1) == DBL_INFINITY_EXPONENT)
94f4f0d8a3Sfredette 	    && Dbl_isnotzero_mantissa(rightp1,rightp2)) )
95f4f0d8a3Sfredette 	    {
96f4f0d8a3Sfredette 	    /* NaNs always compare unordered. */
97f4f0d8a3Sfredette 	    Set_status_cbit(Unordered(cond));
98f4f0d8a3Sfredette 	    return(NOEXCEPTION);
99f4f0d8a3Sfredette 	    }
100f4f0d8a3Sfredette 	/* infinities will drop down to the normal compare mechanisms */
101f4f0d8a3Sfredette 	}
102f4f0d8a3Sfredette     /* First compare for unequal signs => less or greater or
103f4f0d8a3Sfredette      * special equal case */
104f4f0d8a3Sfredette     Dbl_xortointp1(leftp1,rightp1,xorresult);
105f4f0d8a3Sfredette     if( xorresult < 0 )
106f4f0d8a3Sfredette 	{
107f4f0d8a3Sfredette 	/* left negative => less, left positive => greater.
108f4f0d8a3Sfredette 	 * equal is possible if both operands are zeros. */
109f4f0d8a3Sfredette 	if( Dbl_iszero_exponentmantissa(leftp1,leftp2)
110f4f0d8a3Sfredette 	  && Dbl_iszero_exponentmantissa(rightp1,rightp2) )
111f4f0d8a3Sfredette 	    {
112f4f0d8a3Sfredette 	    Set_status_cbit(Equal(cond));
113f4f0d8a3Sfredette 	    }
114f4f0d8a3Sfredette 	else if( Dbl_isone_sign(leftp1) )
115f4f0d8a3Sfredette 	    {
116f4f0d8a3Sfredette 	    Set_status_cbit(Lessthan(cond));
117f4f0d8a3Sfredette 	    }
118f4f0d8a3Sfredette 	else
119f4f0d8a3Sfredette 	    {
120f4f0d8a3Sfredette 	    Set_status_cbit(Greaterthan(cond));
121f4f0d8a3Sfredette 	    }
122f4f0d8a3Sfredette 	}
123f4f0d8a3Sfredette     /* Signs are the same.  Treat negative numbers separately
124f4f0d8a3Sfredette      * from the positives because of the reversed sense.  */
125f4f0d8a3Sfredette     else if(Dbl_isequal(leftp1,leftp2,rightp1,rightp2))
126f4f0d8a3Sfredette 	{
127f4f0d8a3Sfredette 	Set_status_cbit(Equal(cond));
128f4f0d8a3Sfredette 	}
129f4f0d8a3Sfredette     else if( Dbl_iszero_sign(leftp1) )
130f4f0d8a3Sfredette 	{
131f4f0d8a3Sfredette 	/* Positive compare */
132f4f0d8a3Sfredette 	if( Dbl_allp1(leftp1) < Dbl_allp1(rightp1) )
133f4f0d8a3Sfredette 	    {
134f4f0d8a3Sfredette 	    Set_status_cbit(Lessthan(cond));
135f4f0d8a3Sfredette 	    }
136f4f0d8a3Sfredette 	else if( Dbl_allp1(leftp1) > Dbl_allp1(rightp1) )
137f4f0d8a3Sfredette 	    {
138f4f0d8a3Sfredette 	    Set_status_cbit(Greaterthan(cond));
139f4f0d8a3Sfredette 	    }
140f4f0d8a3Sfredette 	else
141f4f0d8a3Sfredette 	    {
142f4f0d8a3Sfredette 	    /* Equal first parts.  Now we must use unsigned compares to
143f4f0d8a3Sfredette 	     * resolve the two possibilities. */
144f4f0d8a3Sfredette 	    if( Dbl_allp2(leftp2) < Dbl_allp2(rightp2) )
145f4f0d8a3Sfredette 		{
146f4f0d8a3Sfredette 		Set_status_cbit(Lessthan(cond));
147f4f0d8a3Sfredette 		}
148f4f0d8a3Sfredette 	    else
149f4f0d8a3Sfredette 		{
150f4f0d8a3Sfredette 		Set_status_cbit(Greaterthan(cond));
151f4f0d8a3Sfredette 		}
152f4f0d8a3Sfredette 	    }
153f4f0d8a3Sfredette 	}
154f4f0d8a3Sfredette     else
155f4f0d8a3Sfredette 	{
156f4f0d8a3Sfredette 	/* Negative compare.  Signed or unsigned compares
157f4f0d8a3Sfredette  	 * both work the same.  That distinction is only
158f4f0d8a3Sfredette  	 * important when the sign bits differ. */
159f4f0d8a3Sfredette 	if( Dbl_allp1(leftp1) > Dbl_allp1(rightp1) )
160f4f0d8a3Sfredette 	    {
161f4f0d8a3Sfredette 	    Set_status_cbit(Lessthan(cond));
162f4f0d8a3Sfredette 	    }
163f4f0d8a3Sfredette 	else if( Dbl_allp1(leftp1) < Dbl_allp1(rightp1) )
164f4f0d8a3Sfredette 	    {
165f4f0d8a3Sfredette 	    Set_status_cbit(Greaterthan(cond));
166f4f0d8a3Sfredette 	    }
167f4f0d8a3Sfredette 	else
168f4f0d8a3Sfredette 	    {
169f4f0d8a3Sfredette 	    /* Equal first parts.  Now we must use unsigned compares to
170f4f0d8a3Sfredette 	     * resolve the two possibilities. */
171f4f0d8a3Sfredette 	    if( Dbl_allp2(leftp2) > Dbl_allp2(rightp2) )
172f4f0d8a3Sfredette 		{
173f4f0d8a3Sfredette 		Set_status_cbit(Lessthan(cond));
174f4f0d8a3Sfredette 		}
175f4f0d8a3Sfredette 	    else
176f4f0d8a3Sfredette 		{
177f4f0d8a3Sfredette 		Set_status_cbit(Greaterthan(cond));
178f4f0d8a3Sfredette 		}
179f4f0d8a3Sfredette 	    }
180f4f0d8a3Sfredette 	}
181f4f0d8a3Sfredette 	return(NOEXCEPTION);
182f4f0d8a3Sfredette     }
183