1*16543c49Schristos /* $NetBSD: mcontext.h,v 1.16 2024/11/30 01:04:09 christos Exp $ */ 2e46cb5bfSchs 3e46cb5bfSchs #ifndef _HPPA_MCONTEXT_H_ 4e46cb5bfSchs #define _HPPA_MCONTEXT_H_ 5e46cb5bfSchs 60d86a5cdSchs /* 70d86a5cdSchs * General register state 80d86a5cdSchs */ 90d86a5cdSchs #define _NGREG 44 100d86a5cdSchs 111120ea0dSskrll #define _REG_R1 1 121120ea0dSskrll #define _REG_R2 2 131120ea0dSskrll #define _REG_R3 3 141120ea0dSskrll #define _REG_R4 4 151120ea0dSskrll #define _REG_R5 5 161120ea0dSskrll #define _REG_R6 6 171120ea0dSskrll #define _REG_R7 7 181120ea0dSskrll #define _REG_R8 8 191120ea0dSskrll #define _REG_R9 9 201120ea0dSskrll #define _REG_R10 10 211120ea0dSskrll #define _REG_R11 11 221120ea0dSskrll #define _REG_R12 12 231120ea0dSskrll #define _REG_R13 13 241120ea0dSskrll #define _REG_R14 14 251120ea0dSskrll #define _REG_R15 15 261120ea0dSskrll #define _REG_R16 16 271120ea0dSskrll #define _REG_R17 17 281120ea0dSskrll #define _REG_R18 18 291120ea0dSskrll #define _REG_R19 19 301120ea0dSskrll #define _REG_R20 20 311120ea0dSskrll #define _REG_R21 21 321120ea0dSskrll #define _REG_R22 22 331120ea0dSskrll #define _REG_R23 23 341120ea0dSskrll #define _REG_R24 24 351120ea0dSskrll #define _REG_R25 25 361120ea0dSskrll #define _REG_R26 26 371120ea0dSskrll #define _REG_R27 27 381120ea0dSskrll #define _REG_R28 28 391120ea0dSskrll #define _REG_R29 29 401120ea0dSskrll #define _REG_R30 30 411120ea0dSskrll #define _REG_R31 31 421120ea0dSskrll 430d86a5cdSchs #define _REG_PSW 0 440d86a5cdSchs #define _REG_RP 2 450d86a5cdSchs #define _REG_R19 19 460d86a5cdSchs #define _REG_ARG0 26 470d86a5cdSchs #define _REG_DP 27 480d86a5cdSchs #define _REG_RET0 28 490d86a5cdSchs #define _REG_SP 30 500d86a5cdSchs #define _REG_SAR 32 510d86a5cdSchs #define _REG_PCSQH 33 520d86a5cdSchs #define _REG_PCSQT 34 530d86a5cdSchs #define _REG_PCOQH 35 540d86a5cdSchs #define _REG_PCOQT 36 550d86a5cdSchs #define _REG_SR0 37 560d86a5cdSchs #define _REG_SR1 38 570d86a5cdSchs #define _REG_SR2 39 580d86a5cdSchs #define _REG_SR3 40 590d86a5cdSchs #define _REG_SR4 41 600d86a5cdSchs #define _REG_CR26 42 610d86a5cdSchs #define _REG_CR27 43 620d86a5cdSchs 630d86a5cdSchs #ifndef __ASSEMBLER__ 640d86a5cdSchs 650d86a5cdSchs typedef unsigned long __greg_t; 660d86a5cdSchs typedef __greg_t __gregset_t[_NGREG]; 670d86a5cdSchs 680d86a5cdSchs /* 690d86a5cdSchs * Floating point register state 700d86a5cdSchs */ 710d86a5cdSchs 720d86a5cdSchs typedef struct { 730d86a5cdSchs union { 740d86a5cdSchs unsigned long long __fp_regs[32]; 750d86a5cdSchs double __fp_dregs[32]; 760d86a5cdSchs } __fp_fr; 770d86a5cdSchs } __fpregset_t; 780d86a5cdSchs 790d86a5cdSchs typedef struct { 800d86a5cdSchs __gregset_t __gregs; 810d86a5cdSchs __fpregset_t __fpregs; 82e46cb5bfSchs } mcontext_t; 83e46cb5bfSchs 840d86a5cdSchs #define _UC_MACHINE_SP(uc) ((uc)->uc_mcontext.__gregs[_REG_SP]) 8584799695Skamil #define _UC_MACHINE_FP(uc) ((uc)->uc_mcontext.__gregs[3]) 860d86a5cdSchs #define _UC_MACHINE_PC(uc) ((uc)->uc_mcontext.__gregs[_REG_PCOQH]) 870d86a5cdSchs #define _UC_MACHINE_SET_PC(uc, pc) \ 880d86a5cdSchs do { \ 890d86a5cdSchs (uc)->uc_mcontext.__gregs[_REG_PCOQH] = (pc); \ 900d86a5cdSchs (uc)->uc_mcontext.__gregs[_REG_PCOQT] = (pc) + 4; \ 910d86a5cdSchs } while (/*CONSTCOND*/0) 92b81b72d9Skamil #define _UC_MACHINE_INTRV(uc) ((uc)->uc_mcontext.__gregs[_REG_RET0]) 93901da40cSthorpej 940d86a5cdSchs #endif /* !__ASSEMBLER__ */ 950d86a5cdSchs 961853c81aSthorpej #define _UC_SETSTACK _UC_MD_BIT16 971853c81aSthorpej #define _UC_CLRSTACK _UC_MD_BIT17 981853c81aSthorpej #define _UC_TLSBASE _UC_MD_BIT18 99e46cb5bfSchs 100e46cb5bfSchs #endif /* _HPPA_MCONTEXT_H_ */ 101