1*dbeed521Smacallan /* $NetBSD: bus_defs.h,v 1.3 2024/01/28 09:03:22 macallan Exp $ */ 26d3ceb1dSskrll 36d3ceb1dSskrll /* $OpenBSD: bus.h,v 1.13 2001/07/30 14:15:59 art Exp $ */ 46d3ceb1dSskrll 56d3ceb1dSskrll /* 66d3ceb1dSskrll * Copyright (c) 1998-2004 Michael Shalayeff 76d3ceb1dSskrll * All rights reserved. 86d3ceb1dSskrll * 96d3ceb1dSskrll * Redistribution and use in source and binary forms, with or without 106d3ceb1dSskrll * modification, are permitted provided that the following conditions 116d3ceb1dSskrll * are met: 126d3ceb1dSskrll * 1. Redistributions of source code must retain the above copyright 136d3ceb1dSskrll * notice, this list of conditions and the following disclaimer. 146d3ceb1dSskrll * 2. Redistributions in binary form must reproduce the above copyright 156d3ceb1dSskrll * notice, this list of conditions and the following disclaimer in the 166d3ceb1dSskrll * documentation and/or other materials provided with the distribution. 176d3ceb1dSskrll * 186d3ceb1dSskrll * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 196d3ceb1dSskrll * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 206d3ceb1dSskrll * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 216d3ceb1dSskrll * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT, 226d3ceb1dSskrll * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 236d3ceb1dSskrll * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 246d3ceb1dSskrll * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 256d3ceb1dSskrll * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 266d3ceb1dSskrll * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 276d3ceb1dSskrll * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 286d3ceb1dSskrll * THE POSSIBILITY OF SUCH DAMAGE. 296d3ceb1dSskrll */ 306d3ceb1dSskrll 316d3ceb1dSskrll 326d3ceb1dSskrll #ifndef _MACHINE_BUS_DEFS_H_ 336d3ceb1dSskrll #define _MACHINE_BUS_DEFS_H_ 346d3ceb1dSskrll 356d3ceb1dSskrll #include <machine/cpufunc.h> 366d3ceb1dSskrll 376d3ceb1dSskrll /* 386d3ceb1dSskrll * Bus address and size types. 396d3ceb1dSskrll */ 406d3ceb1dSskrll typedef u_long bus_addr_t; 416d3ceb1dSskrll typedef u_long bus_size_t; 42bf158e33Sskrll 43bf158e33Sskrll #define PRIxBUSADDR "lx" 44bf158e33Sskrll #define PRIxBUSSIZE "lx" 45bf158e33Sskrll #define PRIuBUSSIZE "lu" 46bf158e33Sskrll 476d3ceb1dSskrll typedef u_long bus_space_handle_t; 486d3ceb1dSskrll 49bf158e33Sskrll #define PRIxBSH "lx" 50bf158e33Sskrll 516d3ceb1dSskrll struct hppa_bus_space_tag { 526d3ceb1dSskrll void *hbt_cookie; 536d3ceb1dSskrll 546d3ceb1dSskrll int (*hbt_map)(void *v, bus_addr_t addr, bus_size_t size, 556d3ceb1dSskrll int flags, bus_space_handle_t *bshp); 566d3ceb1dSskrll void (*hbt_unmap)(void *v, bus_space_handle_t bsh, 576d3ceb1dSskrll bus_size_t size); 586d3ceb1dSskrll int (*hbt_subregion)(void *v, bus_space_handle_t bsh, 596d3ceb1dSskrll bus_size_t offset, bus_size_t size, 606d3ceb1dSskrll bus_space_handle_t *nbshp); 616d3ceb1dSskrll int (*hbt_alloc)(void *v, bus_addr_t rstart, bus_addr_t rend, 626d3ceb1dSskrll bus_size_t size, bus_size_t align, 636d3ceb1dSskrll bus_size_t boundary, int flags, 646d3ceb1dSskrll bus_addr_t *addrp, bus_space_handle_t *bshp); 656d3ceb1dSskrll void (*hbt_free)(void *, bus_space_handle_t, bus_size_t); 666d3ceb1dSskrll void (*hbt_barrier)(void *v, bus_space_handle_t h, 676d3ceb1dSskrll bus_size_t o, bus_size_t l, int op); 686d3ceb1dSskrll void *(*hbt_vaddr)(void *, bus_space_handle_t); 696d3ceb1dSskrll paddr_t (*hbt_mmap)(void *, bus_addr_t, off_t, int, int); 706d3ceb1dSskrll 716d3ceb1dSskrll uint8_t (*hbt_r1)(void *, bus_space_handle_t, bus_size_t); 726d3ceb1dSskrll uint16_t (*hbt_r2)(void *, bus_space_handle_t, bus_size_t); 736d3ceb1dSskrll uint32_t (*hbt_r4)(void *, bus_space_handle_t, bus_size_t); 746d3ceb1dSskrll uint64_t (*hbt_r8)(void *, bus_space_handle_t, bus_size_t); 756d3ceb1dSskrll 76*dbeed521Smacallan uint16_t (*hbt_rs2)(void *, bus_space_handle_t, bus_size_t); 77*dbeed521Smacallan uint32_t (*hbt_rs4)(void *, bus_space_handle_t, bus_size_t); 78*dbeed521Smacallan uint64_t (*hbt_rs8)(void *, bus_space_handle_t, bus_size_t); 79*dbeed521Smacallan 806d3ceb1dSskrll void (*hbt_w1)(void *, bus_space_handle_t, bus_size_t, uint8_t); 816d3ceb1dSskrll void (*hbt_w2)(void *, bus_space_handle_t, bus_size_t, uint16_t); 826d3ceb1dSskrll void (*hbt_w4)(void *, bus_space_handle_t, bus_size_t, uint32_t); 836d3ceb1dSskrll void (*hbt_w8)(void *, bus_space_handle_t, bus_size_t, uint64_t); 846d3ceb1dSskrll 85*dbeed521Smacallan void (*hbt_ws2)(void *, bus_space_handle_t, bus_size_t, uint16_t); 86*dbeed521Smacallan void (*hbt_ws4)(void *, bus_space_handle_t, bus_size_t, uint32_t); 87*dbeed521Smacallan void (*hbt_ws8)(void *, bus_space_handle_t, bus_size_t, uint64_t); 88*dbeed521Smacallan 896d3ceb1dSskrll void (*hbt_rm_1)(void *v, bus_space_handle_t h, 906d3ceb1dSskrll bus_size_t o, uint8_t *a, bus_size_t c); 916d3ceb1dSskrll void (*hbt_rm_2)(void *v, bus_space_handle_t h, 926d3ceb1dSskrll bus_size_t o, uint16_t *a, bus_size_t c); 936d3ceb1dSskrll void (*hbt_rm_4)(void *v, bus_space_handle_t h, 946d3ceb1dSskrll bus_size_t o, uint32_t *a, bus_size_t c); 956d3ceb1dSskrll void (*hbt_rm_8)(void *v, bus_space_handle_t h, 966d3ceb1dSskrll bus_size_t o, uint64_t *a, bus_size_t c); 976d3ceb1dSskrll 986d3ceb1dSskrll void (*hbt_wm_1)(void *v, bus_space_handle_t h, bus_size_t o, 996d3ceb1dSskrll const uint8_t *a, bus_size_t c); 1006d3ceb1dSskrll void (*hbt_wm_2)(void *v, bus_space_handle_t h, bus_size_t o, 1016d3ceb1dSskrll const uint16_t *a, bus_size_t c); 1026d3ceb1dSskrll void (*hbt_wm_4)(void *v, bus_space_handle_t h, bus_size_t o, 1036d3ceb1dSskrll const uint32_t *a, bus_size_t c); 1046d3ceb1dSskrll void (*hbt_wm_8)(void *v, bus_space_handle_t h, bus_size_t o, 1056d3ceb1dSskrll const uint64_t *a, bus_size_t c); 1066d3ceb1dSskrll 1076d3ceb1dSskrll void (*hbt_sm_1)(void *v, bus_space_handle_t h, bus_size_t o, 1086d3ceb1dSskrll uint8_t vv, bus_size_t c); 1096d3ceb1dSskrll void (*hbt_sm_2)(void *v, bus_space_handle_t h, bus_size_t o, 1106d3ceb1dSskrll uint16_t vv, bus_size_t c); 1116d3ceb1dSskrll void (*hbt_sm_4)(void *v, bus_space_handle_t h, bus_size_t o, 1126d3ceb1dSskrll uint32_t vv, bus_size_t c); 1136d3ceb1dSskrll void (*hbt_sm_8)(void *v, bus_space_handle_t h, bus_size_t o, 1146d3ceb1dSskrll uint64_t vv, bus_size_t c); 1156d3ceb1dSskrll 1166d3ceb1dSskrll void (*hbt_rrm_2)(void *v, bus_space_handle_t h, 1176d3ceb1dSskrll bus_size_t o, uint16_t *a, bus_size_t c); 1186d3ceb1dSskrll void (*hbt_rrm_4)(void *v, bus_space_handle_t h, 1196d3ceb1dSskrll bus_size_t o, uint32_t *a, bus_size_t c); 1206d3ceb1dSskrll void (*hbt_rrm_8)(void *v, bus_space_handle_t h, 1216d3ceb1dSskrll bus_size_t o, uint64_t *a, bus_size_t c); 1226d3ceb1dSskrll 1236d3ceb1dSskrll void (*hbt_wrm_2)(void *v, bus_space_handle_t h, 1246d3ceb1dSskrll bus_size_t o, const uint16_t *a, bus_size_t c); 1256d3ceb1dSskrll void (*hbt_wrm_4)(void *v, bus_space_handle_t h, 1266d3ceb1dSskrll bus_size_t o, const uint32_t *a, bus_size_t c); 1276d3ceb1dSskrll void (*hbt_wrm_8)(void *v, bus_space_handle_t h, 1286d3ceb1dSskrll bus_size_t o, const uint64_t *a, bus_size_t c); 1296d3ceb1dSskrll 1306d3ceb1dSskrll void (*hbt_rr_1)(void *v, bus_space_handle_t h, 1316d3ceb1dSskrll bus_size_t o, uint8_t *a, bus_size_t c); 1326d3ceb1dSskrll void (*hbt_rr_2)(void *v, bus_space_handle_t h, 1336d3ceb1dSskrll bus_size_t o, uint16_t *a, bus_size_t c); 1346d3ceb1dSskrll void (*hbt_rr_4)(void *v, bus_space_handle_t h, 1356d3ceb1dSskrll bus_size_t o, uint32_t *a, bus_size_t c); 1366d3ceb1dSskrll void (*hbt_rr_8)(void *v, bus_space_handle_t h, 1376d3ceb1dSskrll bus_size_t o, uint64_t *a, bus_size_t c); 1386d3ceb1dSskrll 1396d3ceb1dSskrll void (*hbt_wr_1)(void *v, bus_space_handle_t h, 1406d3ceb1dSskrll bus_size_t o, const uint8_t *a, bus_size_t c); 1416d3ceb1dSskrll void (*hbt_wr_2)(void *v, bus_space_handle_t h, 1426d3ceb1dSskrll bus_size_t o, const uint16_t *a, bus_size_t c); 1436d3ceb1dSskrll void (*hbt_wr_4)(void *v, bus_space_handle_t h, 1446d3ceb1dSskrll bus_size_t o, const uint32_t *a, bus_size_t c); 1456d3ceb1dSskrll void (*hbt_wr_8)(void *v, bus_space_handle_t h, 1466d3ceb1dSskrll bus_size_t o, const uint64_t *a, bus_size_t c); 1476d3ceb1dSskrll 1486d3ceb1dSskrll void (*hbt_rrr_2)(void *v, bus_space_handle_t h, 1496d3ceb1dSskrll bus_size_t o, uint16_t *a, bus_size_t c); 1506d3ceb1dSskrll void (*hbt_rrr_4)(void *v, bus_space_handle_t h, 1516d3ceb1dSskrll bus_size_t o, uint32_t *a, bus_size_t c); 1526d3ceb1dSskrll void (*hbt_rrr_8)(void *v, bus_space_handle_t h, 1536d3ceb1dSskrll bus_size_t o, uint64_t *a, bus_size_t c); 1546d3ceb1dSskrll 1556d3ceb1dSskrll void (*hbt_wrr_2)(void *v, bus_space_handle_t h, 1566d3ceb1dSskrll bus_size_t o, const uint16_t *a, bus_size_t c); 1576d3ceb1dSskrll void (*hbt_wrr_4)(void *v, bus_space_handle_t h, 1586d3ceb1dSskrll bus_size_t o, const uint32_t *a, bus_size_t c); 1596d3ceb1dSskrll void (*hbt_wrr_8)(void *v, bus_space_handle_t h, 1606d3ceb1dSskrll bus_size_t o, const uint64_t *a, bus_size_t c); 1616d3ceb1dSskrll 1626d3ceb1dSskrll void (*hbt_sr_1)(void *v, bus_space_handle_t h, 1636d3ceb1dSskrll bus_size_t o, uint8_t vv, bus_size_t c); 1646d3ceb1dSskrll void (*hbt_sr_2)(void *v, bus_space_handle_t h, 1656d3ceb1dSskrll bus_size_t o, uint16_t vv, bus_size_t c); 1666d3ceb1dSskrll void (*hbt_sr_4)(void *v, bus_space_handle_t h, 1676d3ceb1dSskrll bus_size_t o, uint32_t vv, bus_size_t c); 1686d3ceb1dSskrll void (*hbt_sr_8)(void *v, bus_space_handle_t h, 1696d3ceb1dSskrll bus_size_t o, uint64_t vv, bus_size_t c); 1706d3ceb1dSskrll 1716d3ceb1dSskrll void (*hbt_cp_1)(void *v, bus_space_handle_t h1, bus_size_t o1, 1726d3ceb1dSskrll bus_space_handle_t h2, bus_size_t o2, bus_size_t c); 1736d3ceb1dSskrll void (*hbt_cp_2)(void *v, bus_space_handle_t h1, bus_size_t o1, 1746d3ceb1dSskrll bus_space_handle_t h2, bus_size_t o2, bus_size_t c); 1756d3ceb1dSskrll void (*hbt_cp_4)(void *v, bus_space_handle_t h1, bus_size_t o1, 1766d3ceb1dSskrll bus_space_handle_t h2, bus_size_t o2, bus_size_t c); 1776d3ceb1dSskrll void (*hbt_cp_8)(void *v, bus_space_handle_t h1, bus_size_t o1, 1786d3ceb1dSskrll bus_space_handle_t h2, bus_size_t o2, bus_size_t c); 1796d3ceb1dSskrll }; 1806d3ceb1dSskrll typedef const struct hppa_bus_space_tag *bus_space_tag_t; 1816d3ceb1dSskrll 1826d3ceb1dSskrll /* flags for bus space map functions */ 1836d3ceb1dSskrll #define BUS_SPACE_MAP_READONLY 0x0008 1846d3ceb1dSskrll #define BUS_SPACE_MAP_NOEXTENT 0x8000 /* no extent ops */ 1856d3ceb1dSskrll 1866d3ceb1dSskrll 1876d3ceb1dSskrll /* bus access routines */ 1886d3ceb1dSskrll #define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t) 1896d3ceb1dSskrll 1906d3ceb1dSskrll /* XXX fredette */ 1916d3ceb1dSskrll #define __BUS_SPACE_HAS_STREAM_METHODS 1926d3ceb1dSskrll 1936d3ceb1dSskrll #define BUS_DMA_WAITOK 0x000 /* safe to sleep (pseudo-flag) */ 1946d3ceb1dSskrll #define BUS_DMA_NOWAIT 0x001 /* not safe to sleep */ 1956d3ceb1dSskrll #define BUS_DMA_ALLOCNOW 0x002 /* perform resource allocation now */ 1966d3ceb1dSskrll #define BUS_DMA_COHERENT 0x004 /* hint: map memory DMA coherent */ 1976d3ceb1dSskrll #define BUS_DMA_STREAMING 0x008 /* hint: sequential, unidirectional */ 1986d3ceb1dSskrll #define BUS_DMA_BUS1 0x010 /* placeholders for bus functions... */ 1996d3ceb1dSskrll #define BUS_DMA_BUS2 0x020 2006d3ceb1dSskrll #define BUS_DMA_BUS3 0x040 2016d3ceb1dSskrll #define BUS_DMA_BUS4 0x080 2026d3ceb1dSskrll #define BUS_DMA_READ 0x100 /* mapping is device -> memory only */ 2036d3ceb1dSskrll #define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */ 2046d3ceb1dSskrll #define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */ 2056d3ceb1dSskrll 2066d3ceb1dSskrll /* For devices that have a 24-bit address space */ 2076d3ceb1dSskrll #define BUS_DMA_24BIT BUS_DMA_BUS1 2086d3ceb1dSskrll 2096d3ceb1dSskrll /* Forwards needed by prototypes below. */ 2106d3ceb1dSskrll struct mbuf; 2116d3ceb1dSskrll struct proc; 2126d3ceb1dSskrll struct uio; 2136d3ceb1dSskrll 2146d3ceb1dSskrll typedef const struct hppa_bus_dma_tag *bus_dma_tag_t; 2156d3ceb1dSskrll typedef struct hppa_bus_dmamap *bus_dmamap_t; 2166d3ceb1dSskrll 2176d3ceb1dSskrll #define BUS_DMA_TAG_VALID(t) ((t) != (bus_dma_tag_t)0) 2186d3ceb1dSskrll 2196d3ceb1dSskrll /* 2206d3ceb1dSskrll * bus_dma_segment_t 2216d3ceb1dSskrll * 2226d3ceb1dSskrll * Describes a single contiguous DMA transaction. Values 2236d3ceb1dSskrll * are suitable for programming into DMA registers. 2246d3ceb1dSskrll */ 2256d3ceb1dSskrll struct hppa_bus_dma_segment { 2266d3ceb1dSskrll bus_addr_t ds_addr; /* DMA address */ 2276d3ceb1dSskrll bus_size_t ds_len; /* length of transfer */ 2286d3ceb1dSskrll void *_ds_mlist; /* page list when dmamem_alloc'ed */ 2296d3ceb1dSskrll vaddr_t _ds_va; /* VA when dmamem_map'ed */ 2306d3ceb1dSskrll }; 2316d3ceb1dSskrll typedef struct hppa_bus_dma_segment bus_dma_segment_t; 2326d3ceb1dSskrll 2336d3ceb1dSskrll /* 2346d3ceb1dSskrll * bus_dma_tag_t 2356d3ceb1dSskrll * 2366d3ceb1dSskrll * A machine-dependent opaque type describing the implementation of 2376d3ceb1dSskrll * DMA for a given bus. 2386d3ceb1dSskrll */ 2396d3ceb1dSskrll 2406d3ceb1dSskrll struct hppa_bus_dma_tag { 2416d3ceb1dSskrll void *_cookie; /* cookie used in the guts */ 2426d3ceb1dSskrll 2436d3ceb1dSskrll /* 2446d3ceb1dSskrll * DMA mapping methods. 2456d3ceb1dSskrll */ 2466d3ceb1dSskrll int (*_dmamap_create)(void *, bus_size_t, int, 2476d3ceb1dSskrll bus_size_t, bus_size_t, int, bus_dmamap_t *); 2486d3ceb1dSskrll void (*_dmamap_destroy)(void *, bus_dmamap_t); 2496d3ceb1dSskrll int (*_dmamap_load)(void *, bus_dmamap_t, void *, 2506d3ceb1dSskrll bus_size_t, struct proc *, int); 2516d3ceb1dSskrll int (*_dmamap_load_mbuf)(void *, bus_dmamap_t, 2526d3ceb1dSskrll struct mbuf *, int); 2536d3ceb1dSskrll int (*_dmamap_load_uio)(void *, bus_dmamap_t, 2546d3ceb1dSskrll struct uio *, int); 2556d3ceb1dSskrll int (*_dmamap_load_raw)(void *, bus_dmamap_t, 2566d3ceb1dSskrll bus_dma_segment_t *, int, bus_size_t, int); 2576d3ceb1dSskrll void (*_dmamap_unload)(void *, bus_dmamap_t); 2586d3ceb1dSskrll void (*_dmamap_sync)(void *, bus_dmamap_t, bus_addr_t, bus_size_t, int); 2596d3ceb1dSskrll 2606d3ceb1dSskrll /* 2616d3ceb1dSskrll * DMA memory utility functions. 2626d3ceb1dSskrll */ 2636d3ceb1dSskrll int (*_dmamem_alloc)(void *, bus_size_t, bus_size_t, 2646d3ceb1dSskrll bus_size_t, bus_dma_segment_t *, int, int *, int); 2656d3ceb1dSskrll void (*_dmamem_free)(void *, bus_dma_segment_t *, int); 2666d3ceb1dSskrll int (*_dmamem_map)(void *, bus_dma_segment_t *, 2676d3ceb1dSskrll int, size_t, void **, int); 2686d3ceb1dSskrll void (*_dmamem_unmap)(void *, void *, size_t); 2696d3ceb1dSskrll paddr_t (*_dmamem_mmap)(void *, bus_dma_segment_t *, 2706d3ceb1dSskrll int, off_t, int, int); 2716d3ceb1dSskrll }; 2726d3ceb1dSskrll 2736d3ceb1dSskrll /* 2746d3ceb1dSskrll * bus_dmamap_t 2756d3ceb1dSskrll * 2766d3ceb1dSskrll * Describes a DMA mapping. 2776d3ceb1dSskrll */ 2786d3ceb1dSskrll struct hppa_bus_dmamap { 2796d3ceb1dSskrll /* 2806d3ceb1dSskrll * PRIVATE MEMBERS: not for use by machine-independent code. 2816d3ceb1dSskrll */ 2826d3ceb1dSskrll bus_size_t _dm_size; /* largest DMA transfer mappable */ 2836d3ceb1dSskrll int _dm_segcnt; /* number of segs this map can map */ 2846d3ceb1dSskrll bus_size_t _dm_maxsegsz; /* fixed largest possible segment */ 2856d3ceb1dSskrll bus_size_t _dm_boundary; /* don't cross this */ 2866d3ceb1dSskrll int _dm_flags; /* misc. flags */ 2876d3ceb1dSskrll 2886d3ceb1dSskrll void *_dm_cookie; /* cookie for bus-specific functions */ 2896d3ceb1dSskrll 2906d3ceb1dSskrll /* 2916d3ceb1dSskrll * PUBLIC MEMBERS: these are used by machine-independent code. 2926d3ceb1dSskrll */ 2936d3ceb1dSskrll bus_size_t dm_maxsegsz; /* largest possible segment */ 2946d3ceb1dSskrll bus_size_t dm_mapsize; /* size of the mapping */ 2956d3ceb1dSskrll int dm_nsegs; /* # valid segments in mapping */ 2966d3ceb1dSskrll bus_dma_segment_t dm_segs[1]; /* segments; variable length */ 2976d3ceb1dSskrll }; 2986d3ceb1dSskrll 2996d3ceb1dSskrll #endif /* _MACHINE_BUS_DEFS_H_ */ 300