xref: /netbsd-src/sys/arch/hpc/stand/hpcboot/sh3/dev/sh_dev.cpp (revision ce099b40997c43048fb78bd578195f81d2456523)
1*ce099b40Smartin /* -*-C++-*-	$NetBSD: sh_dev.cpp,v 1.5 2008/04/28 20:23:20 martin Exp $	*/
2acb09f98Such 
3acb09f98Such /*-
4acb09f98Such  * Copyright (c) 2002 The NetBSD Foundation, Inc.
5acb09f98Such  * All rights reserved.
6acb09f98Such  *
7acb09f98Such  * This code is derived from software contributed to The NetBSD Foundation
8acb09f98Such  * by UCHIYAMA Yasushi.
9acb09f98Such  *
10acb09f98Such  * Redistribution and use in source and binary forms, with or without
11acb09f98Such  * modification, are permitted provided that the following conditions
12acb09f98Such  * are met:
13acb09f98Such  * 1. Redistributions of source code must retain the above copyright
14acb09f98Such  *    notice, this list of conditions and the following disclaimer.
15acb09f98Such  * 2. Redistributions in binary form must reproduce the above copyright
16acb09f98Such  *    notice, this list of conditions and the following disclaimer in the
17acb09f98Such  *    documentation and/or other materials provided with the distribution.
18acb09f98Such  *
19acb09f98Such  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20acb09f98Such  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21acb09f98Such  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22acb09f98Such  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23acb09f98Such  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24acb09f98Such  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25acb09f98Such  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26acb09f98Such  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27acb09f98Such  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28acb09f98Such  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29acb09f98Such  * POSSIBILITY OF SUCH DAMAGE.
30acb09f98Such  */
31acb09f98Such 
32acb09f98Such #include <hpcboot.h>
33acb09f98Such #include <hpcmenu.h>
34acb09f98Such #include <console.h>
35acb09f98Such 
36acb09f98Such #include <sh3/sh_mmu.h>
37acb09f98Such #include <sh3/dev/sh_dev.h>
38acb09f98Such 
39acb09f98Such #include <sh3/dev/sh.h>
40acb09f98Such 
SHdev()41acb09f98Such SHdev::SHdev()
42acb09f98Such {
43acb09f98Such 
44acb09f98Such 	_menu = &HpcMenuInterface::Instance();
45acb09f98Such 	_cons = Console::Instance();
46acb09f98Such }
47acb09f98Such 
48acb09f98Such void
dump(uint8_t bit)4924c8a902Suwe SHdev::dump(uint8_t bit)
50acb09f98Such {
5124c8a902Suwe 	uint32_t reg = 0;
52acb09f98Such 	int kmode;
53acb09f98Such 
54acb09f98Such 	DPRINTF((TEXT("DEBUG BIT: ")));
55acb09f98Such 	bitdisp(bit);
56acb09f98Such 
57acb09f98Such 	if (bit & DUMP_CPU) {
58acb09f98Such 		// Cache
59acb09f98Such 		MemoryManager_SHMMU::CacheDump();
60acb09f98Such 		// MMU
61acb09f98Such 		MemoryManager_SHMMU::MMUDump();
62acb09f98Such 		// Status register
63acb09f98Such 		kmode = SetKMode(1);
64acb09f98Such 		__asm(
65acb09f98Such 			"stc	sr, r0\n"
66acb09f98Such 			"mov.l	r0, @r4", &reg);
67acb09f98Such 		SetKMode(kmode);
68acb09f98Such 		DPRINTF((TEXT("SR: ")));
69acb09f98Such 		bitdisp(reg);
70acb09f98Such 	}
71acb09f98Such 
72acb09f98Such 	if (bit & DUMP_DEV) {
73acb09f98Such 		kmode = SetKMode(1);
74acb09f98Such 		print_stack_pointer();
75acb09f98Such 		// SCIF
76acb09f98Such 		scif_dump(HPC_PREFERENCE.serial_speed);
77acb09f98Such 		SetKMode(kmode);
78acb09f98Such 	}
79acb09f98Such }
80acb09f98Such 
81acb09f98Such void
print_stack_pointer(void)82acb09f98Such SHdev::print_stack_pointer(void)
83acb09f98Such {
84acb09f98Such 	int sp;
85acb09f98Such 
86acb09f98Such 	__asm("mov.l	r15, @r4", &sp);
87acb09f98Such 	DPRINTF((TEXT("SP 0x%08x\n"), sp));
88acb09f98Such }
89acb09f98Such 
90acb09f98Such //
91acb09f98Such // SH3/SH4 common functions.
92acb09f98Such //
93acb09f98Such // SCIF
94acb09f98Such void
scif_dump(int bps)95acb09f98Such SHdev::scif_dump(int bps)
96acb09f98Such {
9724c8a902Suwe 	uint16_t r16;
9824c8a902Suwe 	uint32_t r;
99acb09f98Such 	int n;
100acb09f98Such 
101acb09f98Such 	print_stack_pointer();
102acb09f98Such 	DPRINTF((TEXT("<<<SCIF>>>\n")));
103acb09f98Such 	/* mode */
104acb09f98Such 	r = _scif_reg_read(SH3_SCSMR2);
105acb09f98Such 	n = 1 << ((r & SCSMR2_CKS) << 1);
106acb09f98Such 	DPRINTF((TEXT("mode: %dbit %S-parity %d stop bit clock PCLOCK/%d\n"),
107acb09f98Such 	    r & SCSMR2_CHR ? 7 : 8,
108acb09f98Such 	    r & SCSMR2_PE  ? r & SCSMR2_OE ? "odd" : "even" : "non",
109acb09f98Such 	    r & SCSMR2_STOP ? 2 : 1,
110acb09f98Such 	    n));
111acb09f98Such 	/* bit rate */
112acb09f98Such 	r = _scif_reg_read(SH3_SCBRR2);
113acb09f98Such 	DPRINTF((TEXT("SCBRR=%d(%dbps) estimated PCLOCK %dHz\n"), r, bps,
114acb09f98Such 	    32 * bps *(r + 1) * n));
115acb09f98Such 
116acb09f98Such 	/* control */
117acb09f98Such #define	DBG_BIT_PRINT(r, m)	_dbg_bit_print(r, SCSCR2_##m, #m)
118acb09f98Such 	DPRINTF((TEXT("SCSCR2: ")));
119acb09f98Such 	r = _scif_reg_read(SH3_SCSCR2);
120acb09f98Such 	DBG_BIT_PRINT(r, TIE);
121acb09f98Such 	DBG_BIT_PRINT(r, RIE);
122acb09f98Such 	DBG_BIT_PRINT(r, TE);
123acb09f98Such 	DBG_BIT_PRINT(r, RE);
124acb09f98Such 	DPRINTF((TEXT("CKE=%d\n"), r & SCSCR2_CKE));
125acb09f98Such #undef	DBG_BIT_PRINT
126acb09f98Such 
127acb09f98Such 	/* status */
128acb09f98Such #define	DBG_BIT_PRINT(r, m)	_dbg_bit_print(r, SCSSR2_##m, #m)
129acb09f98Such 	r16 = _reg_read_2(SH3_SCSSR2);
130acb09f98Such 	DPRINTF((TEXT("SCSSR2: ")));
131acb09f98Such 	DBG_BIT_PRINT(r16, ER);
132acb09f98Such 	DBG_BIT_PRINT(r16, TEND);
133acb09f98Such 	DBG_BIT_PRINT(r16, TDFE);
134acb09f98Such 	DBG_BIT_PRINT(r16, BRK);
135acb09f98Such 	DBG_BIT_PRINT(r16, FER);
136acb09f98Such 	DBG_BIT_PRINT(r16, PER);
137acb09f98Such 	DBG_BIT_PRINT(r16, RDF);
138acb09f98Such 	DBG_BIT_PRINT(r16, DR);
139acb09f98Such #undef	DBG_BIT_PRINT
140acb09f98Such 
141acb09f98Such 	/* FIFO control */
142acb09f98Such #define	DBG_BIT_PRINT(r, m)	_dbg_bit_print(r, SCFCR2_##m, #m)
143acb09f98Such 	r = _scif_reg_read(SH3_SCFCR2);
144acb09f98Such 	DPRINTF((TEXT("SCFCR2: ")));
145acb09f98Such 	DBG_BIT_PRINT(r, RTRG1);
146acb09f98Such 	DBG_BIT_PRINT(r, RTRG0);
147acb09f98Such 	DBG_BIT_PRINT(r, TTRG1);
148acb09f98Such 	DBG_BIT_PRINT(r, TTRG0);
149acb09f98Such 	DBG_BIT_PRINT(r, MCE);
150acb09f98Such 	DBG_BIT_PRINT(r, TFRST);
151acb09f98Such 	DBG_BIT_PRINT(r, RFRST);
152acb09f98Such 	DBG_BIT_PRINT(r, LOOP);
153acb09f98Such 	DPRINTF((TEXT("\n")));
154acb09f98Such #undef	DBG_BIT_PRINT
155acb09f98Such }
156acb09f98Such 
157acb09f98Such // INTC
158acb09f98Such void
icu_dump_priority(struct intr_priority * tab)159acb09f98Such SHdev::icu_dump_priority(struct intr_priority *tab)
160acb09f98Such {
161acb09f98Such 
162acb09f98Such 	DPRINTF((TEXT("<<<INTC>>>\n")));
163acb09f98Such 
164acb09f98Such 	DPRINTF((TEXT("----interrupt priority----\n")));
165acb09f98Such 	for (; tab->name; tab++) {
166acb09f98Such 		DPRINTF((TEXT("%-10S %d\n"), tab->name,
167acb09f98Such 		    (_reg_read_2(tab->reg) >> tab->shift) & SH_IPR_MASK));
168acb09f98Such 	}
169acb09f98Such 	DPRINTF((TEXT("--------------------------\n")));
170acb09f98Such }
171acb09f98Such 
172