xref: /netbsd-src/sys/arch/hpc/stand/hpcboot/sh3/cpu/7750.h (revision ce099b40997c43048fb78bd578195f81d2456523)
1*ce099b40Smartin /*	$NetBSD: 7750.h,v 1.5 2008/04/28 20:23:20 martin Exp $	*/
2acb09f98Such 
3acb09f98Such /*-
4acb09f98Such  * Copyright (c) 2002 The NetBSD Foundation, Inc.
5acb09f98Such  * All rights reserved.
6acb09f98Such  *
7acb09f98Such  * This code is derived from software contributed to The NetBSD Foundation
8acb09f98Such  * by UCHIYAMA Yasushi.
9acb09f98Such  *
10acb09f98Such  * Redistribution and use in source and binary forms, with or without
11acb09f98Such  * modification, are permitted provided that the following conditions
12acb09f98Such  * are met:
13acb09f98Such  * 1. Redistributions of source code must retain the above copyright
14acb09f98Such  *    notice, this list of conditions and the following disclaimer.
15acb09f98Such  * 2. Redistributions in binary form must reproduce the above copyright
16acb09f98Such  *    notice, this list of conditions and the following disclaimer in the
17acb09f98Such  *    documentation and/or other materials provided with the distribution.
18acb09f98Such  *
19acb09f98Such  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20acb09f98Such  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21acb09f98Such  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22acb09f98Such  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23acb09f98Such  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24acb09f98Such  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25acb09f98Such  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26acb09f98Such  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27acb09f98Such  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28acb09f98Such  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29acb09f98Such  * POSSIBILITY OF SUCH DAMAGE.
30acb09f98Such  */
31acb09f98Such 
32acb09f98Such #ifndef _HPCBOOT_SH_CPU_7750_H_
33acb09f98Such #define	_HPCBOOT_SH_CPU_7750_H_
34acb09f98Such 
35acb09f98Such #define	SH7750_CACHE_FLUSH()						\
36acb09f98Such __BEGIN_MACRO								\
3724c8a902Suwe 	uint32_t __e, __a;						\
38acb09f98Such 									\
39acb09f98Such 	/* D-cache */							\
40acb09f98Such 	for (__e = 0; __e < (SH4_DCACHE_SIZE / SH4_CACHE_LINESZ); __e++) {\
41acb09f98Such 		__a = SH4REG_CCDA | (__e << CCDA_ENTRY_SHIFT);		\
42acb09f98Such 		VOLATILE_REF(__a) &= ~(CCDA_U | CCDA_V);		\
43acb09f98Such 	}								\
44acb09f98Such 	/* I-cache  */							\
45acb09f98Such 	for (__e = 0; __e < (SH4_ICACHE_SIZE / SH4_CACHE_LINESZ); __e++) {\
46acb09f98Such 		__a = SH4REG_CCIA | (__e << CCIA_ENTRY_SHIFT);		\
47acb09f98Such 		VOLATILE_REF(__a) &= ~(CCIA_V);				\
48acb09f98Such 	}								\
49acb09f98Such __END_MACRO
50acb09f98Such 
51acb09f98Such #define	SH7750_MMU_DISABLE	SH4_MMU_DISABLE
52acb09f98Such 
53acb09f98Such #endif // _HPCBOOT_SH_CPU_7750_H_
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