1*ce099b40Smartin /* $NetBSD: 7709.h,v 1.5 2008/04/28 20:23:20 martin Exp $ */ 2acb09f98Such 3acb09f98Such /*- 4acb09f98Such * Copyright (c) 2001, 2002 The NetBSD Foundation, Inc. 5acb09f98Such * All rights reserved. 6acb09f98Such * 7acb09f98Such * This code is derived from software contributed to The NetBSD Foundation 8acb09f98Such * by UCHIYAMA Yasushi. 9acb09f98Such * 10acb09f98Such * Redistribution and use in source and binary forms, with or without 11acb09f98Such * modification, are permitted provided that the following conditions 12acb09f98Such * are met: 13acb09f98Such * 1. Redistributions of source code must retain the above copyright 14acb09f98Such * notice, this list of conditions and the following disclaimer. 15acb09f98Such * 2. Redistributions in binary form must reproduce the above copyright 16acb09f98Such * notice, this list of conditions and the following disclaimer in the 17acb09f98Such * documentation and/or other materials provided with the distribution. 18acb09f98Such * 19acb09f98Such * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20acb09f98Such * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21acb09f98Such * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22acb09f98Such * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23acb09f98Such * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24acb09f98Such * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25acb09f98Such * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26acb09f98Such * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27acb09f98Such * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28acb09f98Such * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29acb09f98Such * POSSIBILITY OF SUCH DAMAGE. 30acb09f98Such */ 31acb09f98Such 32acb09f98Such #ifndef _HPCBOOT_SH_CPU_7709_H_ 33acb09f98Such #define _HPCBOOT_SH_CPU_7709_H_ 34acb09f98Such 35acb09f98Such #define SH7709_CACHE_LINESZ 16 36acb09f98Such #define SH7709_CACHE_ENTRY 128 37acb09f98Such #define SH7709_CACHE_WAY 4 38acb09f98Such #define SH7709_CACHE_SIZE \ 39acb09f98Such (SH7709_CACHE_LINESZ * SH7709_CACHE_ENTRY * SH7709_CACHE_WAY) 40acb09f98Such 41acb09f98Such #define SH7709_CACHE_ENTRY_SHIFT 4 42acb09f98Such #define SH7709_CACHE_ENTRY_MASK 0x000007f0 43acb09f98Such #define SH7709_CACHE_WAY_SHIFT 11 44acb09f98Such #define SH7709_CACHE_WAY_MASK 0x00001800 45acb09f98Such 46acb09f98Such #define SH7709_CACHE_FLUSH() \ 47acb09f98Such __BEGIN_MACRO \ 4824c8a902Suwe uint32_t __e, __w, __wa, __a; \ 49acb09f98Such \ 50acb09f98Such for (__w = 0; __w < SH7709_CACHE_WAY; __w++) { \ 51acb09f98Such __wa = SH3_CCA | __w << SH7709_CACHE_WAY_SHIFT; \ 52acb09f98Such for (__e = 0; __e < SH7709_CACHE_ENTRY; __e++) { \ 53acb09f98Such __a = __wa |(__e << SH7709_CACHE_ENTRY_SHIFT); \ 54acb09f98Such _reg_read_4(__a) &= ~0x3; /* Clear U,V bit */ \ 55acb09f98Such } \ 56acb09f98Such } \ 57acb09f98Such __END_MACRO 58acb09f98Such 59acb09f98Such #define SH7709_MMU_DISABLE SH3_MMU_DISABLE 60acb09f98Such 61acb09f98Such #endif // _HPCBOOT_SH_CPU_7709_H_ 62