xref: /netbsd-src/sys/arch/evbcf/include/bus_dma.h (revision 8a3fe07864e3511bfd888f2908bbf85e8b1448e8)
1*8a3fe078Smsaitoh /* $NetBSD: bus_dma.h,v 1.3 2021/12/05 04:54:20 msaitoh Exp $	*/
2c9855651Smatt 
3c9855651Smatt /*
4*8a3fe078Smsaitoh  * This file was extracted from next68k/include/bus.h
5c9855651Smatt  * and should probably be resynced when needed.
6c9855651Smatt  * original cvs id: NetBSD: bus_dma.h,v 1.3 1999/08/05 01:50:59 dbj Exp
7c9855651Smatt  */
8c9855651Smatt 
9c9855651Smatt /*-
10c9855651Smatt  * Copyright (c) 1997, 1998, 2001 The NetBSD Foundation, Inc.
11c9855651Smatt  * All rights reserved.
12c9855651Smatt  *
13c9855651Smatt  * This code is derived from software contributed to The NetBSD Foundation
14c9855651Smatt  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
15c9855651Smatt  * NASA Ames Research Center.
16c9855651Smatt  *
17c9855651Smatt  * Redistribution and use in source and binary forms, with or without
18c9855651Smatt  * modification, are permitted provided that the following conditions
19c9855651Smatt  * are met:
20c9855651Smatt  * 1. Redistributions of source code must retain the above copyright
21c9855651Smatt  *    notice, this list of conditions and the following disclaimer.
22c9855651Smatt  * 2. Redistributions in binary form must reproduce the above copyright
23c9855651Smatt  *    notice, this list of conditions and the following disclaimer in the
24c9855651Smatt  *    documentation and/or other materials provided with the distribution.
25c9855651Smatt  *
26c9855651Smatt  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27c9855651Smatt  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28c9855651Smatt  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29c9855651Smatt  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30c9855651Smatt  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31c9855651Smatt  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32c9855651Smatt  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33c9855651Smatt  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34c9855651Smatt  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35c9855651Smatt  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36c9855651Smatt  * POSSIBILITY OF SUCH DAMAGE.
37c9855651Smatt  */
38c9855651Smatt 
39c9855651Smatt /*
40c9855651Smatt  * Copyright (c) 1996 Carnegie-Mellon University.
41c9855651Smatt  * All rights reserved.
42c9855651Smatt  *
43c9855651Smatt  * Author: Chris G. Demetriou
44c9855651Smatt  *
45c9855651Smatt  * Permission to use, copy, modify and distribute this software and
46c9855651Smatt  * its documentation is hereby granted, provided that both the copyright
47c9855651Smatt  * notice and this permission notice appear in all copies of the
48c9855651Smatt  * software, derivative works or modified versions, and any portions
49c9855651Smatt  * thereof, and that both notices appear in supporting documentation.
50c9855651Smatt  *
51c9855651Smatt  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
52c9855651Smatt  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
53c9855651Smatt  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
54c9855651Smatt  *
55c9855651Smatt  * Carnegie Mellon requests users of this software to return to
56c9855651Smatt  *
57c9855651Smatt  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
58c9855651Smatt  *  School of Computer Science
59c9855651Smatt  *  Carnegie Mellon University
60c9855651Smatt  *  Pittsburgh PA 15213-3890
61c9855651Smatt  *
62c9855651Smatt  * any improvements or extensions that they make and grant Carnegie the
63c9855651Smatt  * rights to redistribute these changes.
64c9855651Smatt  */
65c9855651Smatt 
66c9855651Smatt #ifndef _MVME68K_BUS_DMA_H_
67c9855651Smatt #define	_MVME68K_BUS_DMA_H_
68c9855651Smatt 
69c9855651Smatt /*
70c9855651Smatt  * Bus DMA methods.
71c9855651Smatt  */
72c9855651Smatt 
73c9855651Smatt /*
74c9855651Smatt  * Flags used in various bus DMA methods.
75c9855651Smatt  */
76c9855651Smatt #define	BUS_DMA_WAITOK		0x000	/* safe to sleep (pseudo-flag) */
77c9855651Smatt #define	BUS_DMA_NOWAIT		0x001	/* not safe to sleep */
78c9855651Smatt #define	BUS_DMA_ALLOCNOW	0x002	/* perform resource allocation now */
79c9855651Smatt #define	BUS_DMA_COHERENT	0x004	/* hint: map memory DMA coherent */
80c9855651Smatt #define	BUS_DMA_STREAMING	0x008	/* hint: sequential, unidirectional */
81c9855651Smatt #define	BUS_DMA_BUS1		0x010	/* placeholders for bus functions... */
82c9855651Smatt #define	BUS_DMA_BUS2		0x020
83c9855651Smatt #define	BUS_DMA_BUS3		0x040
84c9855651Smatt #define	BUS_DMA_BUS4		0x080
85c9855651Smatt #define	BUS_DMA_READ		0x100	/* mapping is device -> memory only */
86c9855651Smatt #define	BUS_DMA_WRITE		0x200	/* mapping is memory -> device only */
87c9855651Smatt #define	BUS_DMA_NOCACHE		0x400	/* hint: map non-cached memory */
88c9855651Smatt 
89c9855651Smatt /*
90c9855651Smatt  * Flags to constrain the physical memory allocated for DMA
91c9855651Smatt  */
92c9855651Smatt #define BUS_DMA_ONBOARD_RAM	BUS_DMA_BUS1
93c9855651Smatt #define BUS_DMA_24BIT		BUS_DMA_BUS2
94c9855651Smatt 
95c9855651Smatt /* Forwards needed by prototypes below. */
96c9855651Smatt struct mbuf;
97c9855651Smatt struct uio;
98c9855651Smatt 
99c9855651Smatt /*
100c9855651Smatt  * Operations performed by bus_dmamap_sync().
101c9855651Smatt  */
102c9855651Smatt #define	BUS_DMASYNC_PREREAD	0x01	/* pre-read synchronization */
103c9855651Smatt #define	BUS_DMASYNC_POSTREAD	0x02	/* post-read synchronization */
104c9855651Smatt #define	BUS_DMASYNC_PREWRITE	0x04	/* pre-write synchronization */
105c9855651Smatt #define	BUS_DMASYNC_POSTWRITE	0x08	/* post-write synchronization */
106c9855651Smatt 
107c9855651Smatt typedef struct mvme68k_bus_dma_tag *bus_dma_tag_t;
108c9855651Smatt typedef struct mvme68k_bus_dmamap *bus_dmamap_t;
109c9855651Smatt 
110c9855651Smatt /*
111c9855651Smatt  *	bus_dma_segment_t
112c9855651Smatt  *
113c9855651Smatt  *	Describes a single contiguous DMA transaction.  Values
114c9855651Smatt  *	are suitable for programming into DMA registers.
115c9855651Smatt  */
116c9855651Smatt struct mvme68k_bus_dma_segment {
117c9855651Smatt 	bus_addr_t	ds_addr;	/* DMA address */
118c9855651Smatt 	bus_size_t	ds_len;		/* length of transfer */
119c9855651Smatt 
120c9855651Smatt 	/* PRIVATE */
121c9855651Smatt 	bus_addr_t	_ds_cpuaddr;	/* CPU-relative phys addr of segment */
122c9855651Smatt 	int		_ds_flags;
123c9855651Smatt };
124c9855651Smatt typedef struct mvme68k_bus_dma_segment	bus_dma_segment_t;
125c9855651Smatt 
126c9855651Smatt /*
127c9855651Smatt  *	bus_dma_tag_t
128c9855651Smatt  *
129c9855651Smatt  *	A machine-dependent opaque type describing the implementation of
130c9855651Smatt  *	DMA for a given bus.
131c9855651Smatt  */
132c9855651Smatt struct mvme68k_bus_dma_tag {
133c9855651Smatt 	void	*_cookie;		/* cookie used in the guts */
134c9855651Smatt 
135c9855651Smatt 	/*
136c9855651Smatt 	 * DMA mapping methods.
137c9855651Smatt 	 */
138c9855651Smatt 	int	(*_dmamap_create)(bus_dma_tag_t, bus_size_t, int,
139c9855651Smatt 		    bus_size_t, bus_size_t, int, bus_dmamap_t *);
140c9855651Smatt 	void	(*_dmamap_destroy)(bus_dma_tag_t, bus_dmamap_t);
141c9855651Smatt 	int	(*_dmamap_load)(bus_dma_tag_t, bus_dmamap_t, void *,
142c9855651Smatt 		    bus_size_t, struct proc *, int);
143c9855651Smatt 	int	(*_dmamap_load_mbuf)(bus_dma_tag_t, bus_dmamap_t,
144c9855651Smatt 		    struct mbuf *, int);
145c9855651Smatt 	int	(*_dmamap_load_uio)(bus_dma_tag_t, bus_dmamap_t,
146c9855651Smatt 		    struct uio *, int);
147c9855651Smatt 	int	(*_dmamap_load_raw)(bus_dma_tag_t, bus_dmamap_t,
148c9855651Smatt 		    bus_dma_segment_t *, int, bus_size_t, int);
149c9855651Smatt 	void	(*_dmamap_unload)(bus_dma_tag_t, bus_dmamap_t);
150c9855651Smatt 	void	(*_dmamap_sync)(bus_dma_tag_t, bus_dmamap_t,
151c9855651Smatt 		    bus_addr_t, bus_size_t, int);
152c9855651Smatt 
153c9855651Smatt 	/*
154c9855651Smatt 	 * DMA memory utility functions.
155c9855651Smatt 	 */
156c9855651Smatt 	int	(*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t,
157c9855651Smatt 		    bus_size_t, bus_dma_segment_t *, int, int *, int);
158c9855651Smatt 	void	(*_dmamem_free)(bus_dma_tag_t,
159c9855651Smatt 		    bus_dma_segment_t *, int);
160c9855651Smatt 	int	(*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *,
161c9855651Smatt 		    int, size_t, void **, int);
162c9855651Smatt 	void	(*_dmamem_unmap)(bus_dma_tag_t, void *, size_t);
163c9855651Smatt 	paddr_t	(*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *,
164c9855651Smatt 		    int, off_t, int, int);
165c9855651Smatt };
166c9855651Smatt 
167c9855651Smatt #define	bus_dmamap_create(t, s, n, m, b, f, p)			\
168c9855651Smatt 	(*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p))
169c9855651Smatt #define	bus_dmamap_destroy(t, p)				\
170c9855651Smatt 	(*(t)->_dmamap_destroy)((t), (p))
171c9855651Smatt #define	bus_dmamap_load(t, m, b, s, p, f)			\
172c9855651Smatt 	(*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f))
173c9855651Smatt #define	bus_dmamap_load_mbuf(t, m, b, f)			\
174c9855651Smatt 	(*(t)->_dmamap_load_mbuf)((t), (m), (b), (f))
175c9855651Smatt #define	bus_dmamap_load_uio(t, m, u, f)				\
176c9855651Smatt 	(*(t)->_dmamap_load_uio)((t), (m), (u), (f))
177c9855651Smatt #define	bus_dmamap_load_raw(t, m, sg, n, s, f)			\
178c9855651Smatt 	(*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f))
179c9855651Smatt #define	bus_dmamap_unload(t, p)					\
180c9855651Smatt 	(*(t)->_dmamap_unload)((t), (p))
181c9855651Smatt #define	bus_dmamap_sync(t, p, o, l, ops)			\
182c9855651Smatt 	(*(t)->_dmamap_sync)((t), (p), (o), (l), (ops))
183c9855651Smatt #define	bus_dmamem_alloc(t, s, a, b, sg, n, r, f)		\
184c9855651Smatt 	(*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f))
185c9855651Smatt #define	bus_dmamem_free(t, sg, n)				\
186c9855651Smatt 	(*(t)->_dmamem_free)((t), (sg), (n))
187c9855651Smatt #define	bus_dmamem_map(t, sg, n, s, k, f)			\
188c9855651Smatt 	(*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f))
189c9855651Smatt #define	bus_dmamem_unmap(t, k, s)				\
190c9855651Smatt 	(*(t)->_dmamem_unmap)((t), (k), (s))
191c9855651Smatt #define	bus_dmamem_mmap(t, sg, n, o, p, f)			\
192c9855651Smatt 	(*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f))
193c9855651Smatt 
194c9855651Smatt /*
195c9855651Smatt  *	bus_dmamap_t
196c9855651Smatt  *
197c9855651Smatt  *	Describes a DMA mapping.
198c9855651Smatt  */
199c9855651Smatt struct mvme68k_bus_dmamap {
200c9855651Smatt 	/*
201c9855651Smatt 	 * PRIVATE MEMBERS: not for use by machine-independent code.
202c9855651Smatt 	 */
203c9855651Smatt 	bus_size_t	_dm_size;	/* largest DMA transfer mappable */
204c9855651Smatt 	int		_dm_segcnt;	/* number of segs this map can map */
205c9855651Smatt 	bus_size_t	_dm_maxmaxsegsz; /* fixed largest possible segment */
206c9855651Smatt 	bus_size_t	_dm_boundary;	/* don't cross this */
207c9855651Smatt 	int		_dm_flags;	/* misc. flags */
208c9855651Smatt 	void		*_dm_cookie;	/* Bus-specific cookie */
209c9855651Smatt 
210c9855651Smatt 	/*
211c9855651Smatt 	 * PUBLIC MEMBERS: these are used by machine-independent code.
212c9855651Smatt 	 */
213c9855651Smatt 	bus_size_t	dm_maxsegsz;	/* largest possible segment */
214c9855651Smatt 	bus_size_t	dm_mapsize;	/* size of the mapping */
215c9855651Smatt 	int		dm_nsegs;	/* # valid segments in mapping */
216c9855651Smatt 	bus_dma_segment_t dm_segs[1];	/* segments; variable length */
217c9855651Smatt };
218c9855651Smatt 
219c9855651Smatt #ifdef _MVME68K_BUS_DMA_PRIVATE
220c9855651Smatt int	_bus_dmamap_create(bus_dma_tag_t, bus_size_t, int, bus_size_t,
221c9855651Smatt 	    bus_size_t, int, bus_dmamap_t *);
222c9855651Smatt void	_bus_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t);
223c9855651Smatt 
224c9855651Smatt int	_bus_dmamap_load_direct(bus_dma_tag_t, bus_dmamap_t,
225c9855651Smatt 	    void *, bus_size_t, struct proc *, int);
226c9855651Smatt int	_bus_dmamap_load_mbuf_direct(bus_dma_tag_t,
227c9855651Smatt 	    bus_dmamap_t, struct mbuf *, int);
228c9855651Smatt int	_bus_dmamap_load_uio_direct(bus_dma_tag_t,
229c9855651Smatt 	    bus_dmamap_t, struct uio *, int);
230c9855651Smatt int	_bus_dmamap_load_raw_direct(bus_dma_tag_t,
231c9855651Smatt 	    bus_dmamap_t, bus_dma_segment_t *, int, bus_size_t, int);
232c9855651Smatt void	_bus_dmamap_unload(bus_dma_tag_t, bus_dmamap_t);
233c9855651Smatt void	_bus_dmamap_sync_030(bus_dma_tag_t, bus_dmamap_t, bus_addr_t,
234c9855651Smatt 	    bus_size_t, int);
235c9855651Smatt void	_bus_dmamap_sync_0460(bus_dma_tag_t, bus_dmamap_t, bus_addr_t,
236c9855651Smatt 	    bus_size_t, int);
237c9855651Smatt int	_bus_dmamem_alloc(bus_dma_tag_t tag, bus_size_t size,
238c9855651Smatt 	    bus_size_t alignment, bus_size_t boundary,
239c9855651Smatt 	    bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags);
240c9855651Smatt void	_bus_dmamem_free(bus_dma_tag_t tag, bus_dma_segment_t *segs,
241c9855651Smatt 	    int nsegs);
242c9855651Smatt int	_bus_dmamem_map(bus_dma_tag_t tag, bus_dma_segment_t *segs,
243c9855651Smatt 	    int nsegs, size_t size, void **kvap, int flags);
244c9855651Smatt void	_bus_dmamem_unmap(bus_dma_tag_t tag, void *kva, size_t size);
245c9855651Smatt paddr_t	_bus_dmamem_mmap(bus_dma_tag_t tag, bus_dma_segment_t *segs,
246c9855651Smatt 	    int nsegs, off_t off, int prot, int flags);
247c9855651Smatt #endif /* _MVME68K_BUS_DMA_PRIVATE */
248c9855651Smatt 
249c9855651Smatt /* Needed by mvmebus.c */
250c9855651Smatt int	_bus_dmamem_alloc_common(bus_dma_tag_t,
251c9855651Smatt 	    bus_addr_t, bus_addr_t, bus_size_t, bus_size_t, bus_size_t,
252c9855651Smatt 	    bus_dma_segment_t *, int, int *, int);
253c9855651Smatt 
254c9855651Smatt #endif /* _MVME68K_BUS_DMA_H_ */
255