xref: /netbsd-src/sys/arch/evbarm/nslu2/nslu2_iic.c (revision c7fb772b85b2b5d4cfb282f868f454b4701534fd)
1*c7fb772bSthorpej /*	$NetBSD: nslu2_iic.c,v 1.12 2021/08/07 16:18:50 thorpej Exp $	*/
26f616773Sscw 
36f616773Sscw /*-
46f616773Sscw  * Copyright (c) 2006 The NetBSD Foundation, Inc.
56f616773Sscw  * All rights reserved.
66f616773Sscw  *
76f616773Sscw  * This code is derived from software contributed to The NetBSD Foundation
86f616773Sscw  * by Steve C. Woodford.
96f616773Sscw  *
106f616773Sscw  * Redistribution and use in source and binary forms, with or without
116f616773Sscw  * modification, are permitted provided that the following conditions
126f616773Sscw  * are met:
136f616773Sscw  * 1. Redistributions of source code must retain the above copyright
146f616773Sscw  *    notice, this list of conditions and the following disclaimer.
156f616773Sscw  * 2. Redistributions in binary form must reproduce the above copyright
166f616773Sscw  *    notice, this list of conditions and the following disclaimer in the
176f616773Sscw  *    documentation and/or other materials provided with the distribution.
186f616773Sscw  *
196f616773Sscw  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
206f616773Sscw  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
216f616773Sscw  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
226f616773Sscw  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
236f616773Sscw  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
246f616773Sscw  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
256f616773Sscw  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
266f616773Sscw  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
276f616773Sscw  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
286f616773Sscw  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
296f616773Sscw  * POSSIBILITY OF SUCH DAMAGE.
306f616773Sscw  */
316f616773Sscw 
326f616773Sscw #include <sys/param.h>
336f616773Sscw #include <sys/systm.h>
346f616773Sscw #include <sys/kernel.h>
356f616773Sscw #include <sys/device.h>
36065b6ba2Sad #include <sys/mutex.h>
37065b6ba2Sad #include <sys/bus.h>
386f616773Sscw 
396f616773Sscw #include <dev/i2c/i2cvar.h>
406f616773Sscw #include <dev/i2c/i2c_bitbang.h>
416f616773Sscw 
426f616773Sscw #include <arm/xscale/ixp425reg.h>
436f616773Sscw #include <arm/xscale/ixp425var.h>
446f616773Sscw 
456f616773Sscw #include <evbarm/nslu2/nslu2reg.h>
466f616773Sscw 
476f616773Sscw struct slugiic_softc {
486f616773Sscw 	struct i2c_controller sc_ic;
496f616773Sscw 	struct i2c_bitbang_ops sc_ibo;
506f616773Sscw 	uint32_t sc_dirout;
516f616773Sscw };
526f616773Sscw 
536f616773Sscw static int
slugiic_send_start(void * arg,int flags)546f616773Sscw slugiic_send_start(void *arg, int flags)
556f616773Sscw {
566f616773Sscw 	struct slugiic_softc *sc = arg;
576f616773Sscw 
586f616773Sscw 	return (i2c_bitbang_send_start(sc, flags, &sc->sc_ibo));
596f616773Sscw }
606f616773Sscw 
616f616773Sscw static int
slugiic_send_stop(void * arg,int flags)626f616773Sscw slugiic_send_stop(void *arg, int flags)
636f616773Sscw {
646f616773Sscw 	struct slugiic_softc *sc = arg;
656f616773Sscw 
666f616773Sscw 	return (i2c_bitbang_send_stop(sc, flags, &sc->sc_ibo));
676f616773Sscw }
686f616773Sscw 
696f616773Sscw static int
slugiic_initiate_xfer(void * arg,i2c_addr_t addr,int flags)706f616773Sscw slugiic_initiate_xfer(void *arg, i2c_addr_t addr, int flags)
716f616773Sscw {
726f616773Sscw 	struct slugiic_softc *sc = arg;
736f616773Sscw 
746f616773Sscw 	return (i2c_bitbang_initiate_xfer(sc, addr, flags, &sc->sc_ibo));
756f616773Sscw }
766f616773Sscw 
776f616773Sscw static int
slugiic_read_byte(void * arg,uint8_t * vp,int flags)786f616773Sscw slugiic_read_byte(void *arg, uint8_t *vp, int flags)
796f616773Sscw {
806f616773Sscw 	struct slugiic_softc *sc = arg;
816f616773Sscw 
826f616773Sscw 	return (i2c_bitbang_read_byte(sc, vp, flags, &sc->sc_ibo));
836f616773Sscw }
846f616773Sscw 
856f616773Sscw static int
slugiic_write_byte(void * arg,uint8_t v,int flags)866f616773Sscw slugiic_write_byte(void *arg, uint8_t v, int flags)
876f616773Sscw {
886f616773Sscw 	struct slugiic_softc *sc = arg;
896f616773Sscw 
906f616773Sscw 	return (i2c_bitbang_write_byte(sc, v, flags, &sc->sc_ibo));
916f616773Sscw }
926f616773Sscw 
936f616773Sscw static void
slugiic_set_dir(void * arg,uint32_t bits)946f616773Sscw slugiic_set_dir(void *arg, uint32_t bits)
956f616773Sscw {
966f616773Sscw 	struct slugiic_softc *sc = arg;
97bdb59915Stsutsui 	uint32_t reg;
98bdb59915Stsutsui 	int s;
99bdb59915Stsutsui 
100bdb59915Stsutsui 	if (sc->sc_dirout == bits)
101bdb59915Stsutsui 		return;
102bdb59915Stsutsui 
103bdb59915Stsutsui 	s = splhigh();
1046f616773Sscw 
10538ba2c72Sscw 	sc->sc_dirout = bits;
106bdb59915Stsutsui 
107bdb59915Stsutsui 	if (sc->sc_dirout) {
108bdb59915Stsutsui 		/* SDA is output; enable SDA output if SDA OUTR is low */
109bdb59915Stsutsui 		reg = GPIO_CONF_READ_4(ixp425_softc, IXP425_GPIO_GPOUTR);
110bdb59915Stsutsui 		if ((reg & GPIO_I2C_SDA_BIT) == 0) {
111bdb59915Stsutsui 			reg = GPIO_CONF_READ_4(ixp425_softc, IXP425_GPIO_GPOER);
112c8f36925Stsutsui 			reg &= ~GPIO_I2C_SDA_BIT;
113bdb59915Stsutsui 			GPIO_CONF_WRITE_4(ixp425_softc, IXP425_GPIO_GPOER, reg);
114bdb59915Stsutsui 		}
115bdb59915Stsutsui 	} else {
116bdb59915Stsutsui 		/* SDA is input; disable SDA output */
117bdb59915Stsutsui 		reg = GPIO_CONF_READ_4(ixp425_softc, IXP425_GPIO_GPOER);
118c8f36925Stsutsui 		reg |= GPIO_I2C_SDA_BIT;
119bdb59915Stsutsui 		GPIO_CONF_WRITE_4(ixp425_softc, IXP425_GPIO_GPOER, reg);
120bdb59915Stsutsui 	}
121bdb59915Stsutsui 
122bdb59915Stsutsui 	splx(s);
1236f616773Sscw }
1246f616773Sscw 
1256f616773Sscw static void
slugiic_set_bits(void * arg,uint32_t bits)1266f616773Sscw slugiic_set_bits(void *arg, uint32_t bits)
1276f616773Sscw {
12838ba2c72Sscw 	struct slugiic_softc *sc = arg;
129bdb59915Stsutsui 	uint32_t oer, outr;
130bdb59915Stsutsui 	int s;
1316f616773Sscw 
1326f616773Sscw 	s = splhigh();
1336f616773Sscw 
13438ba2c72Sscw 	/*
135bdb59915Stsutsui 	 * Enable SCL output if the SCL line is to be driven low.
136bdb59915Stsutsui 	 * Enable SDA output if the SDA line is to be driven low and
137bdb59915Stsutsui 	 * SDA direction is output.
138bdb59915Stsutsui 	 * Otherwise switch them to input even if directions are output
139bdb59915Stsutsui 	 * so that we can emulate open collector output with the pullup
140bdb59915Stsutsui 	 * resistors.
141bdb59915Stsutsui 	 * If lines are to be set to high, disable OER first then set OUTR.
142bdb59915Stsutsui 	 * If lines are to be set to low, set OUTR first then enable OER.
14338ba2c72Sscw 	 */
144bdb59915Stsutsui 	oer = GPIO_CONF_READ_4(ixp425_softc, IXP425_GPIO_GPOER);
145bdb59915Stsutsui 	if ((bits & GPIO_I2C_SCL_BIT) != 0)
146c8f36925Stsutsui 		oer |= GPIO_I2C_SCL_BIT;
147bdb59915Stsutsui 	if ((bits & GPIO_I2C_SDA_BIT) != 0)
148c8f36925Stsutsui 		oer |= GPIO_I2C_SDA_BIT;
149bdb59915Stsutsui 	GPIO_CONF_WRITE_4(ixp425_softc, IXP425_GPIO_GPOER, oer);
150bdb59915Stsutsui 
151bdb59915Stsutsui 	outr = GPIO_CONF_READ_4(ixp425_softc, IXP425_GPIO_GPOUTR);
152bdb59915Stsutsui 	outr &= ~(GPIO_I2C_SDA_BIT | GPIO_I2C_SCL_BIT);
153bdb59915Stsutsui 	GPIO_CONF_WRITE_4(ixp425_softc, IXP425_GPIO_GPOUTR, outr | bits);
154bdb59915Stsutsui 
155bdb59915Stsutsui 	if ((bits & GPIO_I2C_SCL_BIT) == 0)
156c8f36925Stsutsui 		oer &= ~GPIO_I2C_SCL_BIT;
157bdb59915Stsutsui 	if ((bits & GPIO_I2C_SDA_BIT) == 0 && sc->sc_dirout)
158c8f36925Stsutsui 		oer &= ~GPIO_I2C_SDA_BIT;
159bdb59915Stsutsui 	GPIO_CONF_WRITE_4(ixp425_softc, IXP425_GPIO_GPOER, oer);
16038ba2c72Sscw 
1616f616773Sscw 	splx(s);
1626f616773Sscw }
1636f616773Sscw 
1646f616773Sscw static uint32_t
slugiic_read_bits(void * arg)1656f616773Sscw slugiic_read_bits(void *arg)
1666f616773Sscw {
1676f616773Sscw 	uint32_t reg;
1686f616773Sscw 
1696f616773Sscw 	reg = GPIO_CONF_READ_4(ixp425_softc, IXP425_GPIO_GPINR);
1706f616773Sscw 	return (reg & (GPIO_I2C_SDA_BIT | GPIO_I2C_SCL_BIT));
1716f616773Sscw }
1726f616773Sscw 
1736f616773Sscw static void
slugiic_deferred_attach(device_t self)174a2b8c7fbSmsaitoh slugiic_deferred_attach(device_t self)
1756f616773Sscw {
176a2b8c7fbSmsaitoh 	struct slugiic_softc *sc = device_private(self);
1776f616773Sscw 	struct i2cbus_attach_args iba;
1786f616773Sscw 	uint32_t reg;
1796f616773Sscw 
1806f616773Sscw 	reg = GPIO_CONF_READ_4(ixp425_softc, IXP425_GPIO_GPOUTR);
1816f616773Sscw 	reg |= GPIO_I2C_SDA_BIT | GPIO_I2C_SCL_BIT;
1826f616773Sscw 	GPIO_CONF_WRITE_4(ixp425_softc, IXP425_GPIO_GPOUTR, reg);
1836f616773Sscw 
1846f616773Sscw 	reg = GPIO_CONF_READ_4(ixp425_softc, IXP425_GPIO_GPOER);
1856f616773Sscw 	reg &= ~GPIO_I2C_SCL_BIT;
1866f616773Sscw 	reg |= GPIO_I2C_SDA_BIT;
1876f616773Sscw 	GPIO_CONF_WRITE_4(ixp425_softc, IXP425_GPIO_GPOER, reg);
1886f616773Sscw 
1892f02870fSchs 	memset(&iba, 0, sizeof(iba));
1906f616773Sscw 	iba.iba_tag = &sc->sc_ic;
191*c7fb772bSthorpej 	config_found(self, &iba, iicbus_print, CFARGS_NONE);
1926f616773Sscw }
1936f616773Sscw 
1946f616773Sscw static int
slugiic_match(device_t parent,cfdata_t cf,void * aux)195a2b8c7fbSmsaitoh slugiic_match(device_t parent, cfdata_t cf, void *aux)
1966f616773Sscw {
1976f616773Sscw 
1986f616773Sscw 	return (1);
1996f616773Sscw }
2006f616773Sscw 
2016f616773Sscw static void
slugiic_attach(device_t parent,device_t self,void * aux)202a2b8c7fbSmsaitoh slugiic_attach(device_t parent, device_t self, void *aux)
2036f616773Sscw {
204a2b8c7fbSmsaitoh 	struct slugiic_softc *sc = device_private(self);
2056f616773Sscw 
2066f616773Sscw 	aprint_naive("\n");
2076f616773Sscw 	aprint_normal(": I2C bus\n");
2086f616773Sscw 
209601e1783Sthorpej 	iic_tag_init(&sc->sc_ic);
2106f616773Sscw 	sc->sc_ic.ic_cookie = sc;
2116f616773Sscw 	sc->sc_ic.ic_send_start = slugiic_send_start;
2126f616773Sscw 	sc->sc_ic.ic_send_stop = slugiic_send_stop;
2136f616773Sscw 	sc->sc_ic.ic_initiate_xfer = slugiic_initiate_xfer;
2146f616773Sscw 	sc->sc_ic.ic_read_byte = slugiic_read_byte;
2156f616773Sscw 	sc->sc_ic.ic_write_byte = slugiic_write_byte;
2166f616773Sscw 
2176f616773Sscw 	sc->sc_ibo.ibo_set_dir = slugiic_set_dir;
2186f616773Sscw 	sc->sc_ibo.ibo_set_bits = slugiic_set_bits;
2196f616773Sscw 	sc->sc_ibo.ibo_read_bits = slugiic_read_bits;
2206f616773Sscw 	sc->sc_ibo.ibo_bits[I2C_BIT_SDA] = GPIO_I2C_SDA_BIT;
2216f616773Sscw 	sc->sc_ibo.ibo_bits[I2C_BIT_SCL] = GPIO_I2C_SCL_BIT;
22238ba2c72Sscw 	sc->sc_ibo.ibo_bits[I2C_BIT_OUTPUT] = 1;
22338ba2c72Sscw 	sc->sc_ibo.ibo_bits[I2C_BIT_INPUT] = 0;
2246f616773Sscw 
2256f616773Sscw 	sc->sc_dirout = 0;
2266f616773Sscw 
2276f616773Sscw 	/*
2286f616773Sscw 	 * Defer until ixp425_softc has been initialised
2296f616773Sscw 	 */
2306f616773Sscw 	config_interrupts(self, slugiic_deferred_attach);
2316f616773Sscw }
2326f616773Sscw 
233a2b8c7fbSmsaitoh CFATTACH_DECL_NEW(slugiic, sizeof(struct slugiic_softc),
2346f616773Sscw     slugiic_match, slugiic_attach, NULL, NULL);
235