xref: /netbsd-src/sys/arch/evbarm/iyonix/autoconf.c (revision 7433666e375b3ac4cc764df5a6726be98bc1cdd5)
1*7433666eSthorpej /*	$NetBSD: autoconf.c,v 1.2 2023/12/20 13:55:18 thorpej Exp $	*/
26fe6c35aSmacallan 
36fe6c35aSmacallan /*-
46fe6c35aSmacallan  * Copyright (c) 2001 The NetBSD Foundation, Inc.
56fe6c35aSmacallan  * All rights reserved.
66fe6c35aSmacallan  *
76fe6c35aSmacallan  * This code is derived from software contributed to The NetBSD Foundation
86fe6c35aSmacallan  * by Matt Thomas <matt@3am-software.com>.
96fe6c35aSmacallan  *
106fe6c35aSmacallan  * Redistribution and use in source and binary forms, with or without
116fe6c35aSmacallan  * modification, are permitted provided that the following conditions
126fe6c35aSmacallan  * are met:
136fe6c35aSmacallan  * 1. Redistributions of source code must retain the above copyright
146fe6c35aSmacallan  *    notice, this list of conditions and the following disclaimer.
156fe6c35aSmacallan  * 2. Redistributions in binary form must reproduce the above copyright
166fe6c35aSmacallan  *    notice, this list of conditions and the following disclaimer in the
176fe6c35aSmacallan  *    documentation and/or other materials provided with the distribution.
186fe6c35aSmacallan  *
196fe6c35aSmacallan  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
206fe6c35aSmacallan  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
216fe6c35aSmacallan  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
226fe6c35aSmacallan  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
236fe6c35aSmacallan  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
246fe6c35aSmacallan  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
256fe6c35aSmacallan  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
266fe6c35aSmacallan  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
276fe6c35aSmacallan  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
286fe6c35aSmacallan  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
296fe6c35aSmacallan  * POSSIBILITY OF SUCH DAMAGE.
306fe6c35aSmacallan  */
316fe6c35aSmacallan 
326fe6c35aSmacallan #include <sys/cdefs.h>
33*7433666eSthorpej __KERNEL_RCSID(0, "$NetBSD: autoconf.c,v 1.2 2023/12/20 13:55:18 thorpej Exp $");
346fe6c35aSmacallan 
356fe6c35aSmacallan #include "opt_md.h"
366fe6c35aSmacallan 
376fe6c35aSmacallan #include <sys/param.h>
386fe6c35aSmacallan #include <sys/systm.h>
396fe6c35aSmacallan #include <sys/reboot.h>
406fe6c35aSmacallan #include <sys/disklabel.h>
416fe6c35aSmacallan #include <sys/device.h>
426fe6c35aSmacallan #include <sys/conf.h>
436fe6c35aSmacallan #include <sys/kernel.h>
446fe6c35aSmacallan 
456fe6c35aSmacallan #include <net/if.h>
466fe6c35aSmacallan #include <net/if_ether.h>
476fe6c35aSmacallan 
486fe6c35aSmacallan #include <machine/autoconf.h>
496fe6c35aSmacallan #include <machine/intr.h>
506fe6c35aSmacallan 
516fe6c35aSmacallan #include <evbarm/iyonix/iyonixvar.h>
526fe6c35aSmacallan 
536fe6c35aSmacallan #include <acorn32/include/bootconfig.h>
546fe6c35aSmacallan 
556fe6c35aSmacallan extern struct bootconfig bootconfig;
566fe6c35aSmacallan 
576fe6c35aSmacallan /*
586fe6c35aSmacallan  * Set up the root device from the boot args
596fe6c35aSmacallan  */
606fe6c35aSmacallan void
cpu_rootconf(void)616fe6c35aSmacallan cpu_rootconf(void)
626fe6c35aSmacallan {
636fe6c35aSmacallan 	aprint_normal("boot device: %s\n",
646fe6c35aSmacallan 	    booted_device != NULL ? device_xname(booted_device) : "<unknown>");
656fe6c35aSmacallan 	rootconf();
666fe6c35aSmacallan }
676fe6c35aSmacallan 
686fe6c35aSmacallan 
696fe6c35aSmacallan /*
706fe6c35aSmacallan  * void cpu_configure()
716fe6c35aSmacallan  *
726fe6c35aSmacallan  * Configure all the root devices
736fe6c35aSmacallan  * The root devices are expected to configure their own children
746fe6c35aSmacallan  */
756fe6c35aSmacallan void
cpu_configure(void)766fe6c35aSmacallan cpu_configure(void)
776fe6c35aSmacallan {
786fe6c35aSmacallan 	struct mainbus_attach_args maa;
796fe6c35aSmacallan 
806fe6c35aSmacallan 	(void) splhigh();
816fe6c35aSmacallan 	(void) splserial();	/* XXX need an splextreme() */
826fe6c35aSmacallan 
836fe6c35aSmacallan 	maa.ma_name = "mainbus";
846fe6c35aSmacallan 
856fe6c35aSmacallan 	config_rootfound("mainbus", &maa);
866fe6c35aSmacallan 
876fe6c35aSmacallan 	/* Time to start taking interrupts so lets open the flood gates .... */
886fe6c35aSmacallan 	spl0();
896fe6c35aSmacallan }
906fe6c35aSmacallan 
916fe6c35aSmacallan #define BUILTIN_ETHERNET_P(pa)	\
926fe6c35aSmacallan 	((pa)->pa_bus == 0 && (pa)->pa_device == 4 && (pa)->pa_function == 0)
936fe6c35aSmacallan 
946fe6c35aSmacallan #define SETPROP(x, y)							\
956fe6c35aSmacallan 	do {								\
966fe6c35aSmacallan 		if (prop_dictionary_set(device_properties(dev),		\
976fe6c35aSmacallan 						x, y) == false) {	\
986fe6c35aSmacallan 			printf("WARNING: unable to set " x " "		\
996fe6c35aSmacallan 			   "property for %s\n", device_xname(dev));	\
1006fe6c35aSmacallan 		}							\
1016fe6c35aSmacallan 		prop_object_release(y);					\
1026fe6c35aSmacallan 	} while (/*CONSTCOND*/0)
1036fe6c35aSmacallan 
1046fe6c35aSmacallan void
device_register(device_t dev,void * aux)1056fe6c35aSmacallan device_register(device_t dev, void *aux)
1066fe6c35aSmacallan {
1076fe6c35aSmacallan 	device_t pdev;
1086fe6c35aSmacallan 
1096fe6c35aSmacallan 	if ((pdev = device_parent(dev)) != NULL &&
1106fe6c35aSmacallan 	    device_is_a(pdev, "pci")) {
1116fe6c35aSmacallan 		struct pci_attach_args *pa = aux;
1126fe6c35aSmacallan 
1136fe6c35aSmacallan 		if (BUILTIN_ETHERNET_P(pa)) {
1146fe6c35aSmacallan 			prop_number_t cfg1, cfg2, swdpin;
1156fe6c35aSmacallan 			prop_data_t mac;
1166fe6c35aSmacallan 
1176fe6c35aSmacallan 			/*
1186fe6c35aSmacallan 			 * We set these configuration registers to 0,
1196fe6c35aSmacallan 			 * because it's the closest we have to "leave them
1206fe6c35aSmacallan 			 * alone". That and, it works.
1216fe6c35aSmacallan 			 */
1226fe6c35aSmacallan 			cfg1 = prop_number_create_integer(0);
1236fe6c35aSmacallan 			KASSERT(cfg1 != NULL);
1246fe6c35aSmacallan 			cfg2 = prop_number_create_integer(0);
1256fe6c35aSmacallan 			KASSERT(cfg2 != NULL);
1266fe6c35aSmacallan 			swdpin = prop_number_create_integer(0);
1276fe6c35aSmacallan 			KASSERT(swdpin != NULL);
1286fe6c35aSmacallan 
1296fe6c35aSmacallan 			mac = prop_data_create_data_nocopy(iyonix_macaddr,
1306fe6c35aSmacallan 							   ETHER_ADDR_LEN);
1316fe6c35aSmacallan 			KASSERT(mac != NULL);
1326fe6c35aSmacallan 
1336fe6c35aSmacallan 			SETPROP("mac-address", mac);
1346fe6c35aSmacallan 			SETPROP("i82543-cfg1", cfg1);
1356fe6c35aSmacallan 			SETPROP("i82543-cfg2", cfg2);
1366fe6c35aSmacallan 			SETPROP("i82543-swdpin", swdpin);
1376fe6c35aSmacallan 		}
1386fe6c35aSmacallan 	}
1396fe6c35aSmacallan 
1406fe6c35aSmacallan 	if ((device_is_a(dev, "genfb") || device_is_a(dev, "gffb")) &&
1416fe6c35aSmacallan 	    device_is_a(device_parent(dev), "pci") ) {
1426fe6c35aSmacallan 		prop_dictionary_t dict = device_properties(dev);
1436fe6c35aSmacallan 		struct pci_attach_args *pa = aux;
1446fe6c35aSmacallan 		pcireg_t bar0, bar1;
1456fe6c35aSmacallan 		uint32_t fbaddr;
1466fe6c35aSmacallan 		bus_space_handle_t vgah;
1476fe6c35aSmacallan 
1486fe6c35aSmacallan 		bar0 = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_MAPREG_START);
1496fe6c35aSmacallan 		bar1 = pci_conf_read(pa->pa_pc, pa->pa_tag,
1506fe6c35aSmacallan 			PCI_MAPREG_START + 0x04);
1516fe6c35aSmacallan 
1526fe6c35aSmacallan 		/*
1536fe6c35aSmacallan 		 * We need to prod the VGA card to disable interrupts, since
1546fe6c35aSmacallan 		 * RISC OS has been using them and we don't know how to
1556fe6c35aSmacallan 		 * handle them. This assumes that we have a NVidia
1566fe6c35aSmacallan 		 * GeForce 2 MX card as supplied with the Iyonix and
1576fe6c35aSmacallan 		 * as (probably) required by RISC OS in order to boot.
1586fe6c35aSmacallan 		 * If you write your own RISC OS driver for a different card,
1596fe6c35aSmacallan 		 * you're on your own.
1606fe6c35aSmacallan 		 */
1616fe6c35aSmacallan 
1626fe6c35aSmacallan /* We're guessing at the numbers here, guys */
1636fe6c35aSmacallan #define VGASIZE 0x1000
1646fe6c35aSmacallan #define IRQENABLE_ADDR 0x140
1656fe6c35aSmacallan 
1666fe6c35aSmacallan 		bus_space_map(pa->pa_memt, PCI_MAPREG_MEM_ADDR(bar0),
1676fe6c35aSmacallan 			VGASIZE, 0, &vgah);
1686fe6c35aSmacallan 		bus_space_write_4(pa->pa_memt, vgah, 0x140, 0);
1696fe6c35aSmacallan 		bus_space_unmap(pa->pa_memt, vgah, 0x1000);
1706fe6c35aSmacallan 
1716fe6c35aSmacallan 		fbaddr = PCI_MAPREG_MEM_ADDR(bar1);
1726fe6c35aSmacallan 
1736fe6c35aSmacallan 		prop_dictionary_set_bool(dict, "is_console", 1);
1746fe6c35aSmacallan 		prop_dictionary_set_uint32(dict, "width",
1756fe6c35aSmacallan 			bootconfig.width + 1);
1766fe6c35aSmacallan 		prop_dictionary_set_uint32(dict, "height",
1776fe6c35aSmacallan 			bootconfig.height + 1);
1786fe6c35aSmacallan 		prop_dictionary_set_uint32(dict, "depth",
1796fe6c35aSmacallan 			1 << bootconfig.log2_bpp);
1806fe6c35aSmacallan 		/*
1816fe6c35aSmacallan 		 * XXX
1826fe6c35aSmacallan 		 * at least RISC OS 5.28 seems to use the graphics hardware in
1836fe6c35aSmacallan 		 * BGR mode when in 32bit colour, so take that into account
1846fe6c35aSmacallan 		 */
1856fe6c35aSmacallan 		if (bootconfig.log2_bpp == 5)
1866fe6c35aSmacallan 			prop_dictionary_set_bool(dict, "is_bgr", 1);
1876fe6c35aSmacallan 		prop_dictionary_set_uint32(dict, "address", fbaddr);
1886fe6c35aSmacallan 	}
1896fe6c35aSmacallan 	if (device_is_a(dev, "dsrtc")) {
1906fe6c35aSmacallan 		prop_dictionary_t dict = device_properties(dev);
1916fe6c35aSmacallan 		prop_dictionary_set_bool(dict, "base_year_is_2000", 1);
1926fe6c35aSmacallan 	}
1936fe6c35aSmacallan }
194