1*cce19cc2Sjmcneill /* $NetBSD: hdlg_pci.c,v 1.5 2018/11/16 15:06:23 jmcneill Exp $ */
2407f05e7Snonaka
3407f05e7Snonaka /*
4407f05e7Snonaka * Copyright (c) 2001, 2002 Wasabi Systems, Inc.
5407f05e7Snonaka * All rights reserved.
6407f05e7Snonaka *
7407f05e7Snonaka * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8407f05e7Snonaka *
9407f05e7Snonaka * Redistribution and use in source and binary forms, with or without
10407f05e7Snonaka * modification, are permitted provided that the following conditions
11407f05e7Snonaka * are met:
12407f05e7Snonaka * 1. Redistributions of source code must retain the above copyright
13407f05e7Snonaka * notice, this list of conditions and the following disclaimer.
14407f05e7Snonaka * 2. Redistributions in binary form must reproduce the above copyright
15407f05e7Snonaka * notice, this list of conditions and the following disclaimer in the
16407f05e7Snonaka * documentation and/or other materials provided with the distribution.
17407f05e7Snonaka * 3. All advertising materials mentioning features or use of this software
18407f05e7Snonaka * must display the following acknowledgement:
19407f05e7Snonaka * This product includes software developed for the NetBSD Project by
20407f05e7Snonaka * Wasabi Systems, Inc.
21407f05e7Snonaka * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22407f05e7Snonaka * or promote products derived from this software without specific prior
23407f05e7Snonaka * written permission.
24407f05e7Snonaka *
25407f05e7Snonaka * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26407f05e7Snonaka * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27407f05e7Snonaka * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28407f05e7Snonaka * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29407f05e7Snonaka * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30407f05e7Snonaka * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31407f05e7Snonaka * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32407f05e7Snonaka * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33407f05e7Snonaka * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34407f05e7Snonaka * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35407f05e7Snonaka * POSSIBILITY OF SUCH DAMAGE.
36407f05e7Snonaka */
37407f05e7Snonaka
38407f05e7Snonaka #include <sys/cdefs.h>
39*cce19cc2Sjmcneill __KERNEL_RCSID(0, "$NetBSD: hdlg_pci.c,v 1.5 2018/11/16 15:06:23 jmcneill Exp $");
40407f05e7Snonaka
41407f05e7Snonaka #include <sys/param.h>
42407f05e7Snonaka #include <sys/systm.h>
43407f05e7Snonaka #include <sys/device.h>
44407f05e7Snonaka
45407f05e7Snonaka #include <machine/autoconf.h>
46fea15f47Sdyoung #include <sys/bus.h>
47407f05e7Snonaka
48407f05e7Snonaka #include <evbarm/hdl_g/hdlgreg.h>
49407f05e7Snonaka #include <evbarm/hdl_g/hdlgvar.h>
50407f05e7Snonaka
51407f05e7Snonaka #include <arm/xscale/i80321reg.h>
52407f05e7Snonaka #include <arm/xscale/i80321var.h>
53407f05e7Snonaka
54407f05e7Snonaka #include <dev/pci/pcidevs.h>
55407f05e7Snonaka #include <dev/pci/ppbreg.h>
56407f05e7Snonaka
57a184f1f4Sdyoung int hdlg_pci_intr_map(const struct pci_attach_args *, pci_intr_handle_t *);
58e58a356cSchristos const char *hdlg_pci_intr_string(void *, pci_intr_handle_t, char *, size_t);
59407f05e7Snonaka const struct evcnt *hdlg_pci_intr_evcnt(void *, pci_intr_handle_t);
60407f05e7Snonaka void *hdlg_pci_intr_establish(void *, pci_intr_handle_t,
61*cce19cc2Sjmcneill int, int (*func)(void *), void *, const char *);
62407f05e7Snonaka void hdlg_pci_intr_disestablish(void *, void *);
63407f05e7Snonaka
64407f05e7Snonaka void
hdlg_pci_init(pci_chipset_tag_t pc,void * cookie)65407f05e7Snonaka hdlg_pci_init(pci_chipset_tag_t pc, void *cookie)
66407f05e7Snonaka {
67407f05e7Snonaka
68407f05e7Snonaka pc->pc_intr_v = cookie; /* the i80321 softc */
69407f05e7Snonaka pc->pc_intr_map = hdlg_pci_intr_map;
70407f05e7Snonaka pc->pc_intr_string = hdlg_pci_intr_string;
71407f05e7Snonaka pc->pc_intr_evcnt = hdlg_pci_intr_evcnt;
72407f05e7Snonaka pc->pc_intr_establish = hdlg_pci_intr_establish;
73407f05e7Snonaka pc->pc_intr_disestablish = hdlg_pci_intr_disestablish;
74407f05e7Snonaka }
75407f05e7Snonaka
76407f05e7Snonaka int
hdlg_pci_intr_map(const struct pci_attach_args * pa,pci_intr_handle_t * ihp)77a184f1f4Sdyoung hdlg_pci_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp)
78407f05e7Snonaka {
79407f05e7Snonaka struct i80321_softc *sc = pa->pa_pc->pc_intr_v;
80407f05e7Snonaka uint32_t busno;
81407f05e7Snonaka int b, d, f;
82407f05e7Snonaka
83407f05e7Snonaka /*
84407f05e7Snonaka * GigaLANDISK's interrupts are routed like so:
85407f05e7Snonaka *
86407f05e7Snonaka * XINT0 Intel i82541PI Gig-E
87407f05e7Snonaka *
88407f05e7Snonaka * XINT1 ACARD ATP875-A
89407f05e7Snonaka *
90407f05e7Snonaka * XINT2 NEC echi/ochi
91407f05e7Snonaka *
92407f05e7Snonaka * XINT3 UART
93407f05e7Snonaka */
94407f05e7Snonaka
95407f05e7Snonaka busno = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, ATU_PCIXSR);
96407f05e7Snonaka busno = PCIXSR_BUSNO(busno);
97407f05e7Snonaka if (busno == 0xff)
98407f05e7Snonaka busno = 0;
99407f05e7Snonaka
100407f05e7Snonaka pci_decompose_tag(pa->pa_pc, pa->pa_intrtag, &b, &d, &f);
101407f05e7Snonaka
102407f05e7Snonaka /* No mappings for devices not on our bus. */
103407f05e7Snonaka if (b != busno)
104407f05e7Snonaka goto no_mapping;
105407f05e7Snonaka
106407f05e7Snonaka switch (d) {
107407f05e7Snonaka case 1: /* i82541PI Gig-E */
108407f05e7Snonaka if (pa->pa_intrpin == 1) {
109407f05e7Snonaka *ihp = ICU_INT_XINT(0);
110407f05e7Snonaka return 0;
111407f05e7Snonaka }
112407f05e7Snonaka goto no_mapping;
113407f05e7Snonaka
114407f05e7Snonaka case 2: /* ATP875-A */
115407f05e7Snonaka if (pa->pa_intrpin == 1) {
116407f05e7Snonaka *ihp = ICU_INT_XINT(1);
117407f05e7Snonaka return 0;
118407f05e7Snonaka }
119407f05e7Snonaka goto no_mapping;
120407f05e7Snonaka
121407f05e7Snonaka case 3: /* echi/ochi */
122407f05e7Snonaka switch (pa->pa_intrpin) {
123407f05e7Snonaka case 1: /* ohci */
124407f05e7Snonaka case 2: /* ohci */
125407f05e7Snonaka case 3: /* ehci */
126407f05e7Snonaka *ihp = ICU_INT_XINT(2);
127407f05e7Snonaka return 0;
128407f05e7Snonaka }
129407f05e7Snonaka goto no_mapping;
130407f05e7Snonaka
131407f05e7Snonaka default:
132407f05e7Snonaka no_mapping:
133407f05e7Snonaka printf("hdlg_pci_intr_map: no mapping for %d/%d/%d\n",
134407f05e7Snonaka pa->pa_bus, pa->pa_device, pa->pa_function);
135407f05e7Snonaka return 1;
136407f05e7Snonaka }
137407f05e7Snonaka
138407f05e7Snonaka return 0;
139407f05e7Snonaka }
140407f05e7Snonaka
141407f05e7Snonaka const char *
hdlg_pci_intr_string(void * v,pci_intr_handle_t ih,char * buf,size_t len)142e58a356cSchristos hdlg_pci_intr_string(void *v, pci_intr_handle_t ih, char *buf, size_t len)
143407f05e7Snonaka {
144407f05e7Snonaka
145e58a356cSchristos strlcpy(buf, i80321_irqnames[ih], len);
146e58a356cSchristos return buf;
147407f05e7Snonaka }
148407f05e7Snonaka
149407f05e7Snonaka const struct evcnt *
hdlg_pci_intr_evcnt(void * v,pci_intr_handle_t ih)150407f05e7Snonaka hdlg_pci_intr_evcnt(void *v, pci_intr_handle_t ih)
151407f05e7Snonaka {
152407f05e7Snonaka
153407f05e7Snonaka /* XXX For now. */
154407f05e7Snonaka return NULL;
155407f05e7Snonaka }
156407f05e7Snonaka
157407f05e7Snonaka void *
hdlg_pci_intr_establish(void * v,pci_intr_handle_t ih,int ipl,int (* func)(void *),void * arg,const char * xname)158407f05e7Snonaka hdlg_pci_intr_establish(void *v, pci_intr_handle_t ih, int ipl,
159*cce19cc2Sjmcneill int (*func)(void *), void *arg, const char *xname)
160407f05e7Snonaka {
161407f05e7Snonaka
162407f05e7Snonaka return i80321_intr_establish(ih, ipl, func, arg);
163407f05e7Snonaka }
164407f05e7Snonaka
165407f05e7Snonaka void
hdlg_pci_intr_disestablish(void * v,void * cookie)166407f05e7Snonaka hdlg_pci_intr_disestablish(void *v, void *cookie)
167407f05e7Snonaka {
168407f05e7Snonaka
169407f05e7Snonaka i80321_intr_disestablish(cookie);
170407f05e7Snonaka }
171