xref: /netbsd-src/sys/arch/cobalt/include/cpu.h (revision 70b55af1aa277147ca044e0b95ff51e0625b1893)
1*70b55af1Schristos /*	$NetBSD: cpu.h,v 1.16 2018/04/09 20:16:16 christos Exp $	*/
273093915Stsutsui 
373093915Stsutsui #ifndef _COBALT_CPU_H_
473093915Stsutsui #define _COBALT_CPU_H_
54c547143Ssoren 
64c547143Ssoren #include <mips/cpu.h>
773093915Stsutsui 
84f64b671Stsutsui #if defined(_KERNEL) || defined(_STANDALONE)
973093915Stsutsui #ifndef _LOCORE
1073093915Stsutsui extern u_int cobalt_id;
1173093915Stsutsui 
1273093915Stsutsui #define COBALT_ID_QUBE2700	3
1373093915Stsutsui #define COBALT_ID_RAQ		4
1473093915Stsutsui #define COBALT_ID_QUBE2		5
1573093915Stsutsui #define COBALT_ID_RAQ2		6
1673093915Stsutsui 
1738e83cc1Stsutsui /*
1838e83cc1Stsutsui  * Memory map and register definitions.
1938e83cc1Stsutsui  * XXX should be elsewhere?
2038e83cc1Stsutsui  */
2138e83cc1Stsutsui #define PCIB_BASE	0x10000000
2238e83cc1Stsutsui #define GT_BASE		0x14000000
2338e83cc1Stsutsui #define LED_ADDR	0x1c000000
2438e83cc1Stsutsui #define LED_RESET	0x0f		/* Resets machine. */
2538e83cc1Stsutsui #define LED_POWEROFF	3
2638e83cc1Stsutsui #define COM_BASE	0x1c800000
274f64b671Stsutsui #define ZS_BASE		0x1c800000
28*70b55af1Schristos #define LCDPANEL_BASE	0x1d000000
290e88f65eStsutsui #define LCD_BASE	0x1f000000
3038e83cc1Stsutsui 
3173093915Stsutsui #endif /* !_LOCORE */
324f64b671Stsutsui #endif /* _KERNEL || _STANDALONE */
3373093915Stsutsui 
3473093915Stsutsui #endif /* !_COBALT_CPU_H_ */
35