xref: /netbsd-src/sys/arch/bebox/isa/mcclock_isa.c (revision d08eccdb3283a8a537f2be08204454fe352ce654)
1*d08eccdbSphx /*	$NetBSD: mcclock_isa.c,v 1.6 2014/06/20 09:47:15 phx Exp $	*/
2382a67e7Sgdamore 
3382a67e7Sgdamore /*-
4382a67e7Sgdamore  * Copyright (c) 1990 The Regents of the University of California.
5382a67e7Sgdamore  * All rights reserved.
6382a67e7Sgdamore  *
7382a67e7Sgdamore  * This code is derived from software contributed to Berkeley by
8382a67e7Sgdamore  * William Jolitz and Don Ahn.
9382a67e7Sgdamore  *
10382a67e7Sgdamore  * Redistribution and use in source and binary forms, with or without
11382a67e7Sgdamore  * modification, are permitted provided that the following conditions
12382a67e7Sgdamore  * are met:
13382a67e7Sgdamore  * 1. Redistributions of source code must retain the above copyright
14382a67e7Sgdamore  *    notice, this list of conditions and the following disclaimer.
15382a67e7Sgdamore  * 2. Redistributions in binary form must reproduce the above copyright
16382a67e7Sgdamore  *    notice, this list of conditions and the following disclaimer in the
17382a67e7Sgdamore  *    documentation and/or other materials provided with the distribution.
18382a67e7Sgdamore  * 3. Neither the name of the University nor the names of its contributors
19382a67e7Sgdamore  *    may be used to endorse or promote products derived from this software
20382a67e7Sgdamore  *    without specific prior written permission.
21382a67e7Sgdamore  *
22382a67e7Sgdamore  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
23382a67e7Sgdamore  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24382a67e7Sgdamore  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25382a67e7Sgdamore  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
26382a67e7Sgdamore  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27382a67e7Sgdamore  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28382a67e7Sgdamore  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29382a67e7Sgdamore  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30382a67e7Sgdamore  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31382a67e7Sgdamore  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32382a67e7Sgdamore  * SUCH DAMAGE.
33382a67e7Sgdamore  *
34382a67e7Sgdamore  *	@(#)clock.c	7.2 (Berkeley) 5/12/91
35382a67e7Sgdamore  */
36382a67e7Sgdamore /*-
37382a67e7Sgdamore  * Copyright (c) 1993, 1994 Charles M. Hannum.
38382a67e7Sgdamore  *
39382a67e7Sgdamore  * This code is derived from software contributed to Berkeley by
40382a67e7Sgdamore  * William Jolitz and Don Ahn.
41382a67e7Sgdamore  *
42382a67e7Sgdamore  * Redistribution and use in source and binary forms, with or without
43382a67e7Sgdamore  * modification, are permitted provided that the following conditions
44382a67e7Sgdamore  * are met:
45382a67e7Sgdamore  * 1. Redistributions of source code must retain the above copyright
46382a67e7Sgdamore  *    notice, this list of conditions and the following disclaimer.
47382a67e7Sgdamore  * 2. Redistributions in binary form must reproduce the above copyright
48382a67e7Sgdamore  *    notice, this list of conditions and the following disclaimer in the
49382a67e7Sgdamore  *    documentation and/or other materials provided with the distribution.
50382a67e7Sgdamore  * 3. All advertising materials mentioning features or use of this software
51382a67e7Sgdamore  *    must display the following acknowledgement:
52382a67e7Sgdamore  *	This product includes software developed by the University of
53382a67e7Sgdamore  *	California, Berkeley and its contributors.
54382a67e7Sgdamore  * 4. Neither the name of the University nor the names of its contributors
55382a67e7Sgdamore  *    may be used to endorse or promote products derived from this software
56382a67e7Sgdamore  *    without specific prior written permission.
57382a67e7Sgdamore  *
58382a67e7Sgdamore  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
59382a67e7Sgdamore  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
60382a67e7Sgdamore  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
61382a67e7Sgdamore  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
62382a67e7Sgdamore  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
63382a67e7Sgdamore  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
64382a67e7Sgdamore  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
65382a67e7Sgdamore  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
66382a67e7Sgdamore  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
67382a67e7Sgdamore  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
68382a67e7Sgdamore  * SUCH DAMAGE.
69382a67e7Sgdamore  *
70382a67e7Sgdamore  *	@(#)clock.c	7.2 (Berkeley) 5/12/91
71382a67e7Sgdamore  */
72382a67e7Sgdamore /*
73382a67e7Sgdamore  * Mach Operating System
74382a67e7Sgdamore  * Copyright (c) 1991,1990,1989 Carnegie Mellon University
75382a67e7Sgdamore  * All Rights Reserved.
76382a67e7Sgdamore  *
77382a67e7Sgdamore  * Permission to use, copy, modify and distribute this software and its
78382a67e7Sgdamore  * documentation is hereby granted, provided that both the copyright
79382a67e7Sgdamore  * notice and this permission notice appear in all copies of the
80382a67e7Sgdamore  * software, derivative works or modified versions, and any portions
81382a67e7Sgdamore  * thereof, and that both notices appear in supporting documentation.
82382a67e7Sgdamore  *
83382a67e7Sgdamore  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
84382a67e7Sgdamore  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
85382a67e7Sgdamore  * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
86382a67e7Sgdamore  *
87382a67e7Sgdamore  * Carnegie Mellon requests users of this software to return to
88382a67e7Sgdamore  *
89382a67e7Sgdamore  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
90382a67e7Sgdamore  *  School of Computer Science
91382a67e7Sgdamore  *  Carnegie Mellon University
92382a67e7Sgdamore  *  Pittsburgh PA 15213-3890
93382a67e7Sgdamore  *
94382a67e7Sgdamore  * any improvements or extensions that they make and grant Carnegie Mellon
95382a67e7Sgdamore  * the rights to redistribute these changes.
96382a67e7Sgdamore  */
97382a67e7Sgdamore /*
98382a67e7Sgdamore   Copyright 1988, 1989 by Intel Corporation, Santa Clara, California.
99382a67e7Sgdamore 
100382a67e7Sgdamore 		All Rights Reserved
101382a67e7Sgdamore 
102382a67e7Sgdamore Permission to use, copy, modify, and distribute this software and
103382a67e7Sgdamore its documentation for any purpose and without fee is hereby
104382a67e7Sgdamore granted, provided that the above copyright notice appears in all
105382a67e7Sgdamore copies and that both the copyright notice and this permission notice
106382a67e7Sgdamore appear in supporting documentation, and that the name of Intel
107382a67e7Sgdamore not be used in advertising or publicity pertaining to distribution
108382a67e7Sgdamore of the software without specific, written prior permission.
109382a67e7Sgdamore 
110382a67e7Sgdamore INTEL DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE
111382a67e7Sgdamore INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS,
112382a67e7Sgdamore IN NO EVENT SHALL INTEL BE LIABLE FOR ANY SPECIAL, INDIRECT, OR
113382a67e7Sgdamore CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
114382a67e7Sgdamore LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT,
115382a67e7Sgdamore NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION
116382a67e7Sgdamore WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
117382a67e7Sgdamore */
118382a67e7Sgdamore 
119382a67e7Sgdamore #include <sys/cdefs.h>
120*d08eccdbSphx __KERNEL_RCSID(0, "$NetBSD: mcclock_isa.c,v 1.6 2014/06/20 09:47:15 phx Exp $");
121382a67e7Sgdamore 
122382a67e7Sgdamore #include <sys/param.h>
123382a67e7Sgdamore #include <sys/systm.h>
124382a67e7Sgdamore #include <sys/kernel.h>
125382a67e7Sgdamore #include <sys/device.h>
126382a67e7Sgdamore #include <sys/time.h>
127382a67e7Sgdamore 
128ed9977b1Sdyoung #include <sys/bus.h>
129382a67e7Sgdamore 
130382a67e7Sgdamore #include <dev/clock_subr.h>
131382a67e7Sgdamore #include <dev/isa/isareg.h>
132382a67e7Sgdamore #include <dev/isa/isavar.h>
133382a67e7Sgdamore #include <dev/ic/mc146818reg.h>
134382a67e7Sgdamore #include <dev/ic/mc146818var.h>
135382a67e7Sgdamore 
136382a67e7Sgdamore /*
137382a67e7Sgdamore  * We only deal with the RTC portion of the mc146818 right now.  Later
138382a67e7Sgdamore  * we might want to add support for the NVRAM portion, since it
139382a67e7Sgdamore  * appears that some systems use that.
140382a67e7Sgdamore  */
141382a67e7Sgdamore 
142048fb884Stsutsui static int mcclock_isa_probe(device_t, cfdata_t, void *);
143048fb884Stsutsui static void mcclock_isa_attach(device_t, device_t, void *);
144382a67e7Sgdamore 
145048fb884Stsutsui CFATTACH_DECL_NEW(mcclock_isa, sizeof(struct mc146818_softc),
146382a67e7Sgdamore     mcclock_isa_probe, mcclock_isa_attach, NULL, NULL);
147382a67e7Sgdamore 
148382a67e7Sgdamore static unsigned
mcclock_isa_read(struct mc146818_softc * sc,unsigned reg)149382a67e7Sgdamore mcclock_isa_read(struct mc146818_softc *sc, unsigned reg)
150382a67e7Sgdamore {
151382a67e7Sgdamore 
152382a67e7Sgdamore 	bus_space_write_1(sc->sc_bst, sc->sc_bsh, 0, reg);
153382a67e7Sgdamore 	return bus_space_read_1(sc->sc_bst, sc->sc_bsh, 1);
154382a67e7Sgdamore }
155382a67e7Sgdamore 
156382a67e7Sgdamore static void
mcclock_isa_write(struct mc146818_softc * sc,unsigned reg,unsigned datum)157382a67e7Sgdamore mcclock_isa_write(struct mc146818_softc *sc, unsigned reg, unsigned datum)
158382a67e7Sgdamore {
159382a67e7Sgdamore 
160382a67e7Sgdamore 	bus_space_write_1(sc->sc_bst, sc->sc_bsh, 0, reg);
161382a67e7Sgdamore 	bus_space_write_1(sc->sc_bst, sc->sc_bsh, 1, datum);
162382a67e7Sgdamore }
163382a67e7Sgdamore 
164382a67e7Sgdamore int
mcclock_isa_probe(device_t parent,cfdata_t cf,void * aux)165048fb884Stsutsui mcclock_isa_probe(device_t parent, cfdata_t cf, void *aux)
166382a67e7Sgdamore {
167382a67e7Sgdamore 	struct isa_attach_args *ia = aux;
168382a67e7Sgdamore 	bus_space_handle_t ioh;
169382a67e7Sgdamore 
170382a67e7Sgdamore 	if (ia->ia_nio < 1)
171382a67e7Sgdamore 		return 0;
172382a67e7Sgdamore 
173382a67e7Sgdamore 	if (ISA_DIRECT_CONFIG(ia))
174382a67e7Sgdamore 		return 0;
175382a67e7Sgdamore 
176382a67e7Sgdamore 	if ((ia->ia_io[0].ir_addr != ISA_UNKNOWN_PORT) &&
177382a67e7Sgdamore 	    (ia->ia_io[0].ir_addr != IO_RTC))
178382a67e7Sgdamore 		return 0;
179382a67e7Sgdamore 
180382a67e7Sgdamore 	if (ia->ia_niomem > 0 &&
181382a67e7Sgdamore 	    (ia->ia_iomem[0].ir_addr != ISA_UNKNOWN_IOMEM))
182382a67e7Sgdamore 		return 0;
183382a67e7Sgdamore 
184382a67e7Sgdamore 	if (ia->ia_nirq > 0 &&
185382a67e7Sgdamore 	    (ia->ia_irq[0].ir_irq != ISA_UNKNOWN_IRQ))
186382a67e7Sgdamore 		return 0;
187382a67e7Sgdamore 
188382a67e7Sgdamore 	if (ia->ia_ndrq > 0 &&
189382a67e7Sgdamore 	    (ia->ia_drq[0].ir_drq != ISA_UNKNOWN_DRQ))
190382a67e7Sgdamore 		return 0;
191382a67e7Sgdamore 
192382a67e7Sgdamore 	if (bus_space_map(ia->ia_iot, IO_RTC, 2, 0, &ioh))
193382a67e7Sgdamore 		return 0;
194382a67e7Sgdamore 	bus_space_unmap(ia->ia_iot, ioh, 2);
195382a67e7Sgdamore 
196382a67e7Sgdamore 	ia->ia_io[0].ir_addr = IO_RTC;
197382a67e7Sgdamore 	ia->ia_io[0].ir_size = 2;
198382a67e7Sgdamore 	ia->ia_nio = 1;
199382a67e7Sgdamore 
200382a67e7Sgdamore 	ia->ia_niomem = 0;
201382a67e7Sgdamore 	ia->ia_nirq = 0;
202382a67e7Sgdamore 	ia->ia_ndrq = 0;
203382a67e7Sgdamore 
204382a67e7Sgdamore 	return 1;
205382a67e7Sgdamore }
206382a67e7Sgdamore 
207382a67e7Sgdamore void
mcclock_isa_attach(device_t parent,device_t self,void * aux)208048fb884Stsutsui mcclock_isa_attach(device_t parent, device_t self, void *aux)
209382a67e7Sgdamore {
210048fb884Stsutsui 	struct mc146818_softc *sc = device_private(self);
211382a67e7Sgdamore 	struct isa_attach_args *ia = aux;
212382a67e7Sgdamore 
2134090172bStsutsui 	sc->sc_dev = self;
214382a67e7Sgdamore 	sc->sc_bst = ia->ia_iot;
215382a67e7Sgdamore 	if (bus_space_map(sc->sc_bst, ia->ia_io[0].ir_addr,
216382a67e7Sgdamore 		ia->ia_io[0].ir_size, 0, &sc->sc_bsh)) {
217048fb884Stsutsui 		aprint_error(": can't map registers!\n");
218382a67e7Sgdamore 		return;
219382a67e7Sgdamore 	}
220382a67e7Sgdamore 
221382a67e7Sgdamore 	/*
222382a67e7Sgdamore 	 * Select a 32KHz crystal, periodic interrupt every 1024 Hz.
223382a67e7Sgdamore 	 * XXX: We disable periodic interrupts, so why set a rate?
224382a67e7Sgdamore 	 */
225382a67e7Sgdamore 	mcclock_isa_write(sc, MC_REGA, MC_BASE_32_KHz | MC_RATE_1024_Hz);
226382a67e7Sgdamore 
227382a67e7Sgdamore 	/*
228*d08eccdbSphx 	 * 24 Hour clock, binary-format, no auto-DST and no interrupts please.
229382a67e7Sgdamore 	 */
230*d08eccdbSphx 	mcclock_isa_write(sc, MC_REGB, MC_REGB_24HR | MC_REGB_BINARY);
231382a67e7Sgdamore 
232382a67e7Sgdamore 	sc->sc_year0 = 1900;
233382a67e7Sgdamore 	sc->sc_flag = 0;
234382a67e7Sgdamore 	sc->sc_mcread = mcclock_isa_read;
235382a67e7Sgdamore 	sc->sc_mcwrite = mcclock_isa_write;
236382a67e7Sgdamore #if 0
237382a67e7Sgdamore 	/*
238382a67e7Sgdamore 	 * XXX: perhaps on some systems we should manage the century byte?
239382a67e7Sgdamore 	 * For now we don't worry about it.  (Ugly MD code.)
240382a67e7Sgdamore 	 */
241382a67e7Sgdamore 	sc->sc_getcent = mcclock_isa_getcent;
242382a67e7Sgdamore 	sc->sc_setcent = mcclock_isa_setcent;
243382a67e7Sgdamore #endif
244382a67e7Sgdamore 	mc146818_attach(sc);
245048fb884Stsutsui 	aprint_normal("\n");
246382a67e7Sgdamore }
247