xref: /netbsd-src/sys/arch/atari/pci/pci_milan.c (revision 2a84159ada57dac1a3a322c289d36b976db1a473)
1*2a84159aStsutsui /*	$NetBSD: pci_milan.c,v 1.17 2023/01/06 10:28:28 tsutsui Exp $	*/
268f5fe6eSleo 
368f5fe6eSleo /*-
468f5fe6eSleo  * Copyright (c) 2001 The NetBSD Foundation, Inc.
568f5fe6eSleo  * All rights reserved.
668f5fe6eSleo  *
768f5fe6eSleo  * This code is derived from software contributed to The NetBSD Foundation
868f5fe6eSleo  * by Leo Weppelman.
968f5fe6eSleo  *
1068f5fe6eSleo  * Redistribution and use in source and binary forms, with or without
1168f5fe6eSleo  * modification, are permitted provided that the following conditions
1268f5fe6eSleo  * are met:
1368f5fe6eSleo  * 1. Redistributions of source code must retain the above copyright
1468f5fe6eSleo  *    notice, this list of conditions and the following disclaimer.
1568f5fe6eSleo  * 2. Redistributions in binary form must reproduce the above copyright
1668f5fe6eSleo  *    notice, this list of conditions and the following disclaimer in the
1768f5fe6eSleo  *    documentation and/or other materials provided with the distribution.
1868f5fe6eSleo  *
1968f5fe6eSleo  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
2068f5fe6eSleo  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
2168f5fe6eSleo  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
2268f5fe6eSleo  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
2368f5fe6eSleo  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
2468f5fe6eSleo  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
2568f5fe6eSleo  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
2668f5fe6eSleo  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
2768f5fe6eSleo  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
2868f5fe6eSleo  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
2968f5fe6eSleo  * POSSIBILITY OF SUCH DAMAGE.
3068f5fe6eSleo  */
3168f5fe6eSleo 
32e803bea7Slukem #include <sys/cdefs.h>
33*2a84159aStsutsui __KERNEL_RCSID(0, "$NetBSD: pci_milan.c,v 1.17 2023/01/06 10:28:28 tsutsui Exp $");
34e803bea7Slukem 
3568f5fe6eSleo #include <sys/types.h>
3668f5fe6eSleo #include <sys/param.h>
3768f5fe6eSleo #include <sys/systm.h>
3868f5fe6eSleo #include <sys/device.h>
3968f5fe6eSleo 
4068f5fe6eSleo #include <dev/pci/pcivar.h>
4168f5fe6eSleo #include <dev/pci/pcireg.h>
4268f5fe6eSleo 
432112cf10Sleo #include <dev/isa/isavar.h>		/* isa_intr_{dis}establish */
442112cf10Sleo #include <dev/isa/isareg.h>		/* isa_intr_{dis}establish */
452112cf10Sleo 
466f0f9f87Sdsl #include <sys/bswap.h>
472112cf10Sleo #include <machine/isa_machdep.h>	/* isa_intr_{dis}establish */
4868f5fe6eSleo 
49b1ff453aSleo #include <atari/pci/pci_vga.h>
50b1ff453aSleo #include <atari/dev/grf_etreg.h>
51b1ff453aSleo 
5268f5fe6eSleo int
pci_bus_maxdevs(pci_chipset_tag_t pc,int busno)53454af1c0Sdsl pci_bus_maxdevs(pci_chipset_tag_t pc, int busno)
5468f5fe6eSleo {
559b30bd93Stsutsui 
569b30bd93Stsutsui 	return 6;
5768f5fe6eSleo }
5868f5fe6eSleo 
5968f5fe6eSleo /*
6068f5fe6eSleo  * These are defined in locore.s:
6168f5fe6eSleo  */
6268f5fe6eSleo pcireg_t	milan_pci_confread(pcitag_t);
639b30bd93Stsutsui void		milan_pci_confwrite(uint32_t, pcireg_t);
649b30bd93Stsutsui extern uint32_t	plx_status;
6568f5fe6eSleo 
6668f5fe6eSleo pcireg_t
pci_conf_read(pci_chipset_tag_t pc,pcitag_t tag,int reg)67454af1c0Sdsl pci_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int reg)
6868f5fe6eSleo {
699b30bd93Stsutsui 	uint32_t data;
7068f5fe6eSleo 
719b30bd93Stsutsui 	if ((uint32_t)reg >= PCI_CONF_SIZE)
72605f564fSmsaitoh 		return 0xffffffff;
73605f564fSmsaitoh 
7468f5fe6eSleo 	data = bswap32(milan_pci_confread(tag | reg));
759b30bd93Stsutsui 	if ((plx_status & 0xf9000000) != 0) {
7668f5fe6eSleo 		/*
7768f5fe6eSleo 		 * Access error, assume nothing there...
7868f5fe6eSleo 		 */
7968f5fe6eSleo 		data = 0xffffffff;
8068f5fe6eSleo 	}
819b30bd93Stsutsui 	return data;
8268f5fe6eSleo }
8368f5fe6eSleo 
8468f5fe6eSleo 
8568f5fe6eSleo void
pci_conf_write(pci_chipset_tag_t pc,pcitag_t tag,int reg,pcireg_t data)86454af1c0Sdsl pci_conf_write(pci_chipset_tag_t pc, pcitag_t tag, int reg, pcireg_t data)
8768f5fe6eSleo {
88605f564fSmsaitoh 
899b30bd93Stsutsui 	if ((uint32_t)reg >= PCI_CONF_SIZE)
90605f564fSmsaitoh 		return;
91605f564fSmsaitoh 
9268f5fe6eSleo 	milan_pci_confwrite(tag | reg, bswap32(data));
9368f5fe6eSleo }
9468f5fe6eSleo 
9548ced055Sad int
pci_intr_setattr(pci_chipset_tag_t pc,pci_intr_handle_t * ih,int attr,uint64_t data)969b30bd93Stsutsui pci_intr_setattr(pci_chipset_tag_t pc, pci_intr_handle_t *ih, int attr,
979b30bd93Stsutsui     uint64_t data)
9848ced055Sad {
9948ced055Sad 
10048ced055Sad 	switch (attr) {
10148ced055Sad 	case PCI_INTR_MPSAFE:
10248ced055Sad 		return 0;
10348ced055Sad 	default:
10448ced055Sad 		return ENODEV;
10548ced055Sad 	}
10648ced055Sad }
10748ced055Sad 
10868f5fe6eSleo void *
pci_intr_establish(pci_chipset_tag_t pc,pci_intr_handle_t ih,int level,int (* ih_fun)(void *),void * ih_arg)1099b30bd93Stsutsui pci_intr_establish(pci_chipset_tag_t pc, pci_intr_handle_t ih, int level,
1109b30bd93Stsutsui     int (*ih_fun)(void *), void *ih_arg)
11168f5fe6eSleo {
1129b30bd93Stsutsui 
1132112cf10Sleo 	if (ih == 0 || ih >= 16 || ih == 2)
1140f09ed48Sprovos 		panic("pci_intr_establish: bogus handle 0x%x", ih);
1152112cf10Sleo 	return isa_intr_establish(NULL, ih, IST_LEVEL, level, ih_fun, ih_arg);
11668f5fe6eSleo }
11768f5fe6eSleo 
11868f5fe6eSleo void
pci_intr_disestablish(pci_chipset_tag_t pc,void * cookie)119454af1c0Sdsl pci_intr_disestablish(pci_chipset_tag_t pc, void *cookie)
12068f5fe6eSleo {
1219b30bd93Stsutsui 
1222112cf10Sleo 	isa_intr_disestablish(NULL, cookie);
12368f5fe6eSleo }
124b1ff453aSleo 
125b1ff453aSleo /*
126b1ff453aSleo  * VGA related stuff...
12757fdeaadStsutsui  *
128b1ff453aSleo  * It looks like the Milan BIOS is initializing the VGA card in a reasonably
129b1ff453aSleo  * standard text mode. However, the screen mode is 640*480 instead of 640*400.
130b1ff453aSleo  * Since wscons does not handle the right by default, the card is reprogrammed
131b1ff453aSleo  * to 640*400 using only 'standard' VGA registers (I hope!). So this ought to
132b1ff453aSleo  * work on cards other than the S3Trio card I have tested it on.
133b1ff453aSleo  */
13457fdeaadStsutsui static const uint8_t crt_tab[] = {
13557fdeaadStsutsui 	/* taken from vga_crtc[] in sys/dev/ic/vga_subr.c */
13657fdeaadStsutsui 	0x5f,	/* 00: horizontal total */
13757fdeaadStsutsui 	0x4f,	/* 01: horizontal display-enable end */
13857fdeaadStsutsui 	0x50,	/* 02: start horizontal blanking */
13957fdeaadStsutsui 	0x82,	/* 03: display skew control / end horizontal blanking */
14057fdeaadStsutsui 	0x55,	/* 04: start horizontal retrace pulse */
14157fdeaadStsutsui 	0x81,	/* 05: horizontal retrace delay / end horizontal retrace */
14257fdeaadStsutsui 	0xbf,	/* 06: vertical total */
14357fdeaadStsutsui 	0x1f,	/* 07: overflow register */
14457fdeaadStsutsui 	0x00,	/* 08: preset row scan */
14557fdeaadStsutsui 	0x4f,	/* 09: overflow / maximum scan line */
14657fdeaadStsutsui 	0x0d,	/* 0A: cursor off / cursor start */
14757fdeaadStsutsui 	0x0e,	/* 0B: cursor skew / cursor end */
14857fdeaadStsutsui 	0x00,	/* 0C: start regenerative buffer address high */
14957fdeaadStsutsui 	0x00,	/* 0D: start regenerative buffer address low */
15057fdeaadStsutsui 	0x00,	/* 0E: cursor location high */
15157fdeaadStsutsui 	0x00,	/* 0F: cursor location low */
15257fdeaadStsutsui 	0x9c,	/* 10: vertical retrace start */
15357fdeaadStsutsui 	0x8e,	/* 11: vertical interrupt / vertical retrace end */
15457fdeaadStsutsui 	0x8f,	/* 12: vertical display enable end */
15557fdeaadStsutsui 	0x28,	/* 13: logical line width */
15657fdeaadStsutsui 	0x00,	/* 14: underline location */
15757fdeaadStsutsui 	0x96,	/* 15: start vertical blanking */
15857fdeaadStsutsui 	0xb9,	/* 16: end vertical blanking */
15957fdeaadStsutsui 	0xa3,	/* 17: CRT mode control */
16057fdeaadStsutsui 	0xff	/* 18: line compare */
16157fdeaadStsutsui };
162b1ff453aSleo 
163b1ff453aSleo /*
164b1ff453aSleo  * XXX: Why are we repeating this everywhere! (Leo)
165b1ff453aSleo  */
166b1ff453aSleo #define PCI_LINMEMBASE  0x0e000000
167b1ff453aSleo 
168b1ff453aSleo void
milan_vga_init(pci_chipset_tag_t pc,pcitag_t tag,int id,volatile uint8_t * ba,uint8_t * fb)1699b30bd93Stsutsui milan_vga_init(pci_chipset_tag_t pc, pcitag_t tag, int id,
1709b30bd93Stsutsui     volatile uint8_t *ba, uint8_t *fb)
171b1ff453aSleo {
1729b30bd93Stsutsui 	uint32_t csr;
1739b30bd93Stsutsui 	int i;
174b1ff453aSleo 
175b1ff453aSleo 	/* Turn on the card */
176b1ff453aSleo 	pci_conf_write(pc, tag, PCI_MAPREG_START, PCI_LINMEMBASE);
177b1ff453aSleo 	csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
178b1ff453aSleo 	csr |= (PCI_COMMAND_MEM_ENABLE|PCI_COMMAND_IO_ENABLE);
179b1ff453aSleo 	csr |= PCI_COMMAND_MASTER_ENABLE;
180b1ff453aSleo 	pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr);
181b1ff453aSleo 
182b1ff453aSleo 	/*
183b1ff453aSleo 	 * Make sure we're allowed to write all crt-registers and reload them.
184b1ff453aSleo 	 */
185b1ff453aSleo 	WCrt(ba, CRT_ID_END_VER_RETR, (RCrt(ba, CRT_ID_END_VER_RETR) & 0x7f));
186b1ff453aSleo 
187b1ff453aSleo 	for (i = 0; i < 0x18; i++)
188b1ff453aSleo 		WCrt(ba, i, crt_tab[i]);
189b1ff453aSleo 
190b1ff453aSleo 	/*
191b1ff453aSleo 	 * The Milan has a white border... make it black
192b1ff453aSleo 	 */
193b1ff453aSleo 	WAttr(ba, 0x11, 0|0x20);
194b1ff453aSleo }
195