1*39e23982Sjmcneill /* $NetBSD: zynq7000_uart.c,v 1.3 2022/10/25 22:49:39 jmcneill Exp $ */
2c8c5b6beSskrll
3c8c5b6beSskrll /*-
4c8c5b6beSskrll * Copyright (c) 2015 Genetec Corporation. All rights reserved.
5c8c5b6beSskrll * Written by Hashimoto Kenichi for Genetec Corporation.
6c8c5b6beSskrll *
7c8c5b6beSskrll * Redistribution and use in source and binary forms, with or without
8c8c5b6beSskrll * modification, are permitted provided that the following conditions
9c8c5b6beSskrll * are met:
10c8c5b6beSskrll * 1. Redistributions of source code must retain the above copyright
11c8c5b6beSskrll * notice, this list of conditions and the following disclaimer.
12c8c5b6beSskrll * 2. Redistributions in binary form must reproduce the above copyright
13c8c5b6beSskrll * notice, this list of conditions and the following disclaimer in the
14c8c5b6beSskrll * documentation and/or other materials provided with the distribution.
15c8c5b6beSskrll *
16c8c5b6beSskrll * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
17c8c5b6beSskrll * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18c8c5b6beSskrll * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19c8c5b6beSskrll * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
20c8c5b6beSskrll * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21c8c5b6beSskrll * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22c8c5b6beSskrll * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23c8c5b6beSskrll * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24c8c5b6beSskrll * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25c8c5b6beSskrll * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26c8c5b6beSskrll * POSSIBILITY OF SUCH DAMAGE.
27c8c5b6beSskrll */
28c8c5b6beSskrll
29c8c5b6beSskrll #include <sys/cdefs.h>
30*39e23982Sjmcneill __KERNEL_RCSID(0, "$NetBSD: zynq7000_uart.c,v 1.3 2022/10/25 22:49:39 jmcneill Exp $");
31c8c5b6beSskrll
32c8c5b6beSskrll #include "opt_soc.h"
33c8c5b6beSskrll #include "opt_console.h"
34c8c5b6beSskrll
35c8c5b6beSskrll #include <sys/param.h>
36c8c5b6beSskrll #include <sys/bus.h>
37c8c5b6beSskrll #include <sys/device.h>
38c8c5b6beSskrll
39c8c5b6beSskrll #include <arm/xilinx/zynq_uartreg.h>
40c8c5b6beSskrll #include <arm/xilinx/zynq_uartvar.h>
41c8c5b6beSskrll
42c8c5b6beSskrll #include <dev/fdt/fdtvar.h>
43c8c5b6beSskrll
446e54367aSthorpej static const struct device_compatible_entry compat_data[] = {
456e54367aSthorpej { .compat = "xlnx,xuartps" },
466e54367aSthorpej { .compat = "cdns,uart-r1p8" },
476e54367aSthorpej DEVICE_COMPAT_EOL
48c8c5b6beSskrll };
49c8c5b6beSskrll
50c8c5b6beSskrll int
zynquart_match(device_t parent,struct cfdata * cf,void * aux)51c8c5b6beSskrll zynquart_match(device_t parent, struct cfdata *cf, void *aux)
52c8c5b6beSskrll {
53c8c5b6beSskrll struct fdt_attach_args * const faa = aux;
54c8c5b6beSskrll
556e54367aSthorpej return of_compatible_match(faa->faa_phandle, compat_data);
56c8c5b6beSskrll }
57c8c5b6beSskrll
58c8c5b6beSskrll void
zynquart_attach(device_t parent,device_t self,void * aux)59c8c5b6beSskrll zynquart_attach(device_t parent, device_t self, void *aux)
60c8c5b6beSskrll {
61c8c5b6beSskrll struct fdt_attach_args * faa = aux;
62c8c5b6beSskrll const int phandle = faa->faa_phandle;
63c8c5b6beSskrll char intrstr[128];
64c8c5b6beSskrll bus_addr_t addr;
65c8c5b6beSskrll bus_size_t size;
66c8c5b6beSskrll
67c8c5b6beSskrll if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
68c8c5b6beSskrll aprint_error(": couldn't get registers\n");
69c8c5b6beSskrll return;
70c8c5b6beSskrll }
71c8c5b6beSskrll
72c8c5b6beSskrll if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) {
73c8c5b6beSskrll aprint_error(": failed to decode interrupt\n");
74c8c5b6beSskrll return;
75c8c5b6beSskrll }
76c8c5b6beSskrll
77c8c5b6beSskrll if (fdtbus_intr_establish(phandle, 0, IPL_SERIAL, IST_LEVEL,
78c8c5b6beSskrll zynquartintr, device_private(self)) == NULL) {
79*39e23982Sjmcneill aprint_error(": failed to establish interrupt on %s\n", intrstr);
80c8c5b6beSskrll return;
81c8c5b6beSskrll }
82c8c5b6beSskrll
83c8c5b6beSskrll zynquart_attach_common(parent, self, faa->faa_bst, addr, size, 0);
84*39e23982Sjmcneill aprint_normal_dev(self, "interrupting on %s\n", intrstr);
85c8c5b6beSskrll }
86c8c5b6beSskrll
87c8c5b6beSskrll /*
88c8c5b6beSskrll * Console support
89c8c5b6beSskrll */
90c8c5b6beSskrll
91c8c5b6beSskrll static int
zynq_uart_console_match(int phandle)92c8c5b6beSskrll zynq_uart_console_match(int phandle)
93c8c5b6beSskrll {
946e54367aSthorpej return of_compatible_match(phandle, compat_data);
95c8c5b6beSskrll }
96c8c5b6beSskrll
97c8c5b6beSskrll static void
zynq_uart_console_consinit(struct fdt_attach_args * faa,u_int uart_freq)98c8c5b6beSskrll zynq_uart_console_consinit(struct fdt_attach_args *faa, u_int uart_freq)
99c8c5b6beSskrll {
100c8c5b6beSskrll const int phandle = faa->faa_phandle;
101c8c5b6beSskrll bus_space_tag_t bst = faa->faa_bst;
102c8c5b6beSskrll bus_addr_t addr;
103c8c5b6beSskrll tcflag_t flags;
104c8c5b6beSskrll int speed;
105c8c5b6beSskrll
106c8c5b6beSskrll fdtbus_get_reg(phandle, 0, &addr, NULL);
107c8c5b6beSskrll speed = fdtbus_get_stdout_speed();
108c8c5b6beSskrll if (speed < 0)
109c8c5b6beSskrll speed = 115200; /* default */
110c8c5b6beSskrll flags = fdtbus_get_stdout_flags();
111c8c5b6beSskrll
112c8c5b6beSskrll if (zynquart_cons_attach(bst, addr, speed, flags))
113c8c5b6beSskrll panic("Cannot initialize zynq uart console");
114c8c5b6beSskrll }
115c8c5b6beSskrll
116c8c5b6beSskrll static const struct fdt_console zynq_uart_console = {
117c8c5b6beSskrll .match = zynq_uart_console_match,
118c8c5b6beSskrll .consinit = zynq_uart_console_consinit,
119c8c5b6beSskrll };
120c8c5b6beSskrll
121c8c5b6beSskrll FDT_CONSOLE(zynq_uart, &zynq_uart_console);
122