1*dd47db3eSriastradh /* $NetBSD: sunxi_dwhdmi.c,v 1.11 2021/12/19 11:01:10 riastradh Exp $ */
2a9d03646Sjmcneill
3a9d03646Sjmcneill /*-
4a9d03646Sjmcneill * Copyright (c) 2019 Jared D. McNeill <jmcneill@invisible.ca>
5a9d03646Sjmcneill * All rights reserved.
6a9d03646Sjmcneill *
7a9d03646Sjmcneill * Redistribution and use in source and binary forms, with or without
8a9d03646Sjmcneill * modification, are permitted provided that the following conditions
9a9d03646Sjmcneill * are met:
10a9d03646Sjmcneill * 1. Redistributions of source code must retain the above copyright
11a9d03646Sjmcneill * notice, this list of conditions and the following disclaimer.
12a9d03646Sjmcneill * 2. Redistributions in binary form must reproduce the above copyright
13a9d03646Sjmcneill * notice, this list of conditions and the following disclaimer in the
14a9d03646Sjmcneill * documentation and/or other materials provided with the distribution.
15a9d03646Sjmcneill *
16a9d03646Sjmcneill * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17a9d03646Sjmcneill * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18a9d03646Sjmcneill * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19a9d03646Sjmcneill * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20a9d03646Sjmcneill * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21a9d03646Sjmcneill * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22a9d03646Sjmcneill * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23a9d03646Sjmcneill * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24a9d03646Sjmcneill * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25a9d03646Sjmcneill * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26a9d03646Sjmcneill * SUCH DAMAGE.
27a9d03646Sjmcneill */
28a9d03646Sjmcneill
29a9d03646Sjmcneill #include <sys/cdefs.h>
30*dd47db3eSriastradh __KERNEL_RCSID(0, "$NetBSD: sunxi_dwhdmi.c,v 1.11 2021/12/19 11:01:10 riastradh Exp $");
31a9d03646Sjmcneill
32a9d03646Sjmcneill #include <sys/param.h>
33a9d03646Sjmcneill #include <sys/bus.h>
34*dd47db3eSriastradh #include <sys/conf.h>
35a9d03646Sjmcneill #include <sys/device.h>
36a9d03646Sjmcneill #include <sys/intr.h>
37a9d03646Sjmcneill #include <sys/kernel.h>
38*dd47db3eSriastradh #include <sys/systm.h>
39a9d03646Sjmcneill
40a9d03646Sjmcneill #include <dev/fdt/fdt_port.h>
41*dd47db3eSriastradh #include <dev/fdt/fdtvar.h>
42a9d03646Sjmcneill
43a9d03646Sjmcneill #include <dev/ic/dw_hdmi.h>
44a9d03646Sjmcneill
45a9d03646Sjmcneill #include <arm/sunxi/sunxi_hdmiphy.h>
46a9d03646Sjmcneill
47*dd47db3eSriastradh #include <drm/drm_drv.h>
48*dd47db3eSriastradh
49a9d03646Sjmcneill enum {
50a9d03646Sjmcneill DWHDMI_PORT_INPUT = 0,
51a9d03646Sjmcneill DWHDMI_PORT_OUTPUT = 1,
52a9d03646Sjmcneill };
53a9d03646Sjmcneill
546e54367aSthorpej static const struct device_compatible_entry compat_data[] = {
556e54367aSthorpej { .compat = "allwinner,sun8i-h3-dw-hdmi" },
566e54367aSthorpej { .compat = "allwinner,sun50i-a64-dw-hdmi" },
576e54367aSthorpej DEVICE_COMPAT_EOL
58a9d03646Sjmcneill };
59a9d03646Sjmcneill
60a9d03646Sjmcneill struct sunxi_dwhdmi_softc {
61a9d03646Sjmcneill struct dwhdmi_softc sc_base;
62a9d03646Sjmcneill int sc_phandle;
63a9d03646Sjmcneill struct fdtbus_phy *sc_phy;
64b3f75baeSjmcneill struct fdtbus_regulator *sc_regulator;
65ab6de37fSjmcneill struct clk *sc_clk;
66a9d03646Sjmcneill
67a9d03646Sjmcneill struct fdt_device_ports sc_ports;
68a9d03646Sjmcneill struct drm_display_mode sc_curmode;
69a9d03646Sjmcneill };
70a9d03646Sjmcneill
71a9d03646Sjmcneill #define to_sunxi_dwhdmi_softc(x) container_of(x, struct sunxi_dwhdmi_softc, sc_base)
72a9d03646Sjmcneill
73a9d03646Sjmcneill static int
sunxi_dwhdmi_ep_activate(device_t dev,struct fdt_endpoint * ep,bool activate)74a9d03646Sjmcneill sunxi_dwhdmi_ep_activate(device_t dev, struct fdt_endpoint *ep, bool activate)
75a9d03646Sjmcneill {
76a9d03646Sjmcneill struct sunxi_dwhdmi_softc * const sc = device_private(dev);
77a9d03646Sjmcneill struct fdt_endpoint *in_ep = fdt_endpoint_remote(ep);
78a9d03646Sjmcneill struct fdt_endpoint *out_ep, *out_rep;
79a9d03646Sjmcneill struct drm_encoder *encoder;
80a9d03646Sjmcneill struct drm_bridge *bridge;
81a9d03646Sjmcneill int error;
82a9d03646Sjmcneill
83a9d03646Sjmcneill if (!activate)
84a9d03646Sjmcneill return EINVAL;
85a9d03646Sjmcneill
86a9d03646Sjmcneill if (fdt_endpoint_port_index(ep) != DWHDMI_PORT_INPUT)
87a9d03646Sjmcneill return EINVAL;
88a9d03646Sjmcneill
89a9d03646Sjmcneill switch (fdt_endpoint_type(in_ep)) {
90a9d03646Sjmcneill case EP_DRM_ENCODER:
91a9d03646Sjmcneill encoder = fdt_endpoint_get_data(in_ep);
92a9d03646Sjmcneill break;
93a9d03646Sjmcneill case EP_DRM_BRIDGE:
94a9d03646Sjmcneill bridge = fdt_endpoint_get_data(in_ep);
95a9d03646Sjmcneill encoder = bridge->encoder;
96a9d03646Sjmcneill break;
97a9d03646Sjmcneill default:
98a9d03646Sjmcneill encoder = NULL;
99a9d03646Sjmcneill break;
100a9d03646Sjmcneill }
101a9d03646Sjmcneill
102a9d03646Sjmcneill if (encoder == NULL)
103a9d03646Sjmcneill return EINVAL;
104a9d03646Sjmcneill
105b3f75baeSjmcneill if (sc->sc_regulator != NULL) {
106b3f75baeSjmcneill error = fdtbus_regulator_enable(sc->sc_regulator);
107b3f75baeSjmcneill if (error != 0) {
108b3f75baeSjmcneill device_printf(dev, "couldn't enable supply\n");
109b3f75baeSjmcneill return error;
110b3f75baeSjmcneill }
111b3f75baeSjmcneill }
112b3f75baeSjmcneill
113a9d03646Sjmcneill error = dwhdmi_bind(&sc->sc_base, encoder);
114a9d03646Sjmcneill if (error != 0)
115a9d03646Sjmcneill return error;
116a9d03646Sjmcneill
117a9d03646Sjmcneill out_ep = fdt_endpoint_get_from_index(&sc->sc_ports, DWHDMI_PORT_OUTPUT, 0);
118a9d03646Sjmcneill if (out_ep != NULL) {
119a9d03646Sjmcneill /* Ignore downstream connectors, we have our own. */
120a9d03646Sjmcneill out_rep = fdt_endpoint_remote(out_ep);
121a9d03646Sjmcneill if (out_rep != NULL && fdt_endpoint_type(out_rep) == EP_DRM_CONNECTOR)
122a9d03646Sjmcneill return 0;
123a9d03646Sjmcneill
124a9d03646Sjmcneill error = fdt_endpoint_activate(out_ep, activate);
125a9d03646Sjmcneill if (error != 0)
126a9d03646Sjmcneill return error;
127a9d03646Sjmcneill }
128a9d03646Sjmcneill
129a9d03646Sjmcneill return 0;
130a9d03646Sjmcneill }
131a9d03646Sjmcneill
132a9d03646Sjmcneill static void *
sunxi_dwhdmi_ep_get_data(device_t dev,struct fdt_endpoint * ep)133a9d03646Sjmcneill sunxi_dwhdmi_ep_get_data(device_t dev, struct fdt_endpoint *ep)
134a9d03646Sjmcneill {
135a9d03646Sjmcneill struct sunxi_dwhdmi_softc * const sc = device_private(dev);
136a9d03646Sjmcneill
137a9d03646Sjmcneill return &sc->sc_base.sc_bridge;
138a9d03646Sjmcneill }
139a9d03646Sjmcneill
140a9d03646Sjmcneill static enum drm_connector_status
sunxi_dwhdmi_detect(struct dwhdmi_softc * dsc,bool force)141a9d03646Sjmcneill sunxi_dwhdmi_detect(struct dwhdmi_softc *dsc, bool force)
142a9d03646Sjmcneill {
143a9d03646Sjmcneill struct sunxi_dwhdmi_softc * const sc = to_sunxi_dwhdmi_softc(dsc);
144a9d03646Sjmcneill
145a9d03646Sjmcneill KASSERT(sc->sc_phy != NULL);
146a9d03646Sjmcneill
147a9d03646Sjmcneill if (sunxi_hdmiphy_detect(sc->sc_phy, force))
148a9d03646Sjmcneill return connector_status_connected;
149a9d03646Sjmcneill else
150a9d03646Sjmcneill return connector_status_disconnected;
151a9d03646Sjmcneill }
152a9d03646Sjmcneill
153a9d03646Sjmcneill static void
sunxi_dwhdmi_enable(struct dwhdmi_softc * dsc)154a9d03646Sjmcneill sunxi_dwhdmi_enable(struct dwhdmi_softc *dsc)
155a9d03646Sjmcneill {
156a9d03646Sjmcneill struct sunxi_dwhdmi_softc * const sc = to_sunxi_dwhdmi_softc(dsc);
157a9d03646Sjmcneill int error;
158a9d03646Sjmcneill
159a9d03646Sjmcneill KASSERT(sc->sc_phy != NULL);
160a9d03646Sjmcneill
161a9d03646Sjmcneill error = fdtbus_phy_enable(sc->sc_phy, true);
162a9d03646Sjmcneill if (error != 0) {
163a9d03646Sjmcneill device_printf(dsc->sc_dev, "failed to enable phy: %d\n", error);
164a9d03646Sjmcneill return;
165a9d03646Sjmcneill }
166a9d03646Sjmcneill
167a9d03646Sjmcneill error = sunxi_hdmiphy_config(sc->sc_phy, &sc->sc_curmode);
168a9d03646Sjmcneill if (error != 0)
169a9d03646Sjmcneill device_printf(dsc->sc_dev, "failed to configure phy: %d\n", error);
170a9d03646Sjmcneill }
171a9d03646Sjmcneill
172a9d03646Sjmcneill static void
sunxi_dwhdmi_disable(struct dwhdmi_softc * dsc)173a9d03646Sjmcneill sunxi_dwhdmi_disable(struct dwhdmi_softc *dsc)
174a9d03646Sjmcneill {
175a9d03646Sjmcneill struct sunxi_dwhdmi_softc * const sc = to_sunxi_dwhdmi_softc(dsc);
176a9d03646Sjmcneill int error;
177a9d03646Sjmcneill
178a9d03646Sjmcneill KASSERT(sc->sc_phy != NULL);
179a9d03646Sjmcneill
180a9d03646Sjmcneill error = fdtbus_phy_enable(sc->sc_phy, false);
181a9d03646Sjmcneill if (error != 0)
182a9d03646Sjmcneill device_printf(dsc->sc_dev, "failed to disable phy\n");
183a9d03646Sjmcneill }
184a9d03646Sjmcneill
185a9d03646Sjmcneill static void
sunxi_dwhdmi_mode_set(struct dwhdmi_softc * dsc,const struct drm_display_mode * mode,const struct drm_display_mode * adjusted_mode)1863973e774Sriastradh sunxi_dwhdmi_mode_set(struct dwhdmi_softc *dsc,
1873973e774Sriastradh const struct drm_display_mode *mode,
1883973e774Sriastradh const struct drm_display_mode *adjusted_mode)
189a9d03646Sjmcneill {
190a9d03646Sjmcneill struct sunxi_dwhdmi_softc * const sc = to_sunxi_dwhdmi_softc(dsc);
191ab6de37fSjmcneill int error;
192ab6de37fSjmcneill
193ab6de37fSjmcneill if (sc->sc_clk != NULL) {
194ab6de37fSjmcneill error = clk_set_rate(sc->sc_clk, adjusted_mode->clock * 1000);
195ab6de37fSjmcneill if (error != 0)
196ab6de37fSjmcneill device_printf(sc->sc_base.sc_dev,
197ab6de37fSjmcneill "couldn't set pixel clock to %u Hz: %d\n",
198ab6de37fSjmcneill adjusted_mode->clock * 1000, error);
199ab6de37fSjmcneill }
200a9d03646Sjmcneill
201a9d03646Sjmcneill sc->sc_curmode = *adjusted_mode;
202a9d03646Sjmcneill }
203a9d03646Sjmcneill
20450c8e8bfSjmcneill static audio_dai_tag_t
sunxi_dwhdmi_dai_get_tag(device_t dev,const void * data,size_t len)20550c8e8bfSjmcneill sunxi_dwhdmi_dai_get_tag(device_t dev, const void *data, size_t len)
20650c8e8bfSjmcneill {
20750c8e8bfSjmcneill struct sunxi_dwhdmi_softc * const sc = device_private(dev);
20850c8e8bfSjmcneill
20950c8e8bfSjmcneill if (len != 4)
21050c8e8bfSjmcneill return NULL;
21150c8e8bfSjmcneill
21250c8e8bfSjmcneill return &sc->sc_base.sc_dai;
21350c8e8bfSjmcneill }
21450c8e8bfSjmcneill
21550c8e8bfSjmcneill static struct fdtbus_dai_controller_func sunxi_dwhdmi_dai_funcs = {
21650c8e8bfSjmcneill .get_tag = sunxi_dwhdmi_dai_get_tag
21750c8e8bfSjmcneill };
21850c8e8bfSjmcneill
219a9d03646Sjmcneill static int
sunxi_dwhdmi_match(device_t parent,cfdata_t cf,void * aux)220a9d03646Sjmcneill sunxi_dwhdmi_match(device_t parent, cfdata_t cf, void *aux)
221a9d03646Sjmcneill {
222a9d03646Sjmcneill struct fdt_attach_args * const faa = aux;
223a9d03646Sjmcneill
2246e54367aSthorpej return of_compatible_match(faa->faa_phandle, compat_data);
225a9d03646Sjmcneill }
226a9d03646Sjmcneill
227a9d03646Sjmcneill static void
sunxi_dwhdmi_attach(device_t parent,device_t self,void * aux)228a9d03646Sjmcneill sunxi_dwhdmi_attach(device_t parent, device_t self, void *aux)
229a9d03646Sjmcneill {
230a9d03646Sjmcneill struct sunxi_dwhdmi_softc * const sc = device_private(self);
231a9d03646Sjmcneill struct fdt_attach_args * const faa = aux;
2323f206565Sjmcneill prop_dictionary_t prop = device_properties(self);
233a9d03646Sjmcneill const int phandle = faa->faa_phandle;
23449d3434bSjmcneill struct clk *clk_iahb, *clk_isfr, *clk_tmds;
235a9d03646Sjmcneill struct fdtbus_reset *rst;
2363f206565Sjmcneill bool is_disabled;
237a9d03646Sjmcneill bus_addr_t addr;
238a9d03646Sjmcneill bus_size_t size;
239a9d03646Sjmcneill
2403f206565Sjmcneill if (prop_dictionary_get_bool(prop, "disabled", &is_disabled) && is_disabled) {
2413f206565Sjmcneill aprint_naive("\n");
2423f206565Sjmcneill aprint_normal(": HDMI TX (disabled)\n");
2433f206565Sjmcneill return;
2443f206565Sjmcneill }
2453f206565Sjmcneill
246a9d03646Sjmcneill if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
247a9d03646Sjmcneill aprint_error(": couldn't get registers\n");
248a9d03646Sjmcneill return;
249a9d03646Sjmcneill }
250a9d03646Sjmcneill
251a9d03646Sjmcneill clk_iahb = fdtbus_clock_get(phandle, "iahb");
252a9d03646Sjmcneill if (clk_iahb == NULL || clk_enable(clk_iahb) != 0) {
253a9d03646Sjmcneill aprint_error(": couldn't enable iahb clock\n");
254a9d03646Sjmcneill return;
255a9d03646Sjmcneill }
256a9d03646Sjmcneill
257a9d03646Sjmcneill clk_isfr = fdtbus_clock_get(phandle, "isfr");
258a9d03646Sjmcneill if (clk_isfr == NULL || clk_enable(clk_isfr) != 0) {
259a9d03646Sjmcneill aprint_error(": couldn't enable isfr clock\n");
260a9d03646Sjmcneill return;
261a9d03646Sjmcneill }
262a9d03646Sjmcneill
26349d3434bSjmcneill clk_tmds = fdtbus_clock_get(phandle, "tmds");
26449d3434bSjmcneill if (clk_tmds == NULL || clk_enable(clk_tmds) != 0) {
26549d3434bSjmcneill aprint_error(": couldn't enable tmds clock\n");
26649d3434bSjmcneill return;
26749d3434bSjmcneill }
26849d3434bSjmcneill
269a9d03646Sjmcneill sc->sc_base.sc_dev = self;
270a9d03646Sjmcneill sc->sc_base.sc_reg_width = 1;
271a9d03646Sjmcneill sc->sc_base.sc_bst = faa->faa_bst;
272a9d03646Sjmcneill if (bus_space_map(sc->sc_base.sc_bst, addr, size, 0, &sc->sc_base.sc_bsh) != 0) {
273a9d03646Sjmcneill aprint_error(": couldn't map registers\n");
274a9d03646Sjmcneill return;
275a9d03646Sjmcneill }
276a9d03646Sjmcneill sc->sc_base.sc_detect = sunxi_dwhdmi_detect;
277a9d03646Sjmcneill sc->sc_base.sc_enable = sunxi_dwhdmi_enable;
278a9d03646Sjmcneill sc->sc_base.sc_disable = sunxi_dwhdmi_disable;
279a9d03646Sjmcneill sc->sc_base.sc_mode_set = sunxi_dwhdmi_mode_set;
280b06e1df8Sjmcneill sc->sc_base.sc_scl_hcnt = 0xd8;
281b06e1df8Sjmcneill sc->sc_base.sc_scl_lcnt = 0xfe;
282a9d03646Sjmcneill sc->sc_phandle = faa->faa_phandle;
283ab6de37fSjmcneill sc->sc_clk = clk_tmds;
284a9d03646Sjmcneill
285a9d03646Sjmcneill aprint_naive("\n");
286a9d03646Sjmcneill aprint_normal(": HDMI TX\n");
287a9d03646Sjmcneill
288b06e1df8Sjmcneill sc->sc_regulator = fdtbus_regulator_acquire(sc->sc_phandle, "hvcc-supply");
289b06e1df8Sjmcneill
290b06e1df8Sjmcneill sc->sc_phy = fdtbus_phy_get(sc->sc_phandle, "hdmi-phy");
291b06e1df8Sjmcneill if (sc->sc_phy == NULL)
292b06e1df8Sjmcneill sc->sc_phy = fdtbus_phy_get(sc->sc_phandle, "phy");
293b06e1df8Sjmcneill if (sc->sc_phy == NULL) {
294b06e1df8Sjmcneill device_printf(self, "couldn't find PHY\n");
295b06e1df8Sjmcneill return;
296b06e1df8Sjmcneill }
297b06e1df8Sjmcneill
298ab6de37fSjmcneill rst = fdtbus_reset_get(phandle, "ctrl");
299ab6de37fSjmcneill if (rst == NULL || fdtbus_reset_deassert(rst) != 0) {
300ab6de37fSjmcneill aprint_error_dev(self, "couldn't de-assert reset\n");
301ab6de37fSjmcneill return;
302ab6de37fSjmcneill }
303ab6de37fSjmcneill
304b06e1df8Sjmcneill sunxi_hdmiphy_init(sc->sc_phy);
305b06e1df8Sjmcneill
306a9d03646Sjmcneill if (dwhdmi_attach(&sc->sc_base) != 0) {
307a9d03646Sjmcneill aprint_error_dev(self, "failed to attach driver\n");
308a9d03646Sjmcneill return;
309a9d03646Sjmcneill }
310a9d03646Sjmcneill
311a9d03646Sjmcneill sc->sc_ports.dp_ep_activate = sunxi_dwhdmi_ep_activate;
312a9d03646Sjmcneill sc->sc_ports.dp_ep_get_data = sunxi_dwhdmi_ep_get_data;
313a9d03646Sjmcneill fdt_ports_register(&sc->sc_ports, self, phandle, EP_DRM_BRIDGE);
31450c8e8bfSjmcneill
31550c8e8bfSjmcneill fdtbus_register_dai_controller(self, phandle, &sunxi_dwhdmi_dai_funcs);
316a9d03646Sjmcneill }
317a9d03646Sjmcneill
318a9d03646Sjmcneill CFATTACH_DECL_NEW(sunxi_dwhdmi, sizeof(struct sunxi_dwhdmi_softc),
319a9d03646Sjmcneill sunxi_dwhdmi_match, sunxi_dwhdmi_attach, NULL, NULL);
320