1*6e54367aSthorpej /* $NetBSD: sun9i_a80_mmcclk.c,v 1.3 2021/01/27 03:10:20 thorpej Exp $ */
2d72f6453Sjmcneill
3d72f6453Sjmcneill /*-
4d72f6453Sjmcneill * Copyright (c) 2017 Jared McNeill <jmcneill@invisible.ca>
5d72f6453Sjmcneill * All rights reserved.
6d72f6453Sjmcneill *
7d72f6453Sjmcneill * Redistribution and use in source and binary forms, with or without
8d72f6453Sjmcneill * modification, are permitted provided that the following conditions
9d72f6453Sjmcneill * are met:
10d72f6453Sjmcneill * 1. Redistributions of source code must retain the above copyright
11d72f6453Sjmcneill * notice, this list of conditions and the following disclaimer.
12d72f6453Sjmcneill * 2. Redistributions in binary form must reproduce the above copyright
13d72f6453Sjmcneill * notice, this list of conditions and the following disclaimer in the
14d72f6453Sjmcneill * documentation and/or other materials provided with the distribution.
15d72f6453Sjmcneill *
16d72f6453Sjmcneill * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17d72f6453Sjmcneill * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18d72f6453Sjmcneill * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19d72f6453Sjmcneill * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20d72f6453Sjmcneill * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21d72f6453Sjmcneill * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22d72f6453Sjmcneill * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23d72f6453Sjmcneill * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24d72f6453Sjmcneill * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25d72f6453Sjmcneill * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26d72f6453Sjmcneill * SUCH DAMAGE.
27d72f6453Sjmcneill */
28d72f6453Sjmcneill
29d72f6453Sjmcneill #include <sys/cdefs.h>
30d72f6453Sjmcneill
31*6e54367aSthorpej __KERNEL_RCSID(1, "$NetBSD: sun9i_a80_mmcclk.c,v 1.3 2021/01/27 03:10:20 thorpej Exp $");
32d72f6453Sjmcneill
33d72f6453Sjmcneill #include <sys/param.h>
34d72f6453Sjmcneill #include <sys/bus.h>
35d72f6453Sjmcneill #include <sys/device.h>
36d72f6453Sjmcneill #include <sys/systm.h>
37d72f6453Sjmcneill
38d72f6453Sjmcneill #include <dev/fdt/fdtvar.h>
39d72f6453Sjmcneill
40d72f6453Sjmcneill #include <arm/sunxi/sunxi_ccu.h>
41d72f6453Sjmcneill
42d72f6453Sjmcneill #define SDC_COMM(port) (0x04 * (port))
43d72f6453Sjmcneill
44d72f6453Sjmcneill static int sun9i_a80_mmcclk_match(device_t, cfdata_t, void *);
45d72f6453Sjmcneill static void sun9i_a80_mmcclk_attach(device_t, device_t, void *);
46d72f6453Sjmcneill
47*6e54367aSthorpej static const struct device_compatible_entry compat_data[] = {
48*6e54367aSthorpej { .compat = "allwinner,sun9i-a80-mmc-config-clk" },
49*6e54367aSthorpej DEVICE_COMPAT_EOL
50d72f6453Sjmcneill };
51d72f6453Sjmcneill
52d72f6453Sjmcneill CFATTACH_DECL_NEW(sunxi_a80_mmcclk, sizeof(struct sunxi_ccu_softc),
53d72f6453Sjmcneill sun9i_a80_mmcclk_match, sun9i_a80_mmcclk_attach, NULL, NULL);
54d72f6453Sjmcneill
55d72f6453Sjmcneill static struct sunxi_ccu_reset sun9i_a80_mmcclk_resets[] = {
56d72f6453Sjmcneill SUNXI_CCU_RESET(0, SDC_COMM(0), 18),
57d72f6453Sjmcneill SUNXI_CCU_RESET(1, SDC_COMM(1), 18),
58d72f6453Sjmcneill SUNXI_CCU_RESET(2, SDC_COMM(2), 18),
59d72f6453Sjmcneill SUNXI_CCU_RESET(3, SDC_COMM(3), 18),
60d72f6453Sjmcneill };
61d72f6453Sjmcneill
62d72f6453Sjmcneill static struct sunxi_ccu_clk sun9i_a80_mmcclk_clks[] = {
63d72f6453Sjmcneill SUNXI_CCU_GATE(0, "mmc0_config", "ahb", SDC_COMM(0), 16),
64d72f6453Sjmcneill SUNXI_CCU_GATE(1, "mmc1_config", "ahb", SDC_COMM(1), 16),
65d72f6453Sjmcneill SUNXI_CCU_GATE(2, "mmc2_config", "ahb", SDC_COMM(2), 16),
66d72f6453Sjmcneill SUNXI_CCU_GATE(3, "mmc3_config", "ahb", SDC_COMM(3), 16),
67d72f6453Sjmcneill };
68d72f6453Sjmcneill
69d72f6453Sjmcneill static int
sun9i_a80_mmcclk_match(device_t parent,cfdata_t cf,void * aux)70d72f6453Sjmcneill sun9i_a80_mmcclk_match(device_t parent, cfdata_t cf, void *aux)
71d72f6453Sjmcneill {
72d72f6453Sjmcneill struct fdt_attach_args * const faa = aux;
73d72f6453Sjmcneill
74*6e54367aSthorpej return of_compatible_match(faa->faa_phandle, compat_data);
75d72f6453Sjmcneill }
76d72f6453Sjmcneill
77d72f6453Sjmcneill static void
sun9i_a80_mmcclk_attach(device_t parent,device_t self,void * aux)78d72f6453Sjmcneill sun9i_a80_mmcclk_attach(device_t parent, device_t self, void *aux)
79d72f6453Sjmcneill {
80d72f6453Sjmcneill struct sunxi_ccu_softc * const sc = device_private(self);
81d72f6453Sjmcneill struct fdt_attach_args * const faa = aux;
820f22b55eSjmcneill const int phandle = faa->faa_phandle;
830f22b55eSjmcneill struct fdtbus_reset *rst;
840f22b55eSjmcneill struct clk *clk;
85d72f6453Sjmcneill
86d72f6453Sjmcneill sc->sc_dev = self;
87d72f6453Sjmcneill sc->sc_phandle = faa->faa_phandle;
88d72f6453Sjmcneill sc->sc_bst = faa->faa_bst;
89d72f6453Sjmcneill
90d72f6453Sjmcneill sc->sc_resets = sun9i_a80_mmcclk_resets;
91d72f6453Sjmcneill sc->sc_nresets = __arraycount(sun9i_a80_mmcclk_resets);
92d72f6453Sjmcneill
93d72f6453Sjmcneill sc->sc_clks = sun9i_a80_mmcclk_clks;
94d72f6453Sjmcneill sc->sc_nclks = __arraycount(sun9i_a80_mmcclk_clks);
95d72f6453Sjmcneill
960f22b55eSjmcneill clk = fdtbus_clock_get(phandle, "ahb");
970f22b55eSjmcneill if (clk == NULL || clk_enable(clk) != 0) {
980f22b55eSjmcneill aprint_error(": couldn't enable clock\n");
990f22b55eSjmcneill return;
1000f22b55eSjmcneill }
1010f22b55eSjmcneill rst = fdtbus_reset_get(phandle, "ahb");
1020f22b55eSjmcneill if (rst == NULL || fdtbus_reset_deassert(rst) != 0) {
1030f22b55eSjmcneill aprint_error(": couldn't de-assert reset\n");
1040f22b55eSjmcneill return;
1050f22b55eSjmcneill }
1060f22b55eSjmcneill
107d72f6453Sjmcneill if (sunxi_ccu_attach(sc) != 0)
108d72f6453Sjmcneill return;
109d72f6453Sjmcneill
110d72f6453Sjmcneill aprint_naive("\n");
111d72f6453Sjmcneill aprint_normal(": A80 SD/MMC-COMM\n");
112d72f6453Sjmcneill
113d72f6453Sjmcneill sunxi_ccu_print(sc);
114d72f6453Sjmcneill }
115