1*6e54367aSthorpej /* $NetBSD: sun8i_h3_r_ccu.c,v 1.2 2021/01/27 03:10:20 thorpej Exp $ */
2a5198ca0Sjmcneill
3a5198ca0Sjmcneill /*-
4a5198ca0Sjmcneill * Copyright (c) 2017 Jared McNeill <jmcneill@invisible.ca>
5a5198ca0Sjmcneill * All rights reserved.
6a5198ca0Sjmcneill *
7a5198ca0Sjmcneill * Redistribution and use in source and binary forms, with or without
8a5198ca0Sjmcneill * modification, are permitted provided that the following conditions
9a5198ca0Sjmcneill * are met:
10a5198ca0Sjmcneill * 1. Redistributions of source code must retain the above copyright
11a5198ca0Sjmcneill * notice, this list of conditions and the following disclaimer.
12a5198ca0Sjmcneill * 2. Redistributions in binary form must reproduce the above copyright
13a5198ca0Sjmcneill * notice, this list of conditions and the following disclaimer in the
14a5198ca0Sjmcneill * documentation and/or other materials provided with the distribution.
15a5198ca0Sjmcneill *
16a5198ca0Sjmcneill * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17a5198ca0Sjmcneill * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18a5198ca0Sjmcneill * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19a5198ca0Sjmcneill * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20a5198ca0Sjmcneill * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21a5198ca0Sjmcneill * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22a5198ca0Sjmcneill * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23a5198ca0Sjmcneill * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24a5198ca0Sjmcneill * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25a5198ca0Sjmcneill * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26a5198ca0Sjmcneill * SUCH DAMAGE.
27a5198ca0Sjmcneill */
28a5198ca0Sjmcneill
29a5198ca0Sjmcneill #include <sys/cdefs.h>
30a5198ca0Sjmcneill
31*6e54367aSthorpej __KERNEL_RCSID(1, "$NetBSD: sun8i_h3_r_ccu.c,v 1.2 2021/01/27 03:10:20 thorpej Exp $");
32a5198ca0Sjmcneill
33a5198ca0Sjmcneill #include <sys/param.h>
34a5198ca0Sjmcneill #include <sys/bus.h>
35a5198ca0Sjmcneill #include <sys/device.h>
36a5198ca0Sjmcneill #include <sys/systm.h>
37a5198ca0Sjmcneill
38a5198ca0Sjmcneill #include <dev/fdt/fdtvar.h>
39a5198ca0Sjmcneill
40a5198ca0Sjmcneill #include <arm/sunxi/sunxi_ccu.h>
41a5198ca0Sjmcneill #include <arm/sunxi/sun8i_h3_r_ccu.h>
42a5198ca0Sjmcneill
43a5198ca0Sjmcneill #define AR100_CFG_REG 0x00
44a5198ca0Sjmcneill #define APB0_CFG_REG 0x0c
45a5198ca0Sjmcneill #define APB0_GATE_REG 0x28
46a5198ca0Sjmcneill #define APB0_RESET_REG 0xb0
47a5198ca0Sjmcneill
48a5198ca0Sjmcneill static int sun8i_h3_r_ccu_match(device_t, cfdata_t, void *);
49a5198ca0Sjmcneill static void sun8i_h3_r_ccu_attach(device_t, device_t, void *);
50a5198ca0Sjmcneill
51*6e54367aSthorpej static const struct device_compatible_entry compat_data[] = {
52*6e54367aSthorpej { .compat = "allwinner,sun8i-h3-r-ccu" },
53*6e54367aSthorpej DEVICE_COMPAT_EOL
54a5198ca0Sjmcneill };
55a5198ca0Sjmcneill
56a5198ca0Sjmcneill CFATTACH_DECL_NEW(sunxi_h3_r_ccu, sizeof(struct sunxi_ccu_softc),
57a5198ca0Sjmcneill sun8i_h3_r_ccu_match, sun8i_h3_r_ccu_attach, NULL, NULL);
58a5198ca0Sjmcneill
59a5198ca0Sjmcneill static struct sunxi_ccu_reset sun8i_h3_r_ccu_resets[] = {
60a5198ca0Sjmcneill SUNXI_CCU_RESET(H3_R_RST_APB0_IR, APB0_RESET_REG, 1),
61a5198ca0Sjmcneill SUNXI_CCU_RESET(H3_R_RST_APB0_TIMER, APB0_RESET_REG, 2),
62a5198ca0Sjmcneill SUNXI_CCU_RESET(H3_R_RST_APB0_UART, APB0_RESET_REG, 4),
63a5198ca0Sjmcneill SUNXI_CCU_RESET(H3_R_RST_APB0_I2C, APB0_RESET_REG, 6),
64a5198ca0Sjmcneill };
65a5198ca0Sjmcneill
66a5198ca0Sjmcneill static const char *ar100_parents[] = { "losc", "hosc", "pll_periph0", "losc" };
67a5198ca0Sjmcneill static const char *apb0_parents[] = { "ahb0" };
68a5198ca0Sjmcneill
69a5198ca0Sjmcneill static struct sunxi_ccu_clk sun8i_h3_r_ccu_clks[] = {
70a5198ca0Sjmcneill SUNXI_CCU_PREDIV(H3_R_CLK_AR100, "ar100", ar100_parents,
71a5198ca0Sjmcneill AR100_CFG_REG, /* reg */
72a5198ca0Sjmcneill __BITS(12,8), /* prediv */
73a5198ca0Sjmcneill __BIT(2), /* prediv_sel */
74a5198ca0Sjmcneill __BITS(5,4), /* div */
75a5198ca0Sjmcneill __BITS(17,16), /* sel */
76a5198ca0Sjmcneill SUNXI_CCU_PREDIV_POWER_OF_TWO),
77a5198ca0Sjmcneill
78a5198ca0Sjmcneill SUNXI_CCU_FIXED_FACTOR(H3_R_CLK_AHB0, "ahb0", "ar100", 1, 1),
79a5198ca0Sjmcneill
80a5198ca0Sjmcneill SUNXI_CCU_DIV(H3_R_CLK_APB0, "apb0", apb0_parents,
81a5198ca0Sjmcneill APB0_CFG_REG, /* reg */
82a5198ca0Sjmcneill __BITS(1,0), /* div */
83a5198ca0Sjmcneill 0, /* sel */
84a5198ca0Sjmcneill SUNXI_CCU_DIV_POWER_OF_TWO),
85a5198ca0Sjmcneill
86a5198ca0Sjmcneill SUNXI_CCU_GATE(H3_R_CLK_APB0_PIO, "apb0-pio", "apb0",
87a5198ca0Sjmcneill APB0_GATE_REG, 0),
88a5198ca0Sjmcneill SUNXI_CCU_GATE(H3_R_CLK_APB0_IR, "apb0-ir", "apb0",
89a5198ca0Sjmcneill APB0_GATE_REG, 1),
90a5198ca0Sjmcneill SUNXI_CCU_GATE(H3_R_CLK_APB0_TIMER, "apb0-timer", "apb0",
91a5198ca0Sjmcneill APB0_GATE_REG, 2),
92a5198ca0Sjmcneill SUNXI_CCU_GATE(H3_R_CLK_APB0_UART, "apb0-uart", "apb0",
93a5198ca0Sjmcneill APB0_GATE_REG, 4),
94a5198ca0Sjmcneill SUNXI_CCU_GATE(H3_R_CLK_APB0_I2C, "apb0-i2c", "apb0",
95a5198ca0Sjmcneill APB0_GATE_REG, 6),
96a5198ca0Sjmcneill };
97a5198ca0Sjmcneill
98a5198ca0Sjmcneill static int
sun8i_h3_r_ccu_match(device_t parent,cfdata_t cf,void * aux)99a5198ca0Sjmcneill sun8i_h3_r_ccu_match(device_t parent, cfdata_t cf, void *aux)
100a5198ca0Sjmcneill {
101a5198ca0Sjmcneill struct fdt_attach_args * const faa = aux;
102a5198ca0Sjmcneill
103*6e54367aSthorpej return of_compatible_match(faa->faa_phandle, compat_data);
104a5198ca0Sjmcneill }
105a5198ca0Sjmcneill
106a5198ca0Sjmcneill static void
sun8i_h3_r_ccu_attach(device_t parent,device_t self,void * aux)107a5198ca0Sjmcneill sun8i_h3_r_ccu_attach(device_t parent, device_t self, void *aux)
108a5198ca0Sjmcneill {
109a5198ca0Sjmcneill struct sunxi_ccu_softc * const sc = device_private(self);
110a5198ca0Sjmcneill struct fdt_attach_args * const faa = aux;
111a5198ca0Sjmcneill
112a5198ca0Sjmcneill sc->sc_dev = self;
113a5198ca0Sjmcneill sc->sc_phandle = faa->faa_phandle;
114a5198ca0Sjmcneill sc->sc_bst = faa->faa_bst;
115a5198ca0Sjmcneill
116a5198ca0Sjmcneill sc->sc_resets = sun8i_h3_r_ccu_resets;
117a5198ca0Sjmcneill sc->sc_nresets = __arraycount(sun8i_h3_r_ccu_resets);
118a5198ca0Sjmcneill
119a5198ca0Sjmcneill sc->sc_clks = sun8i_h3_r_ccu_clks;
120a5198ca0Sjmcneill sc->sc_nclks = __arraycount(sun8i_h3_r_ccu_clks);
121a5198ca0Sjmcneill
122a5198ca0Sjmcneill if (sunxi_ccu_attach(sc) != 0)
123a5198ca0Sjmcneill return;
124a5198ca0Sjmcneill
125a5198ca0Sjmcneill aprint_naive("\n");
126a5198ca0Sjmcneill aprint_normal(": H3 PRCM CCU\n");
127a5198ca0Sjmcneill
128a5198ca0Sjmcneill sunxi_ccu_print(sc);
129a5198ca0Sjmcneill }
130