xref: /netbsd-src/sys/arch/arm/sunxi/sun50i_h6_r_ccu.h (revision 8b3491b4fb398f098b756ee6dff4bd4ba94fa3dd)
1*8b3491b4Sjakllsch /* $NetBSD: sun50i_h6_r_ccu.h,v 1.2 2021/11/10 17:38:11 jakllsch Exp $ */
2e332c422Sjmcneill 
3e332c422Sjmcneill /*-
4e332c422Sjmcneill  * Copyright (c) 2018 Jared McNeill <jmcneill@invisible.ca>
5e332c422Sjmcneill  * All rights reserved.
6e332c422Sjmcneill  *
7e332c422Sjmcneill  * Redistribution and use in source and binary forms, with or without
8e332c422Sjmcneill  * modification, are permitted provided that the following conditions
9e332c422Sjmcneill  * are met:
10e332c422Sjmcneill  * 1. Redistributions of source code must retain the above copyright
11e332c422Sjmcneill  *    notice, this list of conditions and the following disclaimer.
12e332c422Sjmcneill  * 2. Redistributions in binary form must reproduce the above copyright
13e332c422Sjmcneill  *    notice, this list of conditions and the following disclaimer in the
14e332c422Sjmcneill  *    documentation and/or other materials provided with the distribution.
15e332c422Sjmcneill  *
16e332c422Sjmcneill  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17e332c422Sjmcneill  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18e332c422Sjmcneill  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19e332c422Sjmcneill  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20e332c422Sjmcneill  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21e332c422Sjmcneill  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22e332c422Sjmcneill  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23e332c422Sjmcneill  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24e332c422Sjmcneill  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25e332c422Sjmcneill  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26e332c422Sjmcneill  * SUCH DAMAGE.
27e332c422Sjmcneill  */
28e332c422Sjmcneill 
29e332c422Sjmcneill #ifndef _SUN50I_H6_R_CCU_H
30e332c422Sjmcneill #define _SUN50I_H6_R_CCU_H
31e332c422Sjmcneill 
32e332c422Sjmcneill #define	H6_R_RST_APB1_TIMER	0
33e332c422Sjmcneill #define	H6_R_RST_APB1_TWD	1
34e332c422Sjmcneill #define	H6_R_RST_APB1_PWM	2
35e332c422Sjmcneill #define	H6_R_RST_APB2_UART	3
36e332c422Sjmcneill #define	H6_R_RST_APB2_I2C	4
37e332c422Sjmcneill #define	H6_R_RST_APB1_IR	5
38e332c422Sjmcneill #define	H6_R_RST_APB1_W1	6
39*8b3491b4Sjakllsch #define	H6_R_RST_APB2_RSB	7
40e332c422Sjmcneill 
41e332c422Sjmcneill #define	H6_R_CLK_AR100		0
42e332c422Sjmcneill #define	H6_R_CLK_AHB		1
43e332c422Sjmcneill #define	H6_R_CLK_APB1		2
44e332c422Sjmcneill #define	H6_R_CLK_APB2		3
45e332c422Sjmcneill #define	H6_R_CLK_APB1_TIMER	4
46e332c422Sjmcneill #define	H6_R_CLK_APB1_TWD	5
47e332c422Sjmcneill #define	H6_R_CLK_APB1_PWM	6
48e332c422Sjmcneill #define	H6_R_CLK_APB2_UART	7
49e332c422Sjmcneill #define	H6_R_CLK_APB2_I2C	8
50e332c422Sjmcneill #define	H6_R_CLK_APB1_IR	9
51e332c422Sjmcneill #define	H6_R_CLK_APB1_W1	10
52e332c422Sjmcneill #define	H6_R_CLK_IR		11
53e332c422Sjmcneill #define	H6_R_CLK_W1		12
54*8b3491b4Sjakllsch #define	H6_R_CLK_APB2_RSB	13
55e332c422Sjmcneill 
56e332c422Sjmcneill #endif /* !_SUN50I_H6_R_CCU_H */
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