1*66fba52eSthorpej /* $NetBSD: imx_i2c.c,v 1.3 2022/07/22 23:43:24 thorpej Exp $ */
28644267aSskrll
38644267aSskrll /*-
48644267aSskrll * Copyright (c) 2019 Genetec Corporation. All rights reserved.
58644267aSskrll * Written by Hashimoto Kenichi for Genetec Corporation.
68644267aSskrll *
78644267aSskrll * Redistribution and use in source and binary forms, with or without
88644267aSskrll * modification, are permitted provided that the following conditions
98644267aSskrll * are met:
108644267aSskrll * 1. Redistributions of source code must retain the above copyright
118644267aSskrll * notice, this list of conditions and the following disclaimer.
128644267aSskrll * 2. Redistributions in binary form must reproduce the above copyright
138644267aSskrll * notice, this list of conditions and the following disclaimer in the
148644267aSskrll * documentation and/or other materials provided with the distribution.
158644267aSskrll *
168644267aSskrll * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
178644267aSskrll * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
188644267aSskrll * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
198644267aSskrll * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
208644267aSskrll * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
218644267aSskrll * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
228644267aSskrll * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
238644267aSskrll * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
248644267aSskrll * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
258644267aSskrll * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
268644267aSskrll * SUCH DAMAGE.
278644267aSskrll */
288644267aSskrll
298644267aSskrll #include <sys/cdefs.h>
30*66fba52eSthorpej __KERNEL_RCSID(0, "$NetBSD: imx_i2c.c,v 1.3 2022/07/22 23:43:24 thorpej Exp $");
318644267aSskrll
328644267aSskrll #include <sys/bus.h>
338644267aSskrll
348644267aSskrll #include <arm/imx/imxi2cvar.h>
358644267aSskrll
368644267aSskrll #include <dev/fdt/fdtvar.h>
378644267aSskrll
386e54367aSthorpej static const struct device_compatible_entry compat_data[] = {
396e54367aSthorpej { .compat = "fsl,imx21-i2c" },
406e54367aSthorpej DEVICE_COMPAT_EOL
416e54367aSthorpej };
426e54367aSthorpej
438644267aSskrll int
imxi2c_match(device_t parent,cfdata_t cf,void * aux)448644267aSskrll imxi2c_match(device_t parent, cfdata_t cf, void *aux)
458644267aSskrll {
468644267aSskrll struct fdt_attach_args * const faa = aux;
478644267aSskrll
486e54367aSthorpej return of_compatible_match(faa->faa_phandle, compat_data);
498644267aSskrll }
508644267aSskrll
518644267aSskrll void
imxi2c_attach(device_t parent __unused,device_t self,void * aux)528644267aSskrll imxi2c_attach(device_t parent __unused, device_t self, void *aux)
538644267aSskrll {
54*66fba52eSthorpej struct imxi2c_softc *imxsc = device_private(self);
558644267aSskrll struct fdt_attach_args * const faa = aux;
568644267aSskrll const int phandle = faa->faa_phandle;
578644267aSskrll bus_space_tag_t bst = faa->faa_bst;
588644267aSskrll bus_addr_t addr;
598644267aSskrll bus_size_t size;
608644267aSskrll int error;
618644267aSskrll
628644267aSskrll if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
638644267aSskrll aprint_error(": couldn't get registers\n");
648644267aSskrll return;
658644267aSskrll }
668644267aSskrll
67*66fba52eSthorpej imxsc->sc_clk = fdtbus_clock_get_index(phandle, 0);
68*66fba52eSthorpej if (imxsc->sc_clk == NULL) {
698644267aSskrll aprint_error(": couldn't get clock\n");
708644267aSskrll return;
718644267aSskrll }
728644267aSskrll
73*66fba52eSthorpej error = clk_enable(imxsc->sc_clk);
748644267aSskrll if (error) {
75*66fba52eSthorpej aprint_error_dev(self, "couldn't enable: %d\n", error);
768644267aSskrll return;
778644267aSskrll }
788644267aSskrll
798644267aSskrll u_int freq;
808644267aSskrll error = of_getprop_uint32(phandle, "clock-frequency", &freq);
818644267aSskrll if (error)
828644267aSskrll freq = 100000;
838644267aSskrll
84*66fba52eSthorpej imxsc->sc_motoi2c.sc_phandle = phandle;
85*66fba52eSthorpej imxi2c_attach_common(self, bst, addr, size,
86*66fba52eSthorpej clk_get_rate(imxsc->sc_clk), freq);
878644267aSskrll }
88