xref: /netbsd-src/sys/arch/arm/nxp/imx_com.c (revision 6e54367a22fbc89a1139d033e95bec0c0cf0975b)
1*6e54367aSthorpej /*	$NetBSD: imx_com.c,v 1.3 2021/01/27 03:10:20 thorpej Exp $	*/
28644267aSskrll /*-
38644267aSskrll  * Copyright (c) 2019 Genetec Corporation.  All rights reserved.
48644267aSskrll  * Written by Hashimoto Kenichi for Genetec Corporation.
58644267aSskrll  *
68644267aSskrll  * Redistribution and use in source and binary forms, with or without
78644267aSskrll  * modification, are permitted provided that the following conditions
88644267aSskrll  * are met:
98644267aSskrll  * 1. Redistributions of source code must retain the above copyright
108644267aSskrll  *    notice, this list of conditions and the following disclaimer.
118644267aSskrll  * 2. Redistributions in binary form must reproduce the above copyright
128644267aSskrll  *    notice, this list of conditions and the following disclaimer in the
138644267aSskrll  *    documentation and/or other materials provided with the distribution.
148644267aSskrll  *
158644267aSskrll  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
168644267aSskrll  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
178644267aSskrll  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
188644267aSskrll  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
198644267aSskrll  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
208644267aSskrll  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
218644267aSskrll  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
228644267aSskrll  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
238644267aSskrll  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
248644267aSskrll  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
258644267aSskrll  * SUCH DAMAGE.
268644267aSskrll  */
278644267aSskrll 
288644267aSskrll #include <sys/cdefs.h>
29*6e54367aSthorpej __KERNEL_RCSID(0, "$NetBSD: imx_com.c,v 1.3 2021/01/27 03:10:20 thorpej Exp $");
308644267aSskrll 
318644267aSskrll #include "opt_fdt.h"
328644267aSskrll #include "opt_imxuart.h"
338644267aSskrll 
348644267aSskrll #include <sys/param.h>
358644267aSskrll #include <sys/bus.h>
368644267aSskrll #include <sys/device.h>
378644267aSskrll 
388644267aSskrll #include <dev/fdt/fdtvar.h>
398644267aSskrll 
408644267aSskrll #include <arm/imx/imxuartreg.h>
418644267aSskrll #include <arm/imx/imxuartvar.h>
428644267aSskrll 
438644267aSskrll static int imx_com_match(device_t, struct cfdata *, void *);
448644267aSskrll static void imx_com_attach(device_t, device_t, void *);
458644267aSskrll 
468644267aSskrll CFATTACH_DECL_NEW(imx_com, sizeof(struct imxuart_softc),
478644267aSskrll     imx_com_match, imx_com_attach, NULL, NULL);
488644267aSskrll 
49*6e54367aSthorpej static const struct device_compatible_entry compat_data[] = {
50*6e54367aSthorpej 	{ .compat = "fsl,imx6q-uart" },
51*6e54367aSthorpej 	DEVICE_COMPAT_EOL
528644267aSskrll };
538644267aSskrll 
548644267aSskrll static int
imx_com_match(device_t parent,struct cfdata * cf,void * aux)558644267aSskrll imx_com_match(device_t parent, struct cfdata *cf, void *aux)
568644267aSskrll {
578644267aSskrll 	struct fdt_attach_args * const faa = aux;
588644267aSskrll 
59*6e54367aSthorpej 	return of_compatible_match(faa->faa_phandle, compat_data);
608644267aSskrll }
618644267aSskrll 
628644267aSskrll static void
imx_com_attach(device_t parent,device_t self,void * aux)638644267aSskrll imx_com_attach(device_t parent, device_t self, void *aux)
648644267aSskrll {
658644267aSskrll 	struct imxuart_softc *sc = device_private(self);
668644267aSskrll 	struct imxuart_regs *regsp = &sc->sc_regs;
678644267aSskrll 	struct fdt_attach_args *faa = aux;
688644267aSskrll 	const int phandle = faa->faa_phandle;
698644267aSskrll 	bus_space_tag_t bst = faa->faa_bst;
708644267aSskrll 	bus_space_handle_t bsh;
718644267aSskrll 	char intrstr[128];
728644267aSskrll 	struct clk *per;
738644267aSskrll 	bus_addr_t addr;
748644267aSskrll 	bus_size_t size;
758644267aSskrll 
768644267aSskrll 	if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
778644267aSskrll 		aprint_error(": couldn't get registers\n");
788644267aSskrll 		return;
798644267aSskrll 	}
808644267aSskrll 
818644267aSskrll 	if (bus_space_map(bst, addr, size, 0, &bsh) != 0) {
828644267aSskrll 		aprint_error(": couldn't map registers\n");
838644267aSskrll 		return;
848644267aSskrll 	}
858644267aSskrll 
868644267aSskrll 	if (fdtbus_clock_enable(phandle, "ipg", false) != 0) {
878644267aSskrll 		aprint_error(": couldn't enable ipg clock\n");
888644267aSskrll 		return;
898644267aSskrll 	}
908644267aSskrll 
918644267aSskrll 	per = fdtbus_clock_get(phandle, "per");
928644267aSskrll 	if (per != NULL && clk_enable(per) != 0) {
938644267aSskrll 		aprint_error(": couldn't enable per clock\n");
948644267aSskrll 		return;
958644267aSskrll 	}
968644267aSskrll 
978644267aSskrll 	sc->sc_dev = self;
988644267aSskrll 	regsp->ur_iot = bst;
998644267aSskrll 	regsp->ur_iobase = addr;
1008644267aSskrll 	regsp->ur_ioh = bsh;
1018644267aSskrll 
1028644267aSskrll 	if (per != NULL) {
1038644267aSskrll 		aprint_normal(", %u Hz", clk_get_rate(per));
1048644267aSskrll 		/* XXX */
1058644267aSskrll 		imxuart_set_frequency(clk_get_rate(per), 2);
1068644267aSskrll 	}
1078644267aSskrll 
1088644267aSskrll 	if (imxuart_is_console(regsp->ur_iot, regsp->ur_iobase, &regsp->ur_ioh))
1098644267aSskrll 		aprint_normal(" (console)");
1108644267aSskrll 
1118644267aSskrll 	aprint_normal("\n");
1128644267aSskrll 
1138644267aSskrll 	if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) {
1148644267aSskrll 		aprint_error_dev(self, "failed to decode interrupt\n");
1158644267aSskrll 		return;
1168644267aSskrll 	}
1178644267aSskrll 
11882b8374aSjmcneill 	sc->sc_ih = fdtbus_intr_establish_xname(phandle, 0, IPL_SERIAL,
11982b8374aSjmcneill 	    0, imxuintr, sc, device_xname(self));
1208644267aSskrll 	if (sc->sc_ih == NULL) {
1218644267aSskrll 		aprint_error_dev(self, "failed to establish interrupt\n");
1228644267aSskrll 		return;
1238644267aSskrll 	}
1248644267aSskrll 
1258644267aSskrll 	aprint_normal_dev(self, "interrupting on %s\n", intrstr);
1268644267aSskrll 
1278644267aSskrll 	imxuart_attach_subr(sc);
1288644267aSskrll }
1298644267aSskrll 
1308644267aSskrll /*
1318644267aSskrll  * Console support
1328644267aSskrll  */
1338644267aSskrll 
1348644267aSskrll static int
imx_com_console_match(int phandle)1358644267aSskrll imx_com_console_match(int phandle)
1368644267aSskrll {
137*6e54367aSthorpej 	return of_compatible_match(phandle, compat_data);
1388644267aSskrll }
1398644267aSskrll 
1408644267aSskrll static void
imx_com_console_consinit(struct fdt_attach_args * faa,u_int uart_freq)1418644267aSskrll imx_com_console_consinit(struct fdt_attach_args *faa, u_int uart_freq)
1428644267aSskrll {
1438644267aSskrll 	const int phandle = faa->faa_phandle;
1448644267aSskrll 	bus_space_tag_t bst = faa->faa_bst;
1458644267aSskrll 	bus_addr_t addr;
1468644267aSskrll 	bus_size_t size;
1478644267aSskrll 	tcflag_t flags;
1488644267aSskrll 	int speed;
1498644267aSskrll 
1508644267aSskrll 	fdtbus_get_reg(phandle, 0, &addr, &size);
1518644267aSskrll 	speed = fdtbus_get_stdout_speed();
1528644267aSskrll 	if (speed < 0)
1538644267aSskrll 		speed = 115200;	/* default */
1548644267aSskrll 	flags = fdtbus_get_stdout_flags();
1558644267aSskrll 
1568644267aSskrll 	imxuart_set_frequency(uart_freq, 2);
1578644267aSskrll 	if (imxuart_cnattach(bst, addr, speed, flags) != 0)
1588644267aSskrll 		panic("cannot attach console UART");
1598644267aSskrll }
1608644267aSskrll 
1618644267aSskrll static const struct fdt_console imx_com_console = {
1628644267aSskrll 	.match = imx_com_console_match,
1638644267aSskrll 	.consinit = imx_com_console_consinit,
1648644267aSskrll };
1658644267aSskrll 
1668644267aSskrll FDT_CONSOLE(imx_com, &imx_com_console);
167