xref: /netbsd-src/sys/arch/arm/nxp/imx_ccm_composite.c (revision 8644267a503e0f573f2833152303dbf2ce4aca52)
1*8644267aSskrll /* $NetBSD: imx_ccm_composite.c,v 1.1 2020/12/23 14:42:38 skrll Exp $ */
2*8644267aSskrll 
3*8644267aSskrll /*-
4*8644267aSskrll  * Copyright (c) 2020 Jared McNeill <jmcneill@invisible.ca>
5*8644267aSskrll  * All rights reserved.
6*8644267aSskrll  *
7*8644267aSskrll  * Redistribution and use in source and binary forms, with or without
8*8644267aSskrll  * modification, are permitted provided that the following conditions
9*8644267aSskrll  * are met:
10*8644267aSskrll  * 1. Redistributions of source code must retain the above copyright
11*8644267aSskrll  *    notice, this list of conditions and the following disclaimer.
12*8644267aSskrll  * 2. Redistributions in binary form must reproduce the above copyright
13*8644267aSskrll  *    notice, this list of conditions and the following disclaimer in the
14*8644267aSskrll  *    documentation and/or other materials provided with the distribution.
15*8644267aSskrll  *
16*8644267aSskrll  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17*8644267aSskrll  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18*8644267aSskrll  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19*8644267aSskrll  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20*8644267aSskrll  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21*8644267aSskrll  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22*8644267aSskrll  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23*8644267aSskrll  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24*8644267aSskrll  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25*8644267aSskrll  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26*8644267aSskrll  * SUCH DAMAGE.
27*8644267aSskrll  */
28*8644267aSskrll 
29*8644267aSskrll #include <sys/cdefs.h>
30*8644267aSskrll __KERNEL_RCSID(0, "$NetBSD: imx_ccm_composite.c,v 1.1 2020/12/23 14:42:38 skrll Exp $");
31*8644267aSskrll 
32*8644267aSskrll #include <sys/param.h>
33*8644267aSskrll #include <sys/bus.h>
34*8644267aSskrll 
35*8644267aSskrll #include <dev/clk/clk_backend.h>
36*8644267aSskrll 
37*8644267aSskrll #include <arm/nxp/imx_ccm.h>
38*8644267aSskrll 
39*8644267aSskrll #include <dev/fdt/fdtvar.h>
40*8644267aSskrll 
41*8644267aSskrll #define	CCM_TARGET_ROOT		0x00
42*8644267aSskrll #define	 TARGET_ROOT_ENABLE	__BIT(28)
43*8644267aSskrll #define	 TARGET_ROOT_MUX	__BITS(26,24)
44*8644267aSskrll #define	 TARGET_ROOT_PRE_PODF	__BITS(18,16)
45*8644267aSskrll #define	 TARGET_ROOT_POST_PODF	__BITS(5,0)
46*8644267aSskrll 
47*8644267aSskrll int
imx_ccm_composite_enable(struct imx_ccm_softc * sc,struct imx_ccm_clk * clk,int enable)48*8644267aSskrll imx_ccm_composite_enable(struct imx_ccm_softc *sc, struct imx_ccm_clk *clk,
49*8644267aSskrll     int enable)
50*8644267aSskrll {
51*8644267aSskrll 	struct imx_ccm_composite *composite = &clk->u.composite;
52*8644267aSskrll 	uint32_t val;
53*8644267aSskrll 
54*8644267aSskrll 	KASSERT(clk->type == IMX_CCM_COMPOSITE);
55*8644267aSskrll 
56*8644267aSskrll 	val = CCM_READ(sc, clk->regidx, composite->reg + CCM_TARGET_ROOT);
57*8644267aSskrll 	if (enable)
58*8644267aSskrll 		val |= TARGET_ROOT_ENABLE;
59*8644267aSskrll 	else
60*8644267aSskrll 		val &= ~TARGET_ROOT_ENABLE;
61*8644267aSskrll 	CCM_WRITE(sc, clk->regidx, composite->reg + CCM_TARGET_ROOT, val);
62*8644267aSskrll 
63*8644267aSskrll 	return 0;
64*8644267aSskrll }
65*8644267aSskrll 
66*8644267aSskrll u_int
imx_ccm_composite_get_rate(struct imx_ccm_softc * sc,struct imx_ccm_clk * clk)67*8644267aSskrll imx_ccm_composite_get_rate(struct imx_ccm_softc *sc,
68*8644267aSskrll     struct imx_ccm_clk *clk)
69*8644267aSskrll {
70*8644267aSskrll 	struct imx_ccm_composite *composite = &clk->u.composite;
71*8644267aSskrll 	struct clk *clkp, *clkp_parent;
72*8644267aSskrll 
73*8644267aSskrll 	KASSERT(clk->type == IMX_CCM_COMPOSITE);
74*8644267aSskrll 
75*8644267aSskrll 	clkp = &clk->base;
76*8644267aSskrll 	clkp_parent = clk_get_parent(clkp);
77*8644267aSskrll 	if (clkp_parent == NULL)
78*8644267aSskrll 		return 0;
79*8644267aSskrll 
80*8644267aSskrll 	const u_int prate = clk_get_rate(clkp_parent);
81*8644267aSskrll 	if (prate == 0)
82*8644267aSskrll 		return 0;
83*8644267aSskrll 
84*8644267aSskrll 	const uint32_t val = CCM_READ(sc, clk->regidx, composite->reg + CCM_TARGET_ROOT);
85*8644267aSskrll 	const u_int pre_div = __SHIFTOUT(val, TARGET_ROOT_PRE_PODF) + 1;
86*8644267aSskrll 	const u_int post_div = __SHIFTOUT(val, TARGET_ROOT_POST_PODF) + 1;
87*8644267aSskrll 
88*8644267aSskrll 	return prate / pre_div / post_div;
89*8644267aSskrll }
90*8644267aSskrll 
91*8644267aSskrll int
imx_ccm_composite_set_rate(struct imx_ccm_softc * sc,struct imx_ccm_clk * clk,u_int rate)92*8644267aSskrll imx_ccm_composite_set_rate(struct imx_ccm_softc *sc,
93*8644267aSskrll     struct imx_ccm_clk *clk, u_int rate)
94*8644267aSskrll {
95*8644267aSskrll 	struct imx_ccm_composite *composite = &clk->u.composite;
96*8644267aSskrll 	u_int best_prediv, best_postdiv, best_diff;
97*8644267aSskrll 	struct imx_ccm_clk *rclk_parent;
98*8644267aSskrll 	struct clk *clk_parent;
99*8644267aSskrll 	uint32_t val;
100*8644267aSskrll 
101*8644267aSskrll 	KASSERT(clk->type == IMX_CCM_COMPOSITE);
102*8644267aSskrll 
103*8644267aSskrll 	if (composite->flags & IMX_COMPOSITE_SET_RATE_PARENT) {
104*8644267aSskrll 		clk_parent = clk_get_parent(&clk->base);
105*8644267aSskrll 		if (clk_parent == NULL)
106*8644267aSskrll 			return ENXIO;
107*8644267aSskrll 		return clk_set_rate(clk_parent, rate);
108*8644267aSskrll 	}
109*8644267aSskrll 
110*8644267aSskrll 	best_prediv = 0;
111*8644267aSskrll 	best_postdiv = 0;
112*8644267aSskrll 	best_diff = INT_MAX;
113*8644267aSskrll 
114*8644267aSskrll 	val = CCM_READ(sc, clk->regidx, composite->reg + CCM_TARGET_ROOT);
115*8644267aSskrll 	const u_int mux = __SHIFTOUT(val, TARGET_ROOT_MUX);
116*8644267aSskrll 
117*8644267aSskrll 	if (mux >= composite->nparents)
118*8644267aSskrll 		return EIO;
119*8644267aSskrll 
120*8644267aSskrll 	rclk_parent = imx_ccm_clock_find(sc, composite->parents[mux]);
121*8644267aSskrll 	if (rclk_parent != NULL)
122*8644267aSskrll 		clk_parent = &rclk_parent->base;
123*8644267aSskrll 	else
124*8644267aSskrll 		clk_parent = fdtbus_clock_byname(composite->parents[mux]);
125*8644267aSskrll 	if (clk_parent == NULL)
126*8644267aSskrll 		return EIO;
127*8644267aSskrll 
128*8644267aSskrll 	const u_int prate = clk_get_rate(clk_parent);
129*8644267aSskrll 	if (prate == 0)
130*8644267aSskrll 		return ERANGE;
131*8644267aSskrll 
132*8644267aSskrll 	for (u_int prediv = 1; prediv <= __SHIFTOUT_MASK(TARGET_ROOT_PRE_PODF) + 1; prediv++) {
133*8644267aSskrll 		for (u_int postdiv = 1; postdiv <= __SHIFTOUT_MASK(TARGET_ROOT_POST_PODF) + 1; postdiv++) {
134*8644267aSskrll 			const u_int cur_rate = prate / prediv / postdiv;
135*8644267aSskrll 			const int diff = (int)rate - (int)cur_rate;
136*8644267aSskrll 			if (composite->flags & IMX_COMPOSITE_ROUND_DOWN) {
137*8644267aSskrll 				if (diff >= 0 && diff < best_diff) {
138*8644267aSskrll 					best_diff = diff;
139*8644267aSskrll 					best_prediv = prediv;
140*8644267aSskrll 					best_postdiv = postdiv;
141*8644267aSskrll 				}
142*8644267aSskrll 			} else {
143*8644267aSskrll 				if (abs(diff) < best_diff) {
144*8644267aSskrll 					best_diff = abs(diff);
145*8644267aSskrll 					best_prediv = prediv;
146*8644267aSskrll 					best_postdiv = postdiv;
147*8644267aSskrll 				}
148*8644267aSskrll 			}
149*8644267aSskrll 		}
150*8644267aSskrll 	}
151*8644267aSskrll 	if (best_diff == INT_MAX)
152*8644267aSskrll 		return ERANGE;
153*8644267aSskrll 
154*8644267aSskrll 	val = CCM_READ(sc, clk->regidx, composite->reg + CCM_TARGET_ROOT);
155*8644267aSskrll 	val &= ~TARGET_ROOT_PRE_PODF;
156*8644267aSskrll 	val |= __SHIFTIN(best_prediv - 1, TARGET_ROOT_PRE_PODF);
157*8644267aSskrll 	val &= ~TARGET_ROOT_POST_PODF;
158*8644267aSskrll 	val |= __SHIFTIN(best_postdiv - 1, TARGET_ROOT_POST_PODF);
159*8644267aSskrll 	CCM_WRITE(sc, clk->regidx, composite->reg + CCM_TARGET_ROOT, val);
160*8644267aSskrll 
161*8644267aSskrll 	return 0;
162*8644267aSskrll }
163*8644267aSskrll 
164*8644267aSskrll const char *
imx_ccm_composite_get_parent(struct imx_ccm_softc * sc,struct imx_ccm_clk * clk)165*8644267aSskrll imx_ccm_composite_get_parent(struct imx_ccm_softc *sc,
166*8644267aSskrll     struct imx_ccm_clk *clk)
167*8644267aSskrll {
168*8644267aSskrll 	struct imx_ccm_composite *composite = &clk->u.composite;
169*8644267aSskrll 
170*8644267aSskrll 	KASSERT(clk->type == IMX_CCM_COMPOSITE);
171*8644267aSskrll 
172*8644267aSskrll 	const uint32_t val = CCM_READ(sc, clk->regidx, composite->reg + CCM_TARGET_ROOT);
173*8644267aSskrll 	const u_int mux = __SHIFTOUT(val, TARGET_ROOT_MUX);
174*8644267aSskrll 
175*8644267aSskrll 	if (mux >= composite->nparents)
176*8644267aSskrll 		return NULL;
177*8644267aSskrll 
178*8644267aSskrll 	return composite->parents[mux];
179*8644267aSskrll }
180*8644267aSskrll 
181*8644267aSskrll int
imx_ccm_composite_set_parent(struct imx_ccm_softc * sc,struct imx_ccm_clk * clk,const char * parent)182*8644267aSskrll imx_ccm_composite_set_parent(struct imx_ccm_softc *sc,
183*8644267aSskrll     struct imx_ccm_clk *clk, const char *parent)
184*8644267aSskrll {
185*8644267aSskrll 	struct imx_ccm_composite *composite = &clk->u.composite;
186*8644267aSskrll 	uint32_t val;
187*8644267aSskrll 
188*8644267aSskrll 	KASSERT(clk->type == IMX_CCM_COMPOSITE);
189*8644267aSskrll 
190*8644267aSskrll 	for (u_int mux = 0; mux < composite->nparents; mux++) {
191*8644267aSskrll 		if (strcmp(composite->parents[mux], parent) == 0) {
192*8644267aSskrll 			val = CCM_READ(sc, clk->regidx, composite->reg + CCM_TARGET_ROOT);
193*8644267aSskrll 			val &= ~TARGET_ROOT_MUX;
194*8644267aSskrll 			val |= __SHIFTIN(mux, TARGET_ROOT_MUX);
195*8644267aSskrll 			CCM_WRITE(sc, clk->regidx, composite->reg + CCM_TARGET_ROOT, val);
196*8644267aSskrll 			return 0;
197*8644267aSskrll 		}
198*8644267aSskrll 	}
199*8644267aSskrll 
200*8644267aSskrll 	return EINVAL;
201*8644267aSskrll }
202