1*e65a0eaaSskrll /* $NetBSD: machdep.h,v 1.36 2022/04/02 11:16:07 skrll Exp $ */
2e3a3a9f5Schris
3db3d341eSskrll #ifndef _ARM32_MACHDEP_H_
4db3d341eSskrll #define _ARM32_MACHDEP_H_
5e3a3a9f5Schris
6db6bf946Sskrll #ifdef _KERNEL
7db6bf946Sskrll
8a236d6e4Sskrll #define INIT_ARM_STACK_SHIFT 12
9a236d6e4Sskrll #define INIT_ARM_STACK_SIZE (1 << INIT_ARM_STACK_SHIFT)
10a236d6e4Sskrll #define INIT_ARM_TOTAL_STACK (INIT_ARM_STACK_SIZE * MAXCPUS)
11a236d6e4Sskrll
1283d36728Smatt /* Define various stack sizes in pages */
1383d36728Smatt #ifndef IRQ_STACK_SIZE
1483d36728Smatt #define IRQ_STACK_SIZE 1
1583d36728Smatt #endif
1683d36728Smatt #ifndef ABT_STACK_SIZE
1783d36728Smatt #define ABT_STACK_SIZE 1
1883d36728Smatt #endif
1983d36728Smatt #ifndef UND_STACK_SIZE
2083d36728Smatt #define UND_STACK_SIZE 1
2183d36728Smatt #endif
2283d36728Smatt #ifndef FIQ_STACK_SIZE
2383d36728Smatt #define FIQ_STACK_SIZE 1
2483d36728Smatt #endif
2583d36728Smatt
2683d36728Smatt extern void (*cpu_reset_address)(void);
2783d36728Smatt extern paddr_t cpu_reset_address_paddr;
2883d36728Smatt
296c9f6128Sjmcneill extern void (*cpu_powerdown_address)(void);
306c9f6128Sjmcneill
31a039bd91Smatt extern u_int data_abort_handler_address;
32a039bd91Smatt extern u_int prefetch_abort_handler_address;
3372c1c71eSmatt // extern u_int undefined_handler_address;
3472c1c71eSmatt #define undefined_handler_address (curcpu()->ci_undefsave[2])
35a039bd91Smatt
361f4278e1Smatt struct bootmem_info {
371f4278e1Smatt paddr_t bmi_start;
381f4278e1Smatt paddr_t bmi_kernelstart;
391f4278e1Smatt paddr_t bmi_kernelend;
401f4278e1Smatt paddr_t bmi_end;
411f4278e1Smatt pv_addrqh_t bmi_freechunks;
421f4278e1Smatt pv_addrqh_t bmi_chunks; /* sorted list of memory to be mapped */
431f4278e1Smatt pv_addr_t bmi_freeblocks[4];
441f4278e1Smatt /*
451f4278e1Smatt * These need to be static for pmap's kernel_pt list.
461f4278e1Smatt */
471f4278e1Smatt pv_addr_t bmi_vector_l2pt;
481f4278e1Smatt pv_addr_t bmi_io_l2pt;
497f427671Smatt pv_addr_t bmi_l2pts[32]; // for large memory disks.
501f4278e1Smatt u_int bmi_freepages;
511f4278e1Smatt u_int bmi_nfreeblocks;
521f4278e1Smatt };
531f4278e1Smatt
541f4278e1Smatt extern struct bootmem_info bootmem_info;
551f4278e1Smatt
56a039bd91Smatt extern char *booted_kernel;
577114d60fSskrll extern u_long kern_vtopdiff;
587114d60fSskrll
59e3a3a9f5Schris /* misc prototypes used by the many arm machdeps */
602101b6c7Smatt void cortex_pmc_ccnt_init(void);
61030faca8Sskrll void cpu_hatch(struct cpu_info *, u_int, void (*)(struct cpu_info *));
6202cdf4d2Sdsl void halt(void);
6302cdf4d2Sdsl void parse_mi_bootargs(char *);
6402cdf4d2Sdsl void data_abort_handler(trapframe_t *);
6502cdf4d2Sdsl void prefetch_abort_handler(trapframe_t *);
6602cdf4d2Sdsl void undefinedinstruction_bounce(trapframe_t *);
6702cdf4d2Sdsl void dumpsys(void);
68e3a3a9f5Schris
698dd3ca59Schris /*
708dd3ca59Schris * note that we use void * as all the platforms have different ideas on what
718dd3ca59Schris * the structure is
728dd3ca59Schris */
73bee3dfabSskrll vaddr_t initarm(void *);
741f4278e1Smatt struct pmap_devmap;
751f4278e1Smatt struct boot_physmem;
768853dbb8Sskrll
774fa64b2cSriastradh void cpu_startup_hook(void);
784fa64b2cSriastradh void cpu_startup_default(void);
794fa64b2cSriastradh
808853dbb8Sskrll static inline paddr_t
aarch32_kern_vtophys(vaddr_t va)818853dbb8Sskrll aarch32_kern_vtophys(vaddr_t va)
828853dbb8Sskrll {
838853dbb8Sskrll return va - kern_vtopdiff;
848853dbb8Sskrll }
858853dbb8Sskrll
868853dbb8Sskrll static inline vaddr_t
aarch32_kern_phystov(paddr_t pa)878853dbb8Sskrll aarch32_kern_phystov(paddr_t pa)
888853dbb8Sskrll {
898853dbb8Sskrll return pa + kern_vtopdiff;
908853dbb8Sskrll }
918853dbb8Sskrll
928853dbb8Sskrll #define KERN_VTOPHYS(va) aarch32_kern_vtophys(va)
938853dbb8Sskrll #define KERN_PHYSTOV(pa) aarch32_kern_phystov(pa)
948853dbb8Sskrll
9541117db8Sskrll void cpu_kernel_vm_init(paddr_t, psize_t);
9641117db8Sskrll
971f4278e1Smatt void arm32_bootmem_init(paddr_t memstart, psize_t memsize, paddr_t kernelstart);
981f4278e1Smatt void arm32_kernel_vm_init(vaddr_t kvm_base, vaddr_t vectors,
991f4278e1Smatt vaddr_t iovbase /* (can be zero) */,
1001f4278e1Smatt const struct pmap_devmap *devmap, bool mapallmem_p);
1011f4278e1Smatt vaddr_t initarm_common(vaddr_t kvm_base, vsize_t kvm_size,
1021f4278e1Smatt const struct boot_physmem *bp, size_t nbp);
1031f4278e1Smatt
104e6c2e807Sskrll void uartputc(int);
1058dd3ca59Schris
1068dd3ca59Schris /* from arm/arm32/intr.c */
10702cdf4d2Sdsl void dosoftints(void);
10802cdf4d2Sdsl void set_spl_masks(void);
1098dd3ca59Schris #ifdef DIAGNOSTIC
11002cdf4d2Sdsl void dump_spl_masks(void);
1118dd3ca59Schris #endif
112db6bf946Sskrll
113*e65a0eaaSskrll /* cpu_onfault */
114*e65a0eaaSskrll int cpu_set_onfault(struct faultbuf *) __returns_twice;
115*e65a0eaaSskrll void cpu_jump_onfault(struct trapframe *, const struct faultbuf *, int);
116*e65a0eaaSskrll
117*e65a0eaaSskrll static inline void
cpu_unset_onfault(void)118*e65a0eaaSskrll cpu_unset_onfault(void)
119*e65a0eaaSskrll {
120*e65a0eaaSskrll curpcb->pcb_onfault = NULL;
121*e65a0eaaSskrll }
122*e65a0eaaSskrll
123*e65a0eaaSskrll static inline void
cpu_enable_onfault(struct faultbuf * fb)124*e65a0eaaSskrll cpu_enable_onfault(struct faultbuf *fb)
125*e65a0eaaSskrll {
126*e65a0eaaSskrll curpcb->pcb_onfault = fb;
127*e65a0eaaSskrll }
128*e65a0eaaSskrll
129*e65a0eaaSskrll static inline struct faultbuf *
cpu_disable_onfault(void)130*e65a0eaaSskrll cpu_disable_onfault(void)
131*e65a0eaaSskrll {
132*e65a0eaaSskrll struct faultbuf * const fb = curpcb->pcb_onfault;
133*e65a0eaaSskrll if (fb != NULL)
134*e65a0eaaSskrll curpcb->pcb_onfault = NULL;
135*e65a0eaaSskrll return fb;
136*e65a0eaaSskrll }
137*e65a0eaaSskrll
138db6bf946Sskrll #endif /* _KERNEL */
139db6bf946Sskrll
140db6bf946Sskrll #endif /* _ARM32_MACHDEP_H_ */
141