xref: /netbsd-src/sys/arch/arm/fdt/arm_platform.c (revision 8d564c5dcfeea024762586ce07de3c286d3d30e1)
1*8d564c5dSskrll /* $NetBSD: arm_platform.c,v 1.7 2023/04/07 08:55:30 skrll Exp $ */
26080e166Sjmcneill 
36080e166Sjmcneill /*-
46080e166Sjmcneill  * Copyright (c) 2020 Jared McNeill <jmcneill@invisible.ca>
56080e166Sjmcneill  * All rights reserved.
66080e166Sjmcneill  *
76080e166Sjmcneill  * Redistribution and use in source and binary forms, with or without
86080e166Sjmcneill  * modification, are permitted provided that the following conditions
96080e166Sjmcneill  * are met:
106080e166Sjmcneill  * 1. Redistributions of source code must retain the above copyright
116080e166Sjmcneill  *    notice, this list of conditions and the following disclaimer.
126080e166Sjmcneill  * 2. Redistributions in binary form must reproduce the above copyright
136080e166Sjmcneill  *    notice, this list of conditions and the following disclaimer in the
146080e166Sjmcneill  *    documentation and/or other materials provided with the distribution.
156080e166Sjmcneill  *
166080e166Sjmcneill  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
176080e166Sjmcneill  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
186080e166Sjmcneill  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
196080e166Sjmcneill  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
206080e166Sjmcneill  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
216080e166Sjmcneill  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
226080e166Sjmcneill  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
236080e166Sjmcneill  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
246080e166Sjmcneill  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
256080e166Sjmcneill  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
266080e166Sjmcneill  * SUCH DAMAGE.
276080e166Sjmcneill  */
286080e166Sjmcneill 
296080e166Sjmcneill /*
306080e166Sjmcneill  * This is the default Arm FDT platform implementation. It assumes the
316080e166Sjmcneill  * following:
326080e166Sjmcneill  *
336080e166Sjmcneill  *  - Generic timer
346080e166Sjmcneill  *  - PSCI support
356080e166Sjmcneill  *  - Console UART is pre-configured by firmware
366080e166Sjmcneill  */
376080e166Sjmcneill 
3849721fc4Sskrll #include "opt_console.h"
3949721fc4Sskrll 
406080e166Sjmcneill #include <sys/cdefs.h>
41*8d564c5dSskrll __KERNEL_RCSID(0, "$NetBSD: arm_platform.c,v 1.7 2023/04/07 08:55:30 skrll Exp $");
426080e166Sjmcneill 
436080e166Sjmcneill #include <sys/param.h>
446080e166Sjmcneill #include <sys/bus.h>
456080e166Sjmcneill #include <sys/cpu.h>
466080e166Sjmcneill #include <sys/device.h>
476080e166Sjmcneill #include <sys/termios.h>
486080e166Sjmcneill 
496080e166Sjmcneill #include <dev/fdt/fdtvar.h>
506080e166Sjmcneill 
516080e166Sjmcneill #include <uvm/uvm_extern.h>
526080e166Sjmcneill 
536080e166Sjmcneill #include <machine/bootconfig.h>
54d8f0d2b3Sskrll 
556080e166Sjmcneill #include <arm/cpufunc.h>
566080e166Sjmcneill 
576080e166Sjmcneill #include <arm/cortex/gtmr_var.h>
586080e166Sjmcneill 
596080e166Sjmcneill #include <arm/arm/psci.h>
60*8d564c5dSskrll 
61*8d564c5dSskrll #include <arm/fdt/arm_fdtvar.h>
626080e166Sjmcneill #include <arm/fdt/psci_fdtvar.h>
636080e166Sjmcneill 
6449721fc4Sskrll #include <evbarm/dev/plcomreg.h>
6549721fc4Sskrll #include <evbarm/dev/plcomvar.h>
6649721fc4Sskrll 
676080e166Sjmcneill #include <libfdt.h>
686080e166Sjmcneill 
696080e166Sjmcneill #include <arch/evbarm/fdt/platform.h>
706080e166Sjmcneill 
716080e166Sjmcneill extern struct arm32_bus_dma_tag arm_generic_dma_tag;
726080e166Sjmcneill extern struct bus_space arm_generic_bs_tag;
736080e166Sjmcneill 
7449721fc4Sskrll void plcom_platform_early_putchar(char);
7549721fc4Sskrll 
7649721fc4Sskrll #define	ARM_PTOV(p)       (((p) - DEVMAP_ALIGN(uart_base)) + KERNEL_IO_VBASE)
7749721fc4Sskrll 
7849721fc4Sskrll void __noasan
plcom_platform_early_putchar(char c)7949721fc4Sskrll plcom_platform_early_putchar(char c)
8049721fc4Sskrll {
8149721fc4Sskrll #ifdef CONSADDR
8249721fc4Sskrll 	bus_addr_t uart_base = CONSADDR;
8349721fc4Sskrll 
8449721fc4Sskrll 	volatile uint32_t *uartaddr = cpu_earlydevice_va_p() ?
8549721fc4Sskrll 		(volatile uint32_t *)ARM_PTOV(uart_base):
8649721fc4Sskrll 		(volatile uint32_t *)uart_base;
8749721fc4Sskrll 
8849721fc4Sskrll 	while ((le32toh(uartaddr[PL01XCOM_FR / 4]) & PL01X_FR_TXFF) != 0)
8949721fc4Sskrll 		continue;
9049721fc4Sskrll 
9149721fc4Sskrll 	uartaddr[PL01XCOM_DR / 4] = htole32(c);
9249721fc4Sskrll 	dsb(sy);
9349721fc4Sskrll 
9449721fc4Sskrll 	while ((le32toh(uartaddr[PL01XCOM_FR / 4]) & PL01X_FR_TXFE) == 0)
9549721fc4Sskrll 		continue;
9649721fc4Sskrll #endif
9749721fc4Sskrll }
9849721fc4Sskrll 
996080e166Sjmcneill static void
arm_platform_init_attach_args(struct fdt_attach_args * faa)1006080e166Sjmcneill arm_platform_init_attach_args(struct fdt_attach_args *faa)
1016080e166Sjmcneill {
1026080e166Sjmcneill 	faa->faa_bst = &arm_generic_bs_tag;
1036080e166Sjmcneill 	faa->faa_dmat = &arm_generic_dma_tag;
1046080e166Sjmcneill }
1056080e166Sjmcneill 
1066080e166Sjmcneill static void
arm_platform_device_register(device_t self,void * aux)1076080e166Sjmcneill arm_platform_device_register(device_t self, void *aux)
1086080e166Sjmcneill {
1096080e166Sjmcneill }
1106080e166Sjmcneill 
1116080e166Sjmcneill static const struct pmap_devmap *
arm_platform_devmap(void)1126080e166Sjmcneill arm_platform_devmap(void)
1136080e166Sjmcneill {
1146080e166Sjmcneill 	static const struct pmap_devmap devmap_empty[] = {
1156080e166Sjmcneill 		DEVMAP_ENTRY_END
1166080e166Sjmcneill 	};
1176080e166Sjmcneill 	static struct pmap_devmap devmap_uart[] = {
118d8f0d2b3Sskrll 		DEVMAP_ENTRY(KERNEL_IO_VBASE, 0, PAGE_SIZE),
1196080e166Sjmcneill 		DEVMAP_ENTRY_END
1206080e166Sjmcneill 	};
1216080e166Sjmcneill 
1226080e166Sjmcneill 	const int phandle = fdtbus_get_stdout_phandle();
1236080e166Sjmcneill 	if (phandle <= 0)
1246080e166Sjmcneill 		return devmap_empty;
1256080e166Sjmcneill 
12649721fc4Sskrll 	bus_addr_t uart_base;
1276080e166Sjmcneill 	if (fdtbus_get_reg(phandle, 0, &uart_base, NULL) != 0)
1286080e166Sjmcneill 		return devmap_empty;
1296080e166Sjmcneill 
130d8f0d2b3Sskrll 	devmap_uart[0].pd_pa = DEVMAP_ALIGN(uart_base);
1316080e166Sjmcneill 
1326080e166Sjmcneill 	return devmap_uart;
1336080e166Sjmcneill }
1346080e166Sjmcneill 
1356080e166Sjmcneill static u_int
arm_platform_uart_freq(void)1366080e166Sjmcneill arm_platform_uart_freq(void)
1376080e166Sjmcneill {
1386080e166Sjmcneill 	return 0;
1396080e166Sjmcneill }
1406080e166Sjmcneill 
141*8d564c5dSskrll static const struct fdt_platform arm_platform = {
142*8d564c5dSskrll 	.fp_devmap = arm_platform_devmap,
143*8d564c5dSskrll 	.fp_bootstrap = arm_fdt_cpu_bootstrap,
144*8d564c5dSskrll 	.fp_init_attach_args = arm_platform_init_attach_args,
145*8d564c5dSskrll 	.fp_device_register = arm_platform_device_register,
146*8d564c5dSskrll 	.fp_reset = psci_fdt_reset,
147*8d564c5dSskrll 	.fp_delay = gtmr_delay,
148*8d564c5dSskrll 	.fp_uart_freq = arm_platform_uart_freq,
149*8d564c5dSskrll 	.fp_mpstart = arm_fdt_cpu_mpstart,
1506080e166Sjmcneill };
1516080e166Sjmcneill 
152*8d564c5dSskrll FDT_PLATFORM(arm, FDT_PLATFORM_DEFAULT, &arm_platform);
153