xref: /netbsd-src/sys/arch/arm/broadcom/bcm53xx_idm.c (revision 14ad16f026954c2e42142255e011ec40af2e5920)
1ad28138bSmatt /*-
2ad28138bSmatt  * Copyright (c) 2012 The NetBSD Foundation, Inc.
3ad28138bSmatt  * All rights reserved.
4ad28138bSmatt  *
5ad28138bSmatt  * This code is derived from software contributed to The NetBSD Foundation
6ad28138bSmatt  * by Matt Thomas of 3am Software Foundry.
7ad28138bSmatt  *
8ad28138bSmatt  * Redistribution and use in source and binary forms, with or without
9ad28138bSmatt  * modification, are permitted provided that the following conditions
10ad28138bSmatt  * are met:
11ad28138bSmatt  * 1. Redistributions of source code must retain the above copyright
12ad28138bSmatt  *    notice, this list of conditions and the following disclaimer.
13ad28138bSmatt  * 2. Redistributions in binary form must reproduce the above copyright
14ad28138bSmatt  *    notice, this list of conditions and the following disclaimer in the
15ad28138bSmatt  *    documentation and/or other materials provided with the distribution.
16ad28138bSmatt  *
17ad28138bSmatt  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
18ad28138bSmatt  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
19ad28138bSmatt  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
20ad28138bSmatt  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
21ad28138bSmatt  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22ad28138bSmatt  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23ad28138bSmatt  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24ad28138bSmatt  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
25ad28138bSmatt  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26ad28138bSmatt  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27ad28138bSmatt  * POSSIBILITY OF SUCH DAMAGE.
28ad28138bSmatt  */
29ad28138bSmatt 
30ad28138bSmatt #include "opt_broadcom.h"
31ad28138bSmatt #include "locators.h"
32ad28138bSmatt 
33ad28138bSmatt #define CRU_PRIVATE
34ad28138bSmatt #define IDM_PRIVATE
35ad28138bSmatt 
36ad28138bSmatt #include <sys/cdefs.h>
37ad28138bSmatt 
38*14ad16f0Sskrll __KERNEL_RCSID(1, "$NetBSD: bcm53xx_idm.c,v 1.4 2024/02/16 15:11:17 skrll Exp $");
39ad28138bSmatt 
40ad28138bSmatt #include <sys/param.h>
41ad28138bSmatt #include <sys/bus.h>
42ad28138bSmatt #include <sys/device.h>
43ad28138bSmatt #include <sys/intr.h>
44ad28138bSmatt #include <sys/systm.h>
45ad28138bSmatt 
46ad28138bSmatt #include <arm/mainbus/mainbus.h>
47ad28138bSmatt 
48ad28138bSmatt #include <arm/broadcom/bcm53xx_reg.h>
49ad28138bSmatt #include <arm/broadcom/bcm53xx_var.h>
50ad28138bSmatt 
51ad28138bSmatt struct idm_info {
52ad28138bSmatt 	bus_size_t idm_offset;
53ad28138bSmatt 	const char *idm_name;
54ad28138bSmatt 	int idm_port;
55ad28138bSmatt 	bool (*idm_unreset)(bus_space_tag_t, bus_space_handle_t,
56ad28138bSmatt 	    const struct idm_info *);
57ad28138bSmatt };
58ad28138bSmatt 
59ad28138bSmatt static bool
bcmeth_unreset(bus_space_tag_t bst,bus_space_handle_t bsh,const struct idm_info * idm)60ad28138bSmatt bcmeth_unreset(bus_space_tag_t bst, bus_space_handle_t bsh,
61ad28138bSmatt     const struct idm_info *idm)
62ad28138bSmatt {
63ad28138bSmatt 	/*
64ad28138bSmatt 	 * To enable any GMAC, we must enable all off them.
65ad28138bSmatt 	 */
66ad28138bSmatt 	static const bus_size_t regoff[] = {
67792c944dSmatt 		IDM_BASE + IDM_AMAC0_BASE,
68792c944dSmatt 		IDM_BASE + IDM_AMAC1_BASE,
69792c944dSmatt 		IDM_BASE + IDM_AMAC2_BASE,
70792c944dSmatt 		IDM_BASE + IDM_AMAC3_BASE,
71ad28138bSmatt 	};
72ad28138bSmatt 	static bool bcmeth_init_done;
73ad28138bSmatt 	if (!bcmeth_init_done) {
74ad28138bSmatt 		for (size_t idx = 0; idx < __arraycount(regoff); idx++) {
75792c944dSmatt 			const bus_size_t off = regoff[idx];
76792c944dSmatt 			bus_space_write_4(bst, bsh, off + IDM_RESET_CONTROL, 0);
77792c944dSmatt 			uint32_t v = bus_space_read_4(bst, bsh,
78792c944dSmatt 			    off + IDM_IO_CONTROL_DIRECT);
79792c944dSmatt 			/*
80792c944dSmatt 			 * Clear read-allocate and write-allocate bits from
81ad978013Smatt 			 * ACP cache access so we don't pollute the caches with
82ad978013Smatt 			 * DMA traffic.
83792c944dSmatt 			 */
84792c944dSmatt 			v &= ~IO_CONTROL_DIRECT_ARCACHE;
85792c944dSmatt 			v &= ~IO_CONTROL_DIRECT_AWCACHE;
86ad978013Smatt #if 0
87ad978013Smatt 			v |= __SHIFTIN(AXCACHE_WA, IO_CONTROL_DIRECT_ARCACHE);
88ad978013Smatt 			v |= __SHIFTIN(AXCACHE_RA, IO_CONTROL_DIRECT_AWCACHE);
89ad978013Smatt #endif
90792c944dSmatt 			v |= __SHIFTIN(AXCACHE_C|AXCACHE_B, IO_CONTROL_DIRECT_ARCACHE);
91792c944dSmatt 			v |= __SHIFTIN(AXCACHE_C|AXCACHE_B, IO_CONTROL_DIRECT_AWCACHE);
92ad978013Smatt 			/*
93ad978013Smatt 			 * These are the default but make sure they are
94ad978013Smatt 			 * properly set.
95ad978013Smatt 			 */
96ad978013Smatt 			v |= __SHIFTIN(0x1F, IO_CONTROL_DIRECT_ARUSER);
97ad978013Smatt 			v |= __SHIFTIN(0x1F, IO_CONTROL_DIRECT_AWUSER);
98ad978013Smatt 			v |= IO_CONTROL_DIRECT_CLK_250_SEL;
99ad978013Smatt 			v |= IO_CONTROL_DIRECT_DIRECT_GMII_MODE;
100ad978013Smatt 			v |= IO_CONTROL_DIRECT_SOURCE_SYNC_MODE_EN;
101ad978013Smatt 			v |= IO_CONTROL_DIRECT_CLK_GATING_EN;
102ad978013Smatt 
103792c944dSmatt 			bus_space_write_4(bst, bsh, off + IDM_IO_CONTROL_DIRECT,
104792c944dSmatt 			    v);
105ad28138bSmatt 		}
106ad28138bSmatt 		bcmeth_init_done = true;
107ad28138bSmatt 	}
108ad28138bSmatt 	return true;
109ad28138bSmatt }
110ad28138bSmatt 
111ad28138bSmatt static bool
bcmccb_idm_unreset(bus_space_tag_t bst,bus_space_handle_t bsh,const struct idm_info * idm)112ad28138bSmatt bcmccb_idm_unreset(bus_space_tag_t bst, bus_space_handle_t bsh,
113ad28138bSmatt     const struct idm_info *idm)
114ad28138bSmatt {
115ad28138bSmatt 	if (idm->idm_offset == 0)
116ad28138bSmatt 		return true;
117ad28138bSmatt 
118ad28138bSmatt 	/*
119ad28138bSmatt 	 * If the device might be in reset, let's try to take it out of it.
120ad28138bSmatt 	 */
121ad28138bSmatt 	bus_size_t o = IDM_BASE + idm->idm_offset + IDM_RESET_CONTROL;
122ad28138bSmatt 	uint32_t v = bus_space_read_4(bst, bsh, o);
123ad28138bSmatt 	if (v & 1) {
124ad28138bSmatt 		v &= ~1;
125ad28138bSmatt 		bus_space_write_4(bst, bsh, o, v);
126ad28138bSmatt 	}
127ad28138bSmatt 	return true;
128ad28138bSmatt }
129ad28138bSmatt 
130ad28138bSmatt static bool
bcmpax2_idm_unreset(bus_space_tag_t bst,bus_space_handle_t bsh,const struct idm_info * idm)131ad28138bSmatt bcmpax2_idm_unreset(bus_space_tag_t bst, bus_space_handle_t bsh,
132ad28138bSmatt     const struct idm_info *idm)
133ad28138bSmatt {
134ad28138bSmatt 	uint32_t v = bus_space_read_4(bst, bsh, CRU_BASE + CRU_STRAPS_CONTROL);
135ad28138bSmatt 
136ad28138bSmatt 	if (v & STRAP_USB3_SEL)
137ad28138bSmatt 		return false;
138ad28138bSmatt 
139ad28138bSmatt 	return bcmccb_idm_unreset(bst, bsh, idm);
140ad28138bSmatt }
141ad28138bSmatt 
142ad28138bSmatt static bool
bcmxhci_idm_unreset(bus_space_tag_t bst,bus_space_handle_t bsh,const struct idm_info * idm)143ad28138bSmatt bcmxhci_idm_unreset(bus_space_tag_t bst, bus_space_handle_t bsh,
144ad28138bSmatt     const struct idm_info *idm)
145ad28138bSmatt {
146ad28138bSmatt 	uint32_t v = bus_space_read_4(bst, bsh, CRU_BASE + CRU_STRAPS_CONTROL);
147ad28138bSmatt 
148ad28138bSmatt 	if ((v & STRAP_USB3_SEL) == 0)
149ad28138bSmatt 		return false;
150ad28138bSmatt 
151ad28138bSmatt 	return bcmccb_idm_unreset(bst, bsh, idm);
152ad28138bSmatt }
153ad28138bSmatt 
154ad28138bSmatt static const struct idm_info bcm53xx_idm_info[] = {
155ad28138bSmatt 	{ 0, "bcmi2c", BCMCCBCF_PORT_DEFAULT, bcmccb_idm_unreset },
156ad28138bSmatt 	{ 0, "bcmmdio", BCMCCBCF_PORT_DEFAULT, bcmccb_idm_unreset },
157ad28138bSmatt 	{ 0, "bcmrng", BCMCCBCF_PORT_DEFAULT, bcmccb_idm_unreset },
158ad28138bSmatt 	{ IDM_PCIE_M0_BASE, "bcmpax", 0, bcmccb_idm_unreset },
159ad28138bSmatt 	{ IDM_PCIE_M1_BASE, "bcmpax", 1, bcmccb_idm_unreset },
160ad28138bSmatt 	{ IDM_PCIE_M2_BASE, "bcmpax", 2, bcmpax2_idm_unreset },
161ad28138bSmatt 	{ IDM_AMAC0_BASE, "bcmeth", 0, bcmeth_unreset },
162ad28138bSmatt 	{ IDM_AMAC1_BASE, "bcmeth", 1, bcmeth_unreset },
163ad28138bSmatt 	{ IDM_AMAC2_BASE, "bcmeth", 2, bcmeth_unreset },
164ad28138bSmatt 	{ IDM_AMAC3_BASE, "bcmeth", 3, bcmeth_unreset },
165ad28138bSmatt 	{ IDM_USB3_BASE, "xhci", BCMCCBCF_PORT_DEFAULT, bcmxhci_idm_unreset },
166ad28138bSmatt 	{ IDM_SDIO_BASE, "sdhc", BCMCCBCF_PORT_DEFAULT, bcmccb_idm_unreset },
167ad28138bSmatt 	{ IDM_USB2_BASE, "bcmusb", BCMCCBCF_PORT_DEFAULT, bcmccb_idm_unreset },
168ad28138bSmatt };
169ad28138bSmatt 
170ad28138bSmatt static const struct idm_info *
bcmccb_idm_lookup(const struct bcm_locators * const loc)171ad28138bSmatt bcmccb_idm_lookup(const struct bcm_locators * const loc)
172ad28138bSmatt {
173ad28138bSmatt 	const struct idm_info *idm = bcm53xx_idm_info;
174ad28138bSmatt 	for (size_t i = 0; i < __arraycount(bcm53xx_idm_info); i++, idm++) {
175ad28138bSmatt 		if (strcmp(idm->idm_name, loc->loc_name) == 0
176ad28138bSmatt 		    && idm->idm_port == loc->loc_port) {
177ad28138bSmatt 			return idm;
178ad28138bSmatt 		}
179ad28138bSmatt 	}
180ad28138bSmatt 	return NULL;
181ad28138bSmatt }
182ad28138bSmatt 
183ad28138bSmatt bool
bcm53xx_idm_device_init(const struct bcm_locators * loc,bus_space_tag_t bst,bus_space_handle_t bsh)184ad28138bSmatt bcm53xx_idm_device_init(const struct bcm_locators *loc, bus_space_tag_t bst,
185ad28138bSmatt 	bus_space_handle_t bsh)
186ad28138bSmatt {
187ad28138bSmatt 	const struct idm_info * const idm = bcmccb_idm_lookup(loc);
188ad28138bSmatt 	if (idm == NULL)
189ad28138bSmatt 		return false;
190ad28138bSmatt 
191ad28138bSmatt 	/*
192ad28138bSmatt 	 * If the device might be in reset, let's try to take it out of it.
193ad28138bSmatt 	 */
194ad28138bSmatt 	return (*idm->idm_unreset)(bst, bsh, idm);
195ad28138bSmatt }
196