1*bd99f6a8Sskrll /* $NetBSD: bcm2835_bsc_fdt.c,v 1.6 2021/01/29 14:11:14 skrll Exp $ */
2aa670249Sjmcneill
3aa670249Sjmcneill /*
4aa670249Sjmcneill * Copyright (c) 2019 Jason R. Thorpe
5aa670249Sjmcneill * Copyright (c) 2012 Jonathan A. Kollasch
6aa670249Sjmcneill * All rights reserved.
7aa670249Sjmcneill *
8aa670249Sjmcneill * Redistribution and use in source and binary forms, with or without
9aa670249Sjmcneill * modification, are permitted provided that the following conditions
10aa670249Sjmcneill * are met:
11aa670249Sjmcneill * 1. Redistributions of source code must retain the above copyright
12aa670249Sjmcneill * notice, this list of conditions and the following disclaimer.
13aa670249Sjmcneill * 2. Redistributions in binary form must reproduce the above copyright
14aa670249Sjmcneill * notice, this list of conditions and the following disclaimer in the
15aa670249Sjmcneill * documentation and/or other materials provided with the distribution.
16aa670249Sjmcneill *
17aa670249Sjmcneill * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18aa670249Sjmcneill * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
19aa670249Sjmcneill * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
20aa670249Sjmcneill * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
21aa670249Sjmcneill * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
22aa670249Sjmcneill * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
23aa670249Sjmcneill * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
24aa670249Sjmcneill * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
25aa670249Sjmcneill * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
26aa670249Sjmcneill * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
27aa670249Sjmcneill * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28aa670249Sjmcneill */
29aa670249Sjmcneill
30aa670249Sjmcneill #include <sys/cdefs.h>
31*bd99f6a8Sskrll __KERNEL_RCSID(0, "$NetBSD: bcm2835_bsc_fdt.c,v 1.6 2021/01/29 14:11:14 skrll Exp $");
32aa670249Sjmcneill
33aa670249Sjmcneill #include <sys/param.h>
34aa670249Sjmcneill #include <sys/bus.h>
35aa670249Sjmcneill #include <sys/device.h>
36aa670249Sjmcneill #include <sys/kernhist.h>
37aa670249Sjmcneill #include <sys/intr.h>
38aa670249Sjmcneill #include <sys/mutex.h>
39aa670249Sjmcneill #include <sys/systm.h>
40aa670249Sjmcneill
41aa670249Sjmcneill #include <dev/i2c/i2cvar.h>
42aa670249Sjmcneill
43aa670249Sjmcneill #include <arm/broadcom/bcm2835reg.h>
44aa670249Sjmcneill #include <arm/broadcom/bcm2835_bscreg.h>
45aa670249Sjmcneill #include <arm/broadcom/bcm2835_bscvar.h>
46aa670249Sjmcneill
47aa670249Sjmcneill #include <dev/fdt/fdtvar.h>
48aa670249Sjmcneill
49aa670249Sjmcneill static int bsciic_fdt_match(device_t, cfdata_t, void *);
50aa670249Sjmcneill static void bsciic_fdt_attach(device_t, device_t, void *);
51aa670249Sjmcneill
52aa670249Sjmcneill CFATTACH_DECL_NEW(bsciic_fdt, sizeof(struct bsciic_softc),
53aa670249Sjmcneill bsciic_fdt_match, bsciic_fdt_attach, NULL, NULL);
54aa670249Sjmcneill
556e54367aSthorpej static const struct device_compatible_entry compat_data[] = {
566e54367aSthorpej { .compat = "brcm,bcm2835-i2c" },
576e54367aSthorpej DEVICE_COMPAT_EOL
586e54367aSthorpej };
596e54367aSthorpej
60aa670249Sjmcneill static int
bsciic_fdt_match(device_t parent,cfdata_t match,void * aux)61aa670249Sjmcneill bsciic_fdt_match(device_t parent, cfdata_t match, void *aux)
62aa670249Sjmcneill {
63aa670249Sjmcneill struct fdt_attach_args * const faa = aux;
64aa670249Sjmcneill
656e54367aSthorpej return of_compatible_match(faa->faa_phandle, compat_data);
66aa670249Sjmcneill }
67aa670249Sjmcneill
68aa670249Sjmcneill static void
bsciic_fdt_attach(device_t parent,device_t self,void * aux)69aa670249Sjmcneill bsciic_fdt_attach(device_t parent, device_t self, void *aux)
70aa670249Sjmcneill {
71aa670249Sjmcneill struct bsciic_softc * const sc = device_private(self);
72aa670249Sjmcneill struct fdt_attach_args * const faa = aux;
73aa670249Sjmcneill const int phandle = faa->faa_phandle;
74aa670249Sjmcneill
75aa670249Sjmcneill bus_addr_t addr;
76aa670249Sjmcneill bus_size_t size;
77aa670249Sjmcneill
78aa670249Sjmcneill sc->sc_dev = self;
79aa670249Sjmcneill sc->sc_iot = faa->faa_bst;
80aa670249Sjmcneill
81aa670249Sjmcneill int error = fdtbus_get_reg(phandle, 0, &addr, &size);
82aa670249Sjmcneill if (error) {
83aa670249Sjmcneill aprint_error(": unable to get device registers\n");
84aa670249Sjmcneill return;
85aa670249Sjmcneill }
86aa670249Sjmcneill
87aa670249Sjmcneill /* Enable clock */
88aa670249Sjmcneill sc->sc_clk = fdtbus_clock_get_index(phandle, 0);
89aa670249Sjmcneill if (sc->sc_clk == NULL) {
90aa670249Sjmcneill aprint_error(": couldn't acquire clock\n");
91aa670249Sjmcneill return;
92aa670249Sjmcneill }
93aa670249Sjmcneill
94aa670249Sjmcneill if (clk_enable(sc->sc_clk) != 0) {
95aa670249Sjmcneill aprint_error(": failed to enable clock\n");
96aa670249Sjmcneill return;
97aa670249Sjmcneill }
98aa670249Sjmcneill
99aa670249Sjmcneill sc->sc_frequency = clk_get_rate(sc->sc_clk);
100aa670249Sjmcneill
101aa670249Sjmcneill if (of_getprop_uint32(phandle, "clock-frequency",
102aa670249Sjmcneill &sc->sc_clkrate) != 0) {
103aa670249Sjmcneill sc->sc_clkrate = 100000;
104aa670249Sjmcneill }
105aa670249Sjmcneill
106aa670249Sjmcneill if (bus_space_map(sc->sc_iot, addr, size, 0, &sc->sc_ioh)) {
107aa670249Sjmcneill aprint_error(": unable to map device\n");
108aa670249Sjmcneill return;
109aa670249Sjmcneill }
110aa670249Sjmcneill
111aa670249Sjmcneill aprint_naive("\n");
112aa670249Sjmcneill aprint_normal(": Broadcom Serial Controller\n");
113aa670249Sjmcneill
114aa670249Sjmcneill bsciic_attach(sc);
115aa670249Sjmcneill
116aa670249Sjmcneill char intrstr[128];
117aa670249Sjmcneill if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) {
118aa670249Sjmcneill aprint_error_dev(sc->sc_dev, "failed to decode interrupt\n");
119aa670249Sjmcneill return;
120aa670249Sjmcneill }
121*bd99f6a8Sskrll sc->sc_inth = fdtbus_intr_establish_xname(phandle, 0, IPL_VM,
122*bd99f6a8Sskrll FDT_INTR_MPSAFE, bsciic_intr, sc, device_xname(sc->sc_dev));
123aa670249Sjmcneill if (sc->sc_inth == NULL) {
124aa670249Sjmcneill aprint_error_dev(sc->sc_dev,
125aa670249Sjmcneill "failed to establish interrupt %s\n", intrstr);
126aa670249Sjmcneill return;
127aa670249Sjmcneill }
128aa670249Sjmcneill aprint_normal_dev(sc->sc_dev, "interrupting on %s\n", intrstr);
129aa670249Sjmcneill
130aa670249Sjmcneill iic_tag_init(&sc->sc_i2c);
131aa670249Sjmcneill sc->sc_i2c.ic_cookie = sc;
132aa670249Sjmcneill sc->sc_i2c.ic_acquire_bus = bsciic_acquire_bus;
133aa670249Sjmcneill sc->sc_i2c.ic_release_bus = bsciic_release_bus;
134aa670249Sjmcneill sc->sc_i2c.ic_exec = bsciic_exec;
135aa670249Sjmcneill
13621b71bc0Sthorpej fdtbus_register_i2c_controller(&sc->sc_i2c, phandle);
137af6cec97Sthorpej
138aa670249Sjmcneill fdtbus_attach_i2cbus(self, phandle, &sc->sc_i2c, iicbus_print);
139aa670249Sjmcneill }
140