xref: /netbsd-src/sys/arch/arm/arm/ast.c (revision cb9637bcff0301f3e2d738bcc25a7df416e3259d)
1 /*	$NetBSD: ast.c,v 1.7 2005/12/11 12:16:41 christos Exp $	*/
2 
3 /*
4  * Copyright (c) 1994,1995 Mark Brinicombe
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. All advertising materials mentioning features or use of this software
16  *    must display the following acknowledgement:
17  *	This product includes software developed by the RiscBSD team.
18  * 4. The name of the company nor the name of the author may be used to
19  *    endorse or promote products derived from this software without specific
20  *    prior written permission.
21  *
22  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
23  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
24  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25  * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTERS BE LIABLE FOR ANY DIRECT,
26  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
27  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32  * SUCH DAMAGE.
33  *
34  * RiscBSD kernel project
35  *
36  * ast.c
37  *
38  * Code to handle ast's and returns to user mode
39  *
40  * Created      : 11/10/94
41  */
42 
43 #include <sys/cdefs.h>
44 __KERNEL_RCSID(0, "$NetBSD: ast.c,v 1.7 2005/12/11 12:16:41 christos Exp $");
45 
46 #include "opt_ddb.h"
47 
48 #include <sys/param.h>
49 #include <sys/proc.h>
50 #include <sys/user.h>
51 #include <sys/acct.h>
52 #include <sys/systm.h>
53 #include <sys/kernel.h>
54 #include <sys/signal.h>
55 #include <sys/savar.h>
56 #include <sys/vmmeter.h>
57 #include <sys/userret.h>
58 
59 #include <machine/cpu.h>
60 #include <machine/frame.h>
61 #include <machine/cpu.h>
62 
63 #include <arm/cpufunc.h>
64 
65 #include <uvm/uvm_extern.h>
66 
67 #ifdef acorn26
68 #include <machine/machdep.h>
69 #endif
70 
71 /*
72  * Prototypes
73  */
74 void ast __P((struct trapframe *));
75 
76 int want_resched = 0;
77 int astpending;
78 
79 void
80 userret(struct lwp *l)
81 {
82 
83 	/* Invoke MI userret code */
84 	mi_userret(l);
85 
86 	curcpu()->ci_schedstate.spc_curpriority = l->l_priority = l->l_usrpri;
87 }
88 
89 
90 /*
91  * Handle asynchronous system traps.
92  * This is called from the irq handler to deliver signals
93  * and switch processes if required.
94  */
95 
96 void
97 ast(struct trapframe *tf)
98 {
99 	struct lwp *l = curlwp;
100 	struct proc *p;
101 
102 #ifdef acorn26
103 	/* Enable interrupts if they were enabled before the trap. */
104 	if ((tf->tf_r15 & R15_IRQ_DISABLE) == 0)
105 		int_on();
106 #else
107 	/* Interrupts were restored by exception_exit. */
108 #endif
109 
110 	uvmexp.traps++;
111 	uvmexp.softs++;
112 
113 #ifdef DEBUG
114 	if (l == NULL)
115 		panic("ast: no curlwp!");
116 	if (&l->l_addr->u_pcb == 0)
117 		panic("ast: no pcb!");
118 #endif
119 
120 	p = l->l_proc;
121 
122 	if (p->p_flag & P_OWEUPC) {
123 		p->p_flag &= ~P_OWEUPC;
124 		ADDUPROF(p);
125 	}
126 
127 	/* Allow a forced task switch. */
128 	if (want_resched)
129 		preempt(0);
130 
131 	userret(l);
132 }
133 
134 /* End of ast.c */
135