1*4989e6f4Sskrll /* $NetBSD: apple_pinctrl.c,v 1.1 2022/04/27 07:59:18 skrll Exp $ */
2*4989e6f4Sskrll /* $OpenBSD: aplpinctrl.c,v 1.4 2022/04/06 18:59:26 naddy Exp $ */
3*4989e6f4Sskrll
4*4989e6f4Sskrll /*-
5*4989e6f4Sskrll * Copyright (c) 2022 The NetBSD Foundation, Inc.
6*4989e6f4Sskrll * All rights reserved.
7*4989e6f4Sskrll *
8*4989e6f4Sskrll * This code is derived from software contributed to The NetBSD Foundation
9*4989e6f4Sskrll * by Nick Hudson
10*4989e6f4Sskrll *
11*4989e6f4Sskrll * Redistribution and use in source and binary forms, with or without
12*4989e6f4Sskrll * modification, are permitted provided that the following conditions
13*4989e6f4Sskrll * are met:
14*4989e6f4Sskrll * 1. Redistributions of source code must retain the above copyright
15*4989e6f4Sskrll * notice, this list of conditions and the following disclaimer.
16*4989e6f4Sskrll * 2. Redistributions in binary form must reproduce the above copyright
17*4989e6f4Sskrll * notice, this list of conditions and the following disclaimer in the
18*4989e6f4Sskrll * documentation and/or other materials provided with the distribution.
19*4989e6f4Sskrll *
20*4989e6f4Sskrll * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21*4989e6f4Sskrll * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22*4989e6f4Sskrll * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23*4989e6f4Sskrll * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24*4989e6f4Sskrll * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25*4989e6f4Sskrll * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26*4989e6f4Sskrll * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27*4989e6f4Sskrll * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28*4989e6f4Sskrll * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29*4989e6f4Sskrll * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30*4989e6f4Sskrll * POSSIBILITY OF SUCH DAMAGE.
31*4989e6f4Sskrll */
32*4989e6f4Sskrll
33*4989e6f4Sskrll /*
34*4989e6f4Sskrll * Copyright (c) 2021 Mark Kettenis <kettenis@openbsd.org>
35*4989e6f4Sskrll *
36*4989e6f4Sskrll * Permission to use, copy, modify, and distribute this software for any
37*4989e6f4Sskrll * purpose with or without fee is hereby granted, provided that the above
38*4989e6f4Sskrll * copyright notice and this permission notice appear in all copies.
39*4989e6f4Sskrll *
40*4989e6f4Sskrll * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
41*4989e6f4Sskrll * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
42*4989e6f4Sskrll * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
43*4989e6f4Sskrll * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
44*4989e6f4Sskrll * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
45*4989e6f4Sskrll * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
46*4989e6f4Sskrll * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
47*4989e6f4Sskrll */
48*4989e6f4Sskrll
49*4989e6f4Sskrll #include <sys/cdefs.h>
50*4989e6f4Sskrll __KERNEL_RCSID(0, "$NetBSD: apple_pinctrl.c,v 1.1 2022/04/27 07:59:18 skrll Exp $");
51*4989e6f4Sskrll
52*4989e6f4Sskrll #include <sys/param.h>
53*4989e6f4Sskrll #include <sys/bus.h>
54*4989e6f4Sskrll #include <sys/device.h>
55*4989e6f4Sskrll #include <sys/kmem.h>
56*4989e6f4Sskrll
57*4989e6f4Sskrll #include <dev/fdt/fdtvar.h>
58*4989e6f4Sskrll
59*4989e6f4Sskrll #include <arm/pic/picvar.h>
60*4989e6f4Sskrll
61*4989e6f4Sskrll #define APPLE_PIN(pinmux) __SHIFTOUT((pinmux), __BITS(15, 0))
62*4989e6f4Sskrll #define APPLE_FUNC(pinmux) __SHIFTOUT((pinmux), __BITS(31, 16))
63*4989e6f4Sskrll
64*4989e6f4Sskrll #define GPIO_PIN(pin) ((pin) * 4)
65*4989e6f4Sskrll #define GPIO_PIN_GROUP_MASK __BITS(18, 16)
66*4989e6f4Sskrll #define GPIO_PIN_INPUT_ENABLE __BIT(9)
67*4989e6f4Sskrll #define GPIO_PIN_FUNC_MASK __BITS(6, 5)
68*4989e6f4Sskrll #define GPIO_PIN_MODE_MASK __BITS(3, 1)
69*4989e6f4Sskrll #define GPIO_PIN_MODE_INPUT __SHIFTIN(0, GPIO_PIN_MODE_MASK);
70*4989e6f4Sskrll #define GPIO_PIN_MODE_OUTPUT __SHIFTIN(1, GPIO_PIN_MODE_MASK);
71*4989e6f4Sskrll #define GPIO_PIN_MODE_IRQ_HI __SHIFTIN(2, GPIO_PIN_MODE_MASK);
72*4989e6f4Sskrll #define GPIO_PIN_MODE_IRQ_LO __SHIFTIN(3, GPIO_PIN_MODE_MASK);
73*4989e6f4Sskrll #define GPIO_PIN_MODE_IRQ_UP __SHIFTIN(4, GPIO_PIN_MODE_MASK);
74*4989e6f4Sskrll #define GPIO_PIN_MODE_IRQ_DN __SHIFTIN(5, GPIO_PIN_MODE_MASK);
75*4989e6f4Sskrll #define GPIO_PIN_MODE_IRQ_ANY __SHIFTIN(6, GPIO_PIN_MODE_MASK);
76*4989e6f4Sskrll #define GPIO_PIN_MODE_IRQ_OFF __SHIFTIN(7, GPIO_PIN_MODE_MASK);
77*4989e6f4Sskrll #define GPIO_PIN_DATA __BIT(0)
78*4989e6f4Sskrll #define GPIO_IRQ(grp, pin) (0x800 + (grp) * 64 + ((pin) >> 5) * 4)
79*4989e6f4Sskrll
80*4989e6f4Sskrll #define PINCTRL_READ(sc, reg) \
81*4989e6f4Sskrll (bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, (reg)))
82*4989e6f4Sskrll #define PINCTRL_WRITE(sc, reg, val) \
83*4989e6f4Sskrll bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))
84*4989e6f4Sskrll #define PINCTRL_SET(sc, reg, bits) \
85*4989e6f4Sskrll PINCTRL_WRITE((sc), (reg), PINCTRL_READ((sc), (reg)) | (bits))
86*4989e6f4Sskrll #define PINCTRL_CLR(sc, reg, bits) \
87*4989e6f4Sskrll PINCTRL_WRITE((sc), (reg), PINCTRL_READ((sc), (reg)) & ~(bits))
88*4989e6f4Sskrll
89*4989e6f4Sskrll
90*4989e6f4Sskrll struct apple_pinctrl_softc {
91*4989e6f4Sskrll device_t sc_dev;
92*4989e6f4Sskrll int sc_phandle;
93*4989e6f4Sskrll bus_space_tag_t sc_bst;
94*4989e6f4Sskrll bus_space_handle_t sc_bsh;
95*4989e6f4Sskrll u_int sc_npins;
96*4989e6f4Sskrll };
97*4989e6f4Sskrll
98*4989e6f4Sskrll struct apple_gpio_pin {
99*4989e6f4Sskrll int pin_no;
100*4989e6f4Sskrll u_int pin_flags;
101*4989e6f4Sskrll bool pin_actlo;
102*4989e6f4Sskrll };
103*4989e6f4Sskrll
104*4989e6f4Sskrll static const struct device_compatible_entry compat_data[] = {
105*4989e6f4Sskrll { .compat = "apple,pinctrl" },
106*4989e6f4Sskrll DEVICE_COMPAT_EOL
107*4989e6f4Sskrll };
108*4989e6f4Sskrll
109*4989e6f4Sskrll static void
apple_gpio_pin_ctl(void * cookie,int pin,int flags)110*4989e6f4Sskrll apple_gpio_pin_ctl(void *cookie, int pin, int flags)
111*4989e6f4Sskrll {
112*4989e6f4Sskrll struct apple_pinctrl_softc * const sc = cookie;
113*4989e6f4Sskrll
114*4989e6f4Sskrll KASSERT(pin < sc->sc_npins);
115*4989e6f4Sskrll
116*4989e6f4Sskrll uint32_t reg = PINCTRL_READ(sc, GPIO_PIN(pin));
117*4989e6f4Sskrll reg &= ~GPIO_PIN_FUNC_MASK;
118*4989e6f4Sskrll reg &= ~GPIO_PIN_MODE_MASK;
119*4989e6f4Sskrll
120*4989e6f4Sskrll if (flags & (GPIO_PIN_OUTPUT | GPIO_PIN_INPUT)) {
121*4989e6f4Sskrll if (flags & GPIO_PIN_INPUT) {
122*4989e6f4Sskrll /* for safety INPUT will override output */
123*4989e6f4Sskrll reg |= GPIO_PIN_MODE_INPUT;
124*4989e6f4Sskrll } else {
125*4989e6f4Sskrll reg |= GPIO_PIN_MODE_OUTPUT;
126*4989e6f4Sskrll }
127*4989e6f4Sskrll }
128*4989e6f4Sskrll PINCTRL_WRITE(sc, GPIO_PIN(pin), reg);
129*4989e6f4Sskrll }
130*4989e6f4Sskrll
131*4989e6f4Sskrll static void *
apple_pinctrl_gpio_acquire(device_t dev,const void * data,size_t len,int flags)132*4989e6f4Sskrll apple_pinctrl_gpio_acquire(device_t dev, const void *data, size_t len, int flags)
133*4989e6f4Sskrll {
134*4989e6f4Sskrll struct apple_pinctrl_softc * const sc = device_private(dev);
135*4989e6f4Sskrll struct apple_gpio_pin *pin;
136*4989e6f4Sskrll const u_int *gpio = data;
137*4989e6f4Sskrll
138*4989e6f4Sskrll if (len != 12)
139*4989e6f4Sskrll return NULL;
140*4989e6f4Sskrll
141*4989e6f4Sskrll const u_int pinno = be32toh(gpio[1]);
142*4989e6f4Sskrll const bool actlo = be32toh(gpio[2]) & 1;
143*4989e6f4Sskrll
144*4989e6f4Sskrll if (pinno >= sc->sc_npins)
145*4989e6f4Sskrll return NULL;
146*4989e6f4Sskrll
147*4989e6f4Sskrll pin = kmem_alloc(sizeof(*pin), KM_SLEEP);
148*4989e6f4Sskrll pin->pin_no = pinno;
149*4989e6f4Sskrll pin->pin_flags = flags;
150*4989e6f4Sskrll pin->pin_actlo = actlo;
151*4989e6f4Sskrll
152*4989e6f4Sskrll apple_gpio_pin_ctl(sc, pin->pin_no, pin->pin_flags);
153*4989e6f4Sskrll
154*4989e6f4Sskrll return pin;
155*4989e6f4Sskrll }
156*4989e6f4Sskrll
157*4989e6f4Sskrll static void
apple_pinctrl_gpio_release(device_t dev,void * priv)158*4989e6f4Sskrll apple_pinctrl_gpio_release(device_t dev, void *priv)
159*4989e6f4Sskrll {
160*4989e6f4Sskrll struct apple_pinctrl_softc * const sc = device_private(dev);
161*4989e6f4Sskrll struct apple_gpio_pin *pin = priv;
162*4989e6f4Sskrll
163*4989e6f4Sskrll apple_gpio_pin_ctl(sc, pin->pin_no, GPIO_PIN_INPUT);
164*4989e6f4Sskrll kmem_free(pin, sizeof(*pin));
165*4989e6f4Sskrll }
166*4989e6f4Sskrll
167*4989e6f4Sskrll static int
apple_pinctrl_gpio_read(device_t dev,void * priv,bool raw)168*4989e6f4Sskrll apple_pinctrl_gpio_read(device_t dev, void *priv, bool raw)
169*4989e6f4Sskrll {
170*4989e6f4Sskrll struct apple_pinctrl_softc * const sc = device_private(dev);
171*4989e6f4Sskrll struct apple_gpio_pin *pin = priv;
172*4989e6f4Sskrll
173*4989e6f4Sskrll KASSERT(pin->pin_no < sc->sc_npins);
174*4989e6f4Sskrll
175*4989e6f4Sskrll uint32_t reg = PINCTRL_READ(sc, GPIO_PIN(pin->pin_no));
176*4989e6f4Sskrll int val = __SHIFTOUT(reg, GPIO_PIN_DATA);
177*4989e6f4Sskrll if (!raw && pin->pin_actlo)
178*4989e6f4Sskrll val = !val;
179*4989e6f4Sskrll
180*4989e6f4Sskrll return val;
181*4989e6f4Sskrll }
182*4989e6f4Sskrll
183*4989e6f4Sskrll static void
apple_pinctrl_gpio_write(device_t dev,void * priv,int val,bool raw)184*4989e6f4Sskrll apple_pinctrl_gpio_write(device_t dev, void *priv, int val, bool raw)
185*4989e6f4Sskrll {
186*4989e6f4Sskrll struct apple_pinctrl_softc * const sc = device_private(dev);
187*4989e6f4Sskrll struct apple_gpio_pin *pin = priv;
188*4989e6f4Sskrll
189*4989e6f4Sskrll KASSERT(pin->pin_no < sc->sc_npins);
190*4989e6f4Sskrll
191*4989e6f4Sskrll if (!raw && pin->pin_actlo)
192*4989e6f4Sskrll val = !val;
193*4989e6f4Sskrll
194*4989e6f4Sskrll if (val)
195*4989e6f4Sskrll PINCTRL_SET(sc, GPIO_PIN(pin->pin_no), GPIO_PIN_DATA);
196*4989e6f4Sskrll else
197*4989e6f4Sskrll PINCTRL_CLR(sc, GPIO_PIN(pin->pin_no), GPIO_PIN_DATA);
198*4989e6f4Sskrll }
199*4989e6f4Sskrll
200*4989e6f4Sskrll static int
apple_pinctrl_set_config(device_t dev,const void * data,size_t len)201*4989e6f4Sskrll apple_pinctrl_set_config(device_t dev, const void *data, size_t len)
202*4989e6f4Sskrll {
203*4989e6f4Sskrll struct apple_pinctrl_softc * const sc = device_private(dev);
204*4989e6f4Sskrll
205*4989e6f4Sskrll if (len != 4)
206*4989e6f4Sskrll return -1;
207*4989e6f4Sskrll
208*4989e6f4Sskrll int pins_len;
209*4989e6f4Sskrll const int phandle = fdtbus_get_phandle_from_native(be32dec(data));
210*4989e6f4Sskrll const u_int *pins = fdtbus_get_prop(phandle, "pinmux", &pins_len);
211*4989e6f4Sskrll
212*4989e6f4Sskrll if (pins == NULL)
213*4989e6f4Sskrll return -1;
214*4989e6f4Sskrll
215*4989e6f4Sskrll const u_int npins = pins_len / sizeof(uint32_t);
216*4989e6f4Sskrll
217*4989e6f4Sskrll for (u_int i = 0; i < npins; i++) {
218*4989e6f4Sskrll uint32_t pinmux = be32dec(&pins[i]);
219*4989e6f4Sskrll u_int pinno = APPLE_PIN(pinmux);
220*4989e6f4Sskrll u_int func = APPLE_FUNC(pinmux);
221*4989e6f4Sskrll
222*4989e6f4Sskrll uint32_t reg = PINCTRL_READ(sc, GPIO_PIN(pinno));
223*4989e6f4Sskrll reg &= ~GPIO_PIN_FUNC_MASK;
224*4989e6f4Sskrll reg |= __SHIFTIN(func, GPIO_PIN_FUNC_MASK);
225*4989e6f4Sskrll
226*4989e6f4Sskrll PINCTRL_WRITE(sc, GPIO_PIN(pinno), reg);
227*4989e6f4Sskrll }
228*4989e6f4Sskrll
229*4989e6f4Sskrll return 0;
230*4989e6f4Sskrll }
231*4989e6f4Sskrll
232*4989e6f4Sskrll static struct fdtbus_gpio_controller_func apple_pinctrl_gpio_funcs = {
233*4989e6f4Sskrll .acquire = apple_pinctrl_gpio_acquire,
234*4989e6f4Sskrll .release = apple_pinctrl_gpio_release,
235*4989e6f4Sskrll .read = apple_pinctrl_gpio_read,
236*4989e6f4Sskrll .write = apple_pinctrl_gpio_write
237*4989e6f4Sskrll };
238*4989e6f4Sskrll
239*4989e6f4Sskrll static struct fdtbus_pinctrl_controller_func apple_pinctrl_funcs = {
240*4989e6f4Sskrll .set_config = apple_pinctrl_set_config,
241*4989e6f4Sskrll };
242*4989e6f4Sskrll
243*4989e6f4Sskrll static int
apple_pinctrl_match(device_t parent,cfdata_t cf,void * aux)244*4989e6f4Sskrll apple_pinctrl_match(device_t parent, cfdata_t cf, void *aux)
245*4989e6f4Sskrll {
246*4989e6f4Sskrll struct fdt_attach_args * const faa = aux;
247*4989e6f4Sskrll
248*4989e6f4Sskrll return of_compatible_match(faa->faa_phandle, compat_data);
249*4989e6f4Sskrll }
250*4989e6f4Sskrll
251*4989e6f4Sskrll static void
apple_pinctrl_attach(device_t parent,device_t self,void * aux)252*4989e6f4Sskrll apple_pinctrl_attach(device_t parent, device_t self, void *aux)
253*4989e6f4Sskrll {
254*4989e6f4Sskrll struct apple_pinctrl_softc * const sc = device_private(self);
255*4989e6f4Sskrll struct fdt_attach_args * const faa = aux;
256*4989e6f4Sskrll const int phandle = faa->faa_phandle;
257*4989e6f4Sskrll bus_addr_t addr;
258*4989e6f4Sskrll bus_size_t size;
259*4989e6f4Sskrll
260*4989e6f4Sskrll if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
261*4989e6f4Sskrll aprint_error(": couldn't get registers\n");
262*4989e6f4Sskrll return;
263*4989e6f4Sskrll }
264*4989e6f4Sskrll
265*4989e6f4Sskrll sc->sc_dev = self;
266*4989e6f4Sskrll sc->sc_bst = faa->faa_bst;
267*4989e6f4Sskrll
268*4989e6f4Sskrll if (bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh) != 0) {
269*4989e6f4Sskrll aprint_error(": couldn't map registers\n");
270*4989e6f4Sskrll return;
271*4989e6f4Sskrll }
272*4989e6f4Sskrll
273*4989e6f4Sskrll if (of_getprop_uint32(phandle, "apple,npins", &sc->sc_npins)) {
274*4989e6f4Sskrll aprint_error(": couldn't get number of pins\n");
275*4989e6f4Sskrll return;
276*4989e6f4Sskrll }
277*4989e6f4Sskrll
278*4989e6f4Sskrll if (!of_hasprop(phandle, "gpio-controller")) {
279*4989e6f4Sskrll aprint_error(": no gpio controller");
280*4989e6f4Sskrll return;
281*4989e6f4Sskrll }
282*4989e6f4Sskrll
283*4989e6f4Sskrll aprint_naive("\n");
284*4989e6f4Sskrll aprint_normal(": Apple Pinctrl\n");
285*4989e6f4Sskrll
286*4989e6f4Sskrll fdtbus_register_gpio_controller(self, phandle, &apple_pinctrl_gpio_funcs);
287*4989e6f4Sskrll
288*4989e6f4Sskrll for (int child = OF_child(phandle); child; child = OF_peer(child)) {
289*4989e6f4Sskrll if (!of_hasprop(child, "pinmux"))
290*4989e6f4Sskrll continue;
291*4989e6f4Sskrll fdtbus_register_pinctrl_config(self, child,
292*4989e6f4Sskrll &apple_pinctrl_funcs);
293*4989e6f4Sskrll
294*4989e6f4Sskrll }
295*4989e6f4Sskrll }
296*4989e6f4Sskrll
297*4989e6f4Sskrll CFATTACH_DECL_NEW(apple_pinctrl, sizeof(struct apple_pinctrl_softc),
298*4989e6f4Sskrll apple_pinctrl_match, apple_pinctrl_attach, NULL, NULL);
299*4989e6f4Sskrll
300