1*912cfa14Sjmcneill /* $NetBSD: meson_uart.h,v 1.1 2019/01/19 20:56:03 jmcneill Exp $ */ 2*912cfa14Sjmcneill 3*912cfa14Sjmcneill /*- 4*912cfa14Sjmcneill * Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca> 5*912cfa14Sjmcneill * All rights reserved. 6*912cfa14Sjmcneill * 7*912cfa14Sjmcneill * Redistribution and use in source and binary forms, with or without 8*912cfa14Sjmcneill * modification, are permitted provided that the following conditions 9*912cfa14Sjmcneill * are met: 10*912cfa14Sjmcneill * 1. Redistributions of source code must retain the above copyright 11*912cfa14Sjmcneill * notice, this list of conditions and the following disclaimer. 12*912cfa14Sjmcneill * 2. Redistributions in binary form must reproduce the above copyright 13*912cfa14Sjmcneill * notice, this list of conditions and the following disclaimer in the 14*912cfa14Sjmcneill * documentation and/or other materials provided with the distribution. 15*912cfa14Sjmcneill * 16*912cfa14Sjmcneill * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17*912cfa14Sjmcneill * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18*912cfa14Sjmcneill * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19*912cfa14Sjmcneill * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20*912cfa14Sjmcneill * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21*912cfa14Sjmcneill * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22*912cfa14Sjmcneill * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23*912cfa14Sjmcneill * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24*912cfa14Sjmcneill * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25*912cfa14Sjmcneill * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26*912cfa14Sjmcneill * SUCH DAMAGE. 27*912cfa14Sjmcneill */ 28*912cfa14Sjmcneill 29*912cfa14Sjmcneill #ifndef _MESON_UART_H 30*912cfa14Sjmcneill #define _MESON_UART_H 31*912cfa14Sjmcneill 32*912cfa14Sjmcneill #define UART_WFIFO_REG 0x00 33*912cfa14Sjmcneill #define UART_RFIFO_REG 0x04 34*912cfa14Sjmcneill #define UART_CONTROL_REG 0x08 35*912cfa14Sjmcneill #define UART_STATUS_REG 0x0c 36*912cfa14Sjmcneill #define UART_MISC_REG 0x10 37*912cfa14Sjmcneill #define UART_REG5_REG 0x14 38*912cfa14Sjmcneill 39*912cfa14Sjmcneill #define UART_CONTROL_TX_INT_EN __BIT(28) 40*912cfa14Sjmcneill #define UART_CONTROL_RX_INT_EN __BIT(27) 41*912cfa14Sjmcneill #define UART_CONTROL_CLEAR_ERR __BIT(24) 42*912cfa14Sjmcneill #define UART_CONTROL_RX_RESET __BIT(23) 43*912cfa14Sjmcneill #define UART_CONTROL_TX_RESET __BIT(22) 44*912cfa14Sjmcneill #define UART_CONTROL_RX_EN __BIT(13) 45*912cfa14Sjmcneill #define UART_CONTROL_TX_EN __BIT(12) 46*912cfa14Sjmcneill 47*912cfa14Sjmcneill #define UART_STATUS_RX_BUSY __BIT(26) 48*912cfa14Sjmcneill #define UART_STATUS_TX_BUSY __BIT(25) 49*912cfa14Sjmcneill #define UART_STATUS_TX_EMPTY __BIT(22) 50*912cfa14Sjmcneill #define UART_STATUS_TX_FULL __BIT(21) 51*912cfa14Sjmcneill #define UART_STATUS_RX_EMPTY __BIT(20) 52*912cfa14Sjmcneill #define UART_STATUS_BREAK __BIT(17) 53*912cfa14Sjmcneill 54*912cfa14Sjmcneill #define UART_MISC_TX_IRQ_CNT __BITS(15,8) 55*912cfa14Sjmcneill #define UART_MISC_RX_IRQ_CNT __BITS(7,0) 56*912cfa14Sjmcneill 57*912cfa14Sjmcneill #endif /* _MESON_UART_H */ 58