xref: /netbsd-src/sys/arch/arm/amlogic/meson6_timer.c (revision 6e54367a22fbc89a1139d033e95bec0c0cf0975b)
1*6e54367aSthorpej /*	$NetBSD: meson6_timer.c,v 1.2 2021/01/27 03:10:18 thorpej Exp $	*/
292c78af1Sskrll 
392c78af1Sskrll /*-
492c78af1Sskrll  * Copyright (c) 2019 The NetBSD Foundation, Inc.
592c78af1Sskrll  * All rights reserved.
692c78af1Sskrll  *
792c78af1Sskrll  * This code is derived from software contributed to The NetBSD Foundation
892c78af1Sskrll  * by Nick Hudson
992c78af1Sskrll  *
1092c78af1Sskrll  * Redistribution and use in source and binary forms, with or without
1192c78af1Sskrll  * modification, are permitted provided that the following conditions
1292c78af1Sskrll  * are met:
1392c78af1Sskrll  * 1. Redistributions of source code must retain the above copyright
1492c78af1Sskrll  *    notice, this list of conditions and the following disclaimer.
1592c78af1Sskrll  * 2. Redistributions in binary form must reproduce the above copyright
1692c78af1Sskrll  *    notice, this list of conditions and the following disclaimer in the
1792c78af1Sskrll  *    documentation and/or other materials provided with the distribution.
1892c78af1Sskrll  *
1992c78af1Sskrll  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
2092c78af1Sskrll  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
2192c78af1Sskrll  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
2292c78af1Sskrll  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
2392c78af1Sskrll  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
2492c78af1Sskrll  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
2592c78af1Sskrll  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
2692c78af1Sskrll  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
2792c78af1Sskrll  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
2892c78af1Sskrll  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
2992c78af1Sskrll  * POSSIBILITY OF SUCH DAMAGE.
3092c78af1Sskrll  */
3192c78af1Sskrll 
3292c78af1Sskrll #include <sys/cdefs.h>
33*6e54367aSthorpej __KERNEL_RCSID(0, "$NetBSD: meson6_timer.c,v 1.2 2021/01/27 03:10:18 thorpej Exp $");
3492c78af1Sskrll 
3592c78af1Sskrll #include <sys/param.h>
3692c78af1Sskrll #include <sys/bus.h>
3792c78af1Sskrll #include <sys/device.h>
3892c78af1Sskrll #include <sys/systm.h>
3992c78af1Sskrll #include <sys/timetc.h>
4092c78af1Sskrll 
4192c78af1Sskrll #include <dev/fdt/fdtvar.h>
4292c78af1Sskrll 
4392c78af1Sskrll static int	meson6_timer_match(device_t, cfdata_t, void *);
4492c78af1Sskrll static void	meson6_timer_attach(device_t, device_t, void *);
4592c78af1Sskrll 
4692c78af1Sskrll struct meson6_timer_softc {
4792c78af1Sskrll 	device_t		sc_dev;
4892c78af1Sskrll 	bus_space_tag_t		sc_bst;
4992c78af1Sskrll 	bus_space_handle_t	sc_bsh;
5092c78af1Sskrll 
5192c78af1Sskrll 	struct timecounter sc_tc;
5292c78af1Sskrll };
5392c78af1Sskrll 
5492c78af1Sskrll CFATTACH_DECL_NEW(meson6_timer, sizeof(struct meson6_timer_softc),
5592c78af1Sskrll     meson6_timer_match, meson6_timer_attach, NULL, NULL);
5692c78af1Sskrll 
5792c78af1Sskrll #define TIMER_READ(sc, reg)			\
5892c78af1Sskrll     bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, (reg))
5992c78af1Sskrll #define TIMER_WRITE(sc, reg, val)		\
6092c78af1Sskrll     bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))
6192c78af1Sskrll 
6292c78af1Sskrll #define MESON_TIMER_MUX					0x00
6392c78af1Sskrll #define  MESON_TIMER_MUX_TIMERD_EN			__BIT(19)
6492c78af1Sskrll #define  MESON_TIMER_MUX_TIMERC_EN			__BIT(18)
6592c78af1Sskrll #define  MESON_TIMER_MUX_TIMERB_EN			__BIT(17)
6692c78af1Sskrll #define  MESON_TIMER_MUX_TIMERA_EN			__BIT(16)
6792c78af1Sskrll #define  MESON_TIMER_MUX_TIMERD_MODE			__BIT(15)
6892c78af1Sskrll #define  MESON_TIMER_MUX_TIMERC_MODE			__BIT(14)
6992c78af1Sskrll #define  MESON_TIMER_MUX_TIMERB_MODE			__BIT(13)
7092c78af1Sskrll #define  MESON_TIMER_MUX_TIMERA_MODE			__BIT(12)
7192c78af1Sskrll #define  MESON_TIMER_MUX_TIMERE_INPUT_CLOCK_MASK	__BITS(10, 8)
7292c78af1Sskrll #define   MESON_TIMER_MUX_TIMERE_INPUT_CLOCK_SYSTEM_CLOCK	0x0
7392c78af1Sskrll #define   MESON_TIMER_MUX_TIMERE_INPUT_CLOCK_1US		0x1
7492c78af1Sskrll #define   MESON_TIMER_MUX_TIMERE_INPUT_CLOCK_10US		0x2
7592c78af1Sskrll #define   MESON_TIMER_MUX_TIMERE_INPUT_CLOCK_100US		0x3
7692c78af1Sskrll #define   MESON_TIMER_MUX_TIMERE_INPUT_CLOCK_1MS		0x4
7792c78af1Sskrll #define  MESON_TIMER_MUX_TIMERD_INPUT_CLOCK_MASK	__BITS(7, 6)
7892c78af1Sskrll #define  MESON_TIMER_MUX_TIMERC_INPUT_CLOCK_MASK	__BITS(5, 4)
7992c78af1Sskrll #define  MESON_TIMER_MUX_TIMERB_INPUT_CLOCK_MASK	__BITS(3, 2)
8092c78af1Sskrll #define  MESON_TIMER_MUX_TIMERA_INPUT_CLOCK_MASK	__BITS(1, 0)
8192c78af1Sskrll #define   MESON_TIMER_MUX_TIMERABCD_INPUT_CLOCK_1US		0x0
8292c78af1Sskrll #define   MESON_TIMER_MUX_TIMERABCD_INPUT_CLOCK_10US		0x1
8392c78af1Sskrll #define   MESON_TIMER_MUX_TIMERABCD_INPUT_CLOCK_100US		0x2
8492c78af1Sskrll #define   MESON_TIMER_MUX_TIMERABCD_INPUT_CLOCK_1MS		0x3
8592c78af1Sskrll 
8692c78af1Sskrll #define MESON_TIMERA					0x04
8792c78af1Sskrll #define MESON_TIMERB					0x08
8892c78af1Sskrll #define MESON_TIMERC					0x0c
8992c78af1Sskrll #define MESON_TIMERD					0x10
9092c78af1Sskrll #define MESON_TIMERE					0x14
9192c78af1Sskrll 
9292c78af1Sskrll static u_int
meson6_timer_get_timecount(struct timecounter * tc)9392c78af1Sskrll meson6_timer_get_timecount(struct timecounter *tc)
9492c78af1Sskrll {
9592c78af1Sskrll 	struct meson6_timer_softc * const sc = tc->tc_priv;
9692c78af1Sskrll 
9792c78af1Sskrll 	return TIMER_READ(sc, MESON_TIMERE);
9892c78af1Sskrll }
9992c78af1Sskrll 
100*6e54367aSthorpej static const struct device_compatible_entry compat_data[] = {
101*6e54367aSthorpej 	{ .compat = "amlogic,meson6-timer" },
102*6e54367aSthorpej 	DEVICE_COMPAT_EOL
103*6e54367aSthorpej };
10492c78af1Sskrll 
10592c78af1Sskrll static int
meson6_timer_match(device_t parent,cfdata_t cf,void * aux)10692c78af1Sskrll meson6_timer_match(device_t parent, cfdata_t cf, void *aux)
10792c78af1Sskrll {
10892c78af1Sskrll 	struct fdt_attach_args * const faa = aux;
10992c78af1Sskrll 
110*6e54367aSthorpej 	return of_compatible_match(faa->faa_phandle, compat_data);
11192c78af1Sskrll }
11292c78af1Sskrll 
11392c78af1Sskrll static void
meson6_timer_attach(device_t parent,device_t self,void * aux)11492c78af1Sskrll meson6_timer_attach(device_t parent, device_t self, void *aux)
11592c78af1Sskrll {
11692c78af1Sskrll 	struct meson6_timer_softc * const sc = device_private(self);
11792c78af1Sskrll 	struct fdt_attach_args * const faa = aux;
11892c78af1Sskrll 	const int phandle = faa->faa_phandle;
11992c78af1Sskrll 	bus_addr_t addr;
12092c78af1Sskrll 	bus_size_t size;
12192c78af1Sskrll 
12292c78af1Sskrll 	if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
12392c78af1Sskrll 		aprint_error(": couldn't get registers\n");
12492c78af1Sskrll 		return;
12592c78af1Sskrll 	}
12692c78af1Sskrll 
12792c78af1Sskrll 	sc->sc_dev = self;
12892c78af1Sskrll 	sc->sc_bst = faa->faa_bst;
12992c78af1Sskrll 	if (bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh) != 0) {
13092c78af1Sskrll 		aprint_error(": couldn't map registers\n");
13192c78af1Sskrll 		return;
13292c78af1Sskrll 	}
13392c78af1Sskrll 
13492c78af1Sskrll 	/* Enable clocks */
13592c78af1Sskrll 	struct clk *clk;
13692c78af1Sskrll 	for (int i = 0; (clk = fdtbus_clock_get_index(phandle, i)); i++) {
13792c78af1Sskrll 		if (clk_enable(clk) != 0) {
13892c78af1Sskrll 			aprint_error(": failed to enable clock #%d\n", i);
13992c78af1Sskrll 			return;
14092c78af1Sskrll 		}
14192c78af1Sskrll 	}
14292c78af1Sskrll 
14392c78af1Sskrll 	aprint_naive("\n");
14492c78af1Sskrll 	aprint_normal(": Timers\n");
14592c78af1Sskrll 
14692c78af1Sskrll 	uint32_t mask = TIMER_READ(sc, MESON_TIMER_MUX);
14792c78af1Sskrll 	mask &= ~MESON_TIMER_MUX_TIMERE_INPUT_CLOCK_MASK;
14892c78af1Sskrll 	mask |= __SHIFTIN(MESON_TIMER_MUX_TIMERE_INPUT_CLOCK_1US, MESON_TIMER_MUX_TIMERE_INPUT_CLOCK_MASK);
14992c78af1Sskrll 
15092c78af1Sskrll 	TIMER_WRITE(sc, MESON_TIMER_MUX, mask);
15192c78af1Sskrll 
15292c78af1Sskrll 	/* Timecounter setup */
15392c78af1Sskrll 	struct timecounter *tc = &sc->sc_tc;
15492c78af1Sskrll 	tc->tc_get_timecount = meson6_timer_get_timecount;
15592c78af1Sskrll 	tc->tc_counter_mask = ~0u;
15692c78af1Sskrll 	tc->tc_frequency = 1000000;
15792c78af1Sskrll 	tc->tc_name = "Timer E";
15892c78af1Sskrll 	tc->tc_quality = 500;
15992c78af1Sskrll 	tc->tc_priv = sc;
16092c78af1Sskrll 	tc_init(tc);
16192c78af1Sskrll }
16292c78af1Sskrll 
163