xref: /netbsd-src/sys/arch/arm/acpi/acpi_pci_smccc.c (revision aa987bdd696911cfcdc51bad3dff086d755e7ab2)
1*aa987bddSjmcneill /* $NetBSD: acpi_pci_smccc.c,v 1.2 2022/10/15 10:45:40 jmcneill Exp $ */
212a41c4dSjmcneill 
312a41c4dSjmcneill /*-
412a41c4dSjmcneill  * Copyright (c) 2021 Jared McNeill <jmcneill@invisible.ca>
512a41c4dSjmcneill  * All rights reserved.
612a41c4dSjmcneill  *
712a41c4dSjmcneill  * Redistribution and use in source and binary forms, with or without
812a41c4dSjmcneill  * modification, are permitted provided that the following conditions
912a41c4dSjmcneill  * are met:
1012a41c4dSjmcneill  * 1. Redistributions of source code must retain the above copyright
1112a41c4dSjmcneill  *    notice, this list of conditions and the following disclaimer.
1212a41c4dSjmcneill  * 2. Redistributions in binary form must reproduce the above copyright
1312a41c4dSjmcneill  *    notice, this list of conditions and the following disclaimer in the
1412a41c4dSjmcneill  *    documentation and/or other materials provided with the distribution.
1512a41c4dSjmcneill  *
1612a41c4dSjmcneill  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
1712a41c4dSjmcneill  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
1812a41c4dSjmcneill  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
1912a41c4dSjmcneill  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
2012a41c4dSjmcneill  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
2112a41c4dSjmcneill  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
2212a41c4dSjmcneill  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
2312a41c4dSjmcneill  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
2412a41c4dSjmcneill  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
2512a41c4dSjmcneill  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
2612a41c4dSjmcneill  * SUCH DAMAGE.
2712a41c4dSjmcneill  */
2812a41c4dSjmcneill 
2912a41c4dSjmcneill #include <sys/cdefs.h>
30*aa987bddSjmcneill __KERNEL_RCSID(0, "$NetBSD: acpi_pci_smccc.c,v 1.2 2022/10/15 10:45:40 jmcneill Exp $");
3112a41c4dSjmcneill 
3212a41c4dSjmcneill #include <sys/param.h>
3312a41c4dSjmcneill #include <sys/kernel.h>
3412a41c4dSjmcneill 
3512a41c4dSjmcneill #include <dev/pci/pcireg.h>
3612a41c4dSjmcneill #include <dev/pci/pcivar.h>
3712a41c4dSjmcneill #include <dev/pci/pciconf.h>
3812a41c4dSjmcneill 
3912a41c4dSjmcneill #include <dev/acpi/acpivar.h>
4012a41c4dSjmcneill #include <dev/acpi/acpi_pci.h>
4112a41c4dSjmcneill #include <dev/acpi/acpi_mcfg.h>
4212a41c4dSjmcneill 
4312a41c4dSjmcneill #include <arm/acpi/acpi_pci_machdep.h>
4412a41c4dSjmcneill 
4512a41c4dSjmcneill #include <arm/pci/pci_smccc.h>
4612a41c4dSjmcneill 
4712a41c4dSjmcneill static int
acpi_pci_smccc_conf_read(pci_chipset_tag_t pc,pcitag_t tag,int reg,pcireg_t * data)4812a41c4dSjmcneill acpi_pci_smccc_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int reg,
4912a41c4dSjmcneill     pcireg_t *data)
5012a41c4dSjmcneill {
5112a41c4dSjmcneill 	struct acpi_pci_context *ap = pc->pc_conf_v;
5212a41c4dSjmcneill 	int b, d, f;
5312a41c4dSjmcneill 	int status;
5412a41c4dSjmcneill 
5512a41c4dSjmcneill 	pci_decompose_tag(pc, tag, &b, &d, &f);
5612a41c4dSjmcneill 
5712a41c4dSjmcneill 	if (b < ap->ap_bus || b > ap->ap_maxbus) {
5812a41c4dSjmcneill 		*data = -1;
5912a41c4dSjmcneill 		return EINVAL;
6012a41c4dSjmcneill 	}
6112a41c4dSjmcneill 
6212a41c4dSjmcneill 	status = pci_smccc_read(PCI_SMCCC_SBDF(ap->ap_seg, b, d, f), reg,
6312a41c4dSjmcneill 				PCI_SMCCC_ACCESS_32BIT, data);
6412a41c4dSjmcneill 	if (!PCI_SMCCC_SUCCESS(status)) {
6512a41c4dSjmcneill 		*data = -1;
6612a41c4dSjmcneill 		return EINVAL;
6712a41c4dSjmcneill 	}
6812a41c4dSjmcneill 
6912a41c4dSjmcneill 	return 0;
7012a41c4dSjmcneill }
7112a41c4dSjmcneill 
7212a41c4dSjmcneill static int
acpi_pci_smccc_conf_write(pci_chipset_tag_t pc,pcitag_t tag,int reg,pcireg_t data)7312a41c4dSjmcneill acpi_pci_smccc_conf_write(pci_chipset_tag_t pc, pcitag_t tag, int reg,
7412a41c4dSjmcneill     pcireg_t data)
7512a41c4dSjmcneill {
7612a41c4dSjmcneill 	struct acpi_pci_context *ap = pc->pc_conf_v;
7712a41c4dSjmcneill 	int b, d, f;
7812a41c4dSjmcneill 	int status;
7912a41c4dSjmcneill 
8012a41c4dSjmcneill 	pci_decompose_tag(pc, tag, &b, &d, &f);
8112a41c4dSjmcneill 
8212a41c4dSjmcneill 	if (b < ap->ap_bus || b > ap->ap_maxbus) {
8312a41c4dSjmcneill 		return EINVAL;
8412a41c4dSjmcneill 	}
8512a41c4dSjmcneill 
8612a41c4dSjmcneill 	status = pci_smccc_write(PCI_SMCCC_SBDF(ap->ap_seg, b, d, f), reg,
8712a41c4dSjmcneill 				 PCI_SMCCC_ACCESS_32BIT, data);
8812a41c4dSjmcneill 	if (!PCI_SMCCC_SUCCESS(status)) {
8912a41c4dSjmcneill 		return EINVAL;
9012a41c4dSjmcneill 	}
9112a41c4dSjmcneill 
9212a41c4dSjmcneill 	return 0;
9312a41c4dSjmcneill }
9412a41c4dSjmcneill 
9512a41c4dSjmcneill 
9612a41c4dSjmcneill void
acpi_pci_smccc_init(struct acpi_pci_context * ap)9712a41c4dSjmcneill acpi_pci_smccc_init(struct acpi_pci_context *ap)
9812a41c4dSjmcneill {
9912a41c4dSjmcneill 	int status, ver;
10012a41c4dSjmcneill 	uint8_t bus_start, bus_end;
10112a41c4dSjmcneill 	uint16_t next_seg;
10212a41c4dSjmcneill 
10312a41c4dSjmcneill 	ver = pci_smccc_version();
10412a41c4dSjmcneill 	if (!PCI_SMCCC_SUCCESS(ver)) {
10512a41c4dSjmcneill 		aprint_error_dev(ap->ap_dev,
10612a41c4dSjmcneill 		    "SMCCC: PCI_VERSION call failed, status %#x\n", ver);
10712a41c4dSjmcneill 		return;
10812a41c4dSjmcneill 	}
10912a41c4dSjmcneill 	aprint_normal_dev(ap->ap_dev, "SMCCC: PCI impl. version %u.%u\n",
11012a41c4dSjmcneill 	    (ver >> 16) & 0x7fff, ver & 0xffff);
11112a41c4dSjmcneill 
11212a41c4dSjmcneill 	status = pci_smccc_get_seg_info(ap->ap_seg, &bus_start, &bus_end,
11312a41c4dSjmcneill 	    &next_seg);
11412a41c4dSjmcneill 	if (!PCI_SMCCC_SUCCESS(status)) {
11512a41c4dSjmcneill 		aprint_error_dev(ap->ap_dev,
11612a41c4dSjmcneill 		    "SMCCC: No info for segment %u, status %#x\n",
11712a41c4dSjmcneill 		    ap->ap_seg, status);
11812a41c4dSjmcneill 		return;
11912a41c4dSjmcneill 	}
12012a41c4dSjmcneill 	aprint_normal_dev(ap->ap_dev, "SMCCC: segment %u, bus %u-%u\n",
12112a41c4dSjmcneill 	    ap->ap_seg, bus_start, bus_end);
12212a41c4dSjmcneill 
12312a41c4dSjmcneill 	ap->ap_bus = bus_start;
12412a41c4dSjmcneill 	ap->ap_maxbus = bus_end;
12512a41c4dSjmcneill 	ap->ap_conf_read = acpi_pci_smccc_conf_read;
12612a41c4dSjmcneill 	ap->ap_conf_write = acpi_pci_smccc_conf_write;
12712a41c4dSjmcneill 	ap->ap_flags |= ACPI_PCI_FLAG_NO_MCFG;
12812a41c4dSjmcneill 	ap->ap_pciflags_clear = PCI_FLAGS_MSI_OKAY | PCI_FLAGS_MSIX_OKAY;
12912a41c4dSjmcneill }
130