1 /* $NetBSD: ivsc.c,v 1.11 1995/05/07 15:37:10 chopps Exp $ */ 2 3 /* 4 * Copyright (c) 1994 Michael L. Hitch 5 * Copyright (c) 1982, 1990 The Regents of the University of California. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by the University of 19 * California, Berkeley and its contributors. 20 * 4. Neither the name of the University nor the names of its contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 * @(#)ivsdma.c 37 */ 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/kernel.h> 41 #include <sys/device.h> 42 #include <scsi/scsi_all.h> 43 #include <scsi/scsiconf.h> 44 #include <amiga/amiga/custom.h> 45 #include <amiga/amiga/device.h> 46 #include <amiga/amiga/isr.h> 47 #include <amiga/dev/scireg.h> 48 #include <amiga/dev/scivar.h> 49 #include <amiga/dev/zbusvar.h> 50 51 int ivscprint __P((void *auxp, char *)); 52 void ivscattach __P((struct device *, struct device *, void *)); 53 int ivscmatch __P((struct device *, struct cfdata *, void *)); 54 55 int ivsc_intr __P((struct sci_softc *)); 56 int ivsc_dma_xfer_in __P((struct sci_softc *dev, int len, 57 register u_char *buf, int phase)); 58 int ivsc_dma_xfer_out __P((struct sci_softc *dev, int len, 59 register u_char *buf, int phase)); 60 61 struct scsi_adapter ivsc_scsiswitch = { 62 sci_scsicmd, 63 sci_minphys, 64 0, /* no lun support */ 65 0, /* no lun support */ 66 }; 67 68 struct scsi_device ivsc_scsidev = { 69 NULL, /* use default error handler */ 70 NULL, /* do not have a start functio */ 71 NULL, /* have no async handler */ 72 NULL, /* Use default done routine */ 73 }; 74 75 #define QPRINTF 76 77 #ifdef DEBUG 78 extern int sci_debug; 79 #endif 80 81 extern int sci_data_wait; 82 83 int ivsdma_pseudo = 1; /* 0=off, 1=on */ 84 85 struct cfdriver ivsccd = { 86 NULL, "ivsc", (cfmatch_t)ivscmatch, ivscattach, 87 DV_DULL, sizeof(struct sci_softc), NULL, 0 }; 88 89 /* 90 * if this is an IVS board 91 */ 92 int 93 ivscmatch(pdp, cdp, auxp) 94 struct device *pdp; 95 struct cfdata *cdp; 96 void *auxp; 97 { 98 struct zbus_args *zap; 99 100 zap = auxp; 101 102 /* 103 * Check manufacturer and product id. 104 */ 105 if (zap->manid != 2112 || /* If manufacturer is IVS */ 106 (zap->prodid != 52 && /* product = Trumpcard */ 107 zap->prodid != 243)) /* product = Vector SCSI */ 108 return(0); /* didn't match */ 109 return(1); 110 } 111 112 void 113 ivscattach(pdp, dp, auxp) 114 struct device *pdp, *dp; 115 void *auxp; 116 { 117 volatile u_char *rp; 118 struct sci_softc *sc; 119 struct zbus_args *zap; 120 121 printf("\n"); 122 123 zap = auxp; 124 125 sc = (struct sci_softc *)dp; 126 rp = zap->va + 0x40; 127 sc->sci_data = rp; 128 sc->sci_odata = rp; 129 sc->sci_icmd = rp + 2; 130 sc->sci_mode = rp + 4; 131 sc->sci_tcmd = rp + 6; 132 sc->sci_bus_csr = rp + 8; 133 sc->sci_sel_enb = rp + 8; 134 sc->sci_csr = rp + 10; 135 sc->sci_dma_send = rp + 10; 136 sc->sci_idata = rp + 12; 137 sc->sci_trecv = rp + 12; 138 sc->sci_iack = rp + 14; 139 sc->sci_irecv = rp + 14; 140 141 if (ivsdma_pseudo == 1) { 142 sc->dma_xfer_in = ivsc_dma_xfer_in; 143 sc->dma_xfer_out = ivsc_dma_xfer_out; 144 } 145 146 sc->sc_isr.isr_intr = ivsc_intr; 147 sc->sc_isr.isr_arg = sc; 148 sc->sc_isr.isr_ipl = 2; 149 add_isr(&sc->sc_isr); 150 151 scireset(sc); 152 153 sc->sc_link.adapter_softc = sc; 154 sc->sc_link.adapter_target = 7; 155 sc->sc_link.adapter = &ivsc_scsiswitch; 156 sc->sc_link.device = &ivsc_scsidev; 157 sc->sc_link.openings = 1; 158 TAILQ_INIT(&sc->sc_xslist); 159 160 /* 161 * attach all scsi units on us 162 */ 163 config_found(dp, &sc->sc_link, ivscprint); 164 } 165 166 /* 167 * print diag if pnp is NULL else just extra 168 */ 169 int 170 ivscprint(auxp, pnp) 171 void *auxp; 172 char *pnp; 173 { 174 if (pnp == NULL) 175 return(UNCONF); 176 return(QUIET); 177 } 178 179 int 180 ivsc_dma_xfer_in (dev, len, buf, phase) 181 struct sci_softc *dev; 182 int len; 183 register u_char *buf; 184 int phase; 185 { 186 int wait = sci_data_wait; 187 u_char csr; 188 u_char *obp = buf; 189 volatile register u_char *sci_dma = dev->sci_idata + 0x20; 190 volatile register u_char *sci_csr = dev->sci_csr; 191 192 QPRINTF(("ivsc_dma_in %d, csr=%02x\n", len, *dev->sci_bus_csr)); 193 194 *dev->sci_tcmd = phase; 195 *dev->sci_mode |= SCI_MODE_DMA; 196 *dev->sci_irecv = 0; 197 198 while (len >= 128) { 199 wait = sci_data_wait; 200 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 201 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 202 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 203 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 204 || --wait < 0) { 205 #ifdef DEBUG 206 if (sci_debug) 207 printf("ivsc_dma_in2 fail: l%d i%x w%d\n", 208 len, csr, wait); 209 #endif 210 *dev->sci_mode &= ~SCI_MODE_DMA; 211 return 0; 212 } 213 } 214 215 #define R1 (*buf++ = *sci_dma) 216 R1; R1; R1; R1; R1; R1; R1; R1; 217 R1; R1; R1; R1; R1; R1; R1; R1; 218 R1; R1; R1; R1; R1; R1; R1; R1; 219 R1; R1; R1; R1; R1; R1; R1; R1; 220 R1; R1; R1; R1; R1; R1; R1; R1; 221 R1; R1; R1; R1; R1; R1; R1; R1; 222 R1; R1; R1; R1; R1; R1; R1; R1; 223 R1; R1; R1; R1; R1; R1; R1; R1; 224 R1; R1; R1; R1; R1; R1; R1; R1; 225 R1; R1; R1; R1; R1; R1; R1; R1; 226 R1; R1; R1; R1; R1; R1; R1; R1; 227 R1; R1; R1; R1; R1; R1; R1; R1; 228 R1; R1; R1; R1; R1; R1; R1; R1; 229 R1; R1; R1; R1; R1; R1; R1; R1; 230 R1; R1; R1; R1; R1; R1; R1; R1; 231 R1; R1; R1; R1; R1; R1; R1; R1; 232 len -= 128; 233 } 234 235 while (len > 0) { 236 wait = sci_data_wait; 237 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 238 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 239 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 240 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 241 || --wait < 0) { 242 #ifdef DEBUG 243 if (sci_debug) 244 printf("ivsc_dma_in1 fail: l%d i%x w%d\n", 245 len, csr, wait); 246 #endif 247 *dev->sci_mode &= ~SCI_MODE_DMA; 248 return 0; 249 } 250 } 251 252 *buf++ = *sci_dma; 253 len--; 254 } 255 256 QPRINTF(("ivsc_dma_in {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 257 len, obp[0], obp[1], obp[2], obp[3], obp[4], obp[5], 258 obp[6], obp[7], obp[8], obp[9])); 259 260 *dev->sci_mode &= ~SCI_MODE_DMA; 261 return 0; 262 } 263 264 int 265 ivsc_dma_xfer_out (dev, len, buf, phase) 266 struct sci_softc *dev; 267 int len; 268 register u_char *buf; 269 int phase; 270 { 271 int wait = sci_data_wait; 272 u_char csr; 273 u_char *obp = buf; 274 volatile register u_char *sci_dma = dev->sci_data + 0x20; 275 volatile register u_char *sci_csr = dev->sci_csr; 276 277 QPRINTF(("ivsc_dma_out %d, csr=%02x\n", len, *dev->sci_bus_csr)); 278 279 QPRINTF(("ivsc_dma_out {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 280 len, buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], 281 buf[6], buf[7], buf[8], buf[9])); 282 283 *dev->sci_tcmd = phase; 284 *dev->sci_mode |= SCI_MODE_DMA; 285 *dev->sci_icmd |= SCI_ICMD_DATA; 286 *dev->sci_dma_send = 0; 287 while (len > 0) { 288 wait = sci_data_wait; 289 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 290 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 291 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 292 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 293 || --wait < 0) { 294 #ifdef DEBUG 295 if (sci_debug) 296 printf("ivsc_dma_out fail: l%d i%x w%d\n", 297 len, csr, wait); 298 #endif 299 *dev->sci_mode &= ~SCI_MODE_DMA; 300 return 0; 301 } 302 } 303 304 *sci_dma = *buf++; 305 len--; 306 } 307 308 wait = sci_data_wait; 309 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) == 310 SCI_CSR_PHASE_MATCH && --wait); 311 312 313 *dev->sci_mode &= ~SCI_MODE_DMA; 314 return 0; 315 } 316 317 int 318 ivsc_intr(dev) 319 struct sci_softc *dev; 320 { 321 u_char stat; 322 323 if ((*dev->sci_csr & SCI_CSR_INT) == 0) 324 return(0); 325 stat = *dev->sci_iack; 326 } 327