1 /* $NetBSD: grf_cl.c,v 1.23 1999/03/14 09:17:19 veego Exp $ */ 2 3 /* 4 * Copyright (c) 1997 Klaus Burkert 5 * Copyright (c) 1995 Ezra Story 6 * Copyright (c) 1995 Kari Mettinen 7 * Copyright (c) 1994 Markus Wild 8 * Copyright (c) 1994 Lutz Vieweg 9 * All rights reserved. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by Lutz Vieweg. 22 * 4. The name of the author may not be used to endorse or promote products 23 * derived from this software without specific prior written permission 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 26 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 27 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 28 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 29 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 30 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 31 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 32 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 33 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 34 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 */ 36 #include "grfcl.h" 37 #if NGRFCL > 0 38 39 /* 40 * Graphics routines for Cirrus CL GD 5426 boards, 41 * 42 * This code offers low-level routines to access Cirrus Cl GD 5426 43 * graphics-boards from within NetBSD for the Amiga. 44 * No warranties for any kind of function at all - this 45 * code may crash your hardware and scratch your harddisk. Use at your 46 * own risk. Freely distributable. 47 * 48 * Modified for Cirrus CL GD 5426 from 49 * Lutz Vieweg's retina driver by Kari Mettinen 08/94 50 * Contributions by Ill, ScottE, MiL 51 * Extensively hacked and rewritten by Ezra Story (Ezy) 01/95 52 * Picasso/040 patches (wee!) by crest 01/96 53 * 54 * PicassoIV support bz Klaus "crest" Burkert. 55 * Fixed interlace and doublescan, added clockdoubling and 56 * HiColor&TrueColor suuport by crest 01/97 57 * 58 * Thanks to Village Tronic Marketing Gmbh for providing me with 59 * a Picasso-II board. 60 * Thanks for Integrated Electronics Oy Ab for providing me with 61 * Cirrus CL GD 542x family documentation. 62 * 63 * TODO: 64 * Mouse support (almost there! :-)) 65 * Blitter support 66 * 67 */ 68 69 #include <sys/param.h> 70 #include <sys/systm.h> 71 #include <sys/errno.h> 72 #include <sys/ioctl.h> 73 #include <sys/device.h> 74 #include <sys/malloc.h> 75 76 #include <machine/cpu.h> 77 #include <dev/cons.h> 78 #include <amiga/dev/itevar.h> 79 #include <amiga/amiga/device.h> 80 #include <amiga/dev/grfioctl.h> 81 #include <amiga/dev/grfvar.h> 82 #include <amiga/dev/grf_clreg.h> 83 #include <amiga/dev/zbusvar.h> 84 85 int cl_mondefok __P((struct grfvideo_mode *)); 86 void cl_boardinit __P((struct grf_softc *)); 87 static void cl_CompFQ __P((u_int, u_char *, u_char *, u_char *)); 88 int cl_getvmode __P((struct grf_softc *, struct grfvideo_mode *)); 89 int cl_setvmode __P((struct grf_softc *, unsigned int)); 90 int cl_toggle __P((struct grf_softc *, unsigned short)); 91 int cl_getcmap __P((struct grf_softc *, struct grf_colormap *)); 92 int cl_putcmap __P((struct grf_softc *, struct grf_colormap *)); 93 #ifndef CL5426CONSOLE 94 void cl_off __P((struct grf_softc *)); 95 #endif 96 void cl_inittextmode __P((struct grf_softc *)); 97 int cl_ioctl __P((register struct grf_softc *, u_long, void *)); 98 int cl_getmousepos __P((struct grf_softc *, struct grf_position *)); 99 int cl_setmousepos __P((struct grf_softc *, struct grf_position *)); 100 static int cl_setspriteinfo __P((struct grf_softc *, struct grf_spriteinfo *)); 101 int cl_getspriteinfo __P((struct grf_softc *, struct grf_spriteinfo *)); 102 static int cl_getspritemax __P((struct grf_softc *, struct grf_position *)); 103 int cl_blank __P((struct grf_softc *, int *)); 104 int cl_setmonitor __P((struct grf_softc *, struct grfvideo_mode *)); 105 void cl_writesprpos __P((volatile char *, short, short)); 106 void writeshifted __P((volatile char *, char, char)); 107 108 static void RegWakeup __P((volatile caddr_t)); 109 static void RegOnpass __P((volatile caddr_t)); 110 static void RegOffpass __P((volatile caddr_t)); 111 112 void grfclattach __P((struct device *, struct device *, void *)); 113 int grfclprint __P((void *, const char *)); 114 int grfclmatch __P((struct device *, struct cfdata *, void *)); 115 void cl_memset __P((unsigned char *, unsigned char, int)); 116 117 /* Graphics display definitions. 118 * These are filled by 'grfconfig' using GRFIOCSETMON. 119 */ 120 #define monitor_def_max 24 121 static struct grfvideo_mode monitor_def[24] = { 122 {0}, {0}, {0}, {0}, {0}, {0}, {0}, {0}, 123 {0}, {0}, {0}, {0}, {0}, {0}, {0}, {0}, 124 {0}, {0}, {0}, {0}, {0}, {0}, {0}, {0} 125 }; 126 static struct grfvideo_mode *monitor_current = &monitor_def[0]; 127 128 /* Patchable maximum pixel clock */ 129 unsigned long cl_maxpixelclock = 86000000; 130 131 /* Console display definition. 132 * Default hardcoded text mode. This grf_cl is set up to 133 * use one text mode only, and this is it. You may use 134 * grfconfig to change the mode after boot. 135 */ 136 /* Console font */ 137 #ifdef KFONT_8X11 138 #define CIRRUSFONT kernel_font_8x11 139 #define CIRRUSFONTY 11 140 #else 141 #define CIRRUSFONT kernel_font_8x8 142 #define CIRRUSFONTY 8 143 #endif 144 extern unsigned char CIRRUSFONT[]; 145 146 struct grfcltext_mode clconsole_mode = { 147 {255, "", 25200000, 640, 480, 4, 640/8, 752/8, 792/8, 800/8, 148 481, 490, 498, 522, 0}, 149 8, CIRRUSFONTY, 80, 480 / CIRRUSFONTY, CIRRUSFONT, 32, 255 150 }; 151 /* Console colors */ 152 unsigned char clconscolors[3][3] = { /* background, foreground, hilite */ 153 {0, 0x40, 0x50}, {152, 152, 152}, {255, 255, 255} 154 }; 155 156 int cltype = 0; /* Picasso, Spectrum or Piccolo */ 157 int cl_64bit = 0; /* PiccoloSD64 or PicassoIV */ 158 unsigned char pass_toggle; /* passthru status tracker */ 159 160 /* 161 * because all 542x-boards have 2 configdev entries, one for 162 * framebuffer mem and the other for regs, we have to hold onto 163 * the pointers globally until we match on both. This and 'cltype' 164 * are the primary obsticles to multiple board support, but if you 165 * have multiple boards you have bigger problems than grf_cl. 166 */ 167 static void *cl_fbaddr = 0; /* framebuffer */ 168 static void *cl_regaddr = 0; /* registers */ 169 static int cl_fbsize; /* framebuffer size */ 170 static int cl_fbautosize; /* framebuffer autoconfig size */ 171 172 173 /* 174 * current sprite info, if you add support for multiple boards 175 * make this an array or something 176 */ 177 struct grf_spriteinfo cl_cursprite; 178 179 /* sprite bitmaps in kernel stack, you'll need to arrayize these too if 180 * you add multiple board support 181 */ 182 static unsigned char cl_imageptr[8 * 64], cl_maskptr[8 * 64]; 183 static unsigned char cl_sprred[2], cl_sprgreen[2], cl_sprblue[2]; 184 185 /* standard driver stuff */ 186 struct cfattach grfcl_ca = { 187 sizeof(struct grf_softc), grfclmatch, grfclattach 188 }; 189 190 static struct cfdata *cfdata; 191 192 int 193 grfclmatch(pdp, cfp, auxp) 194 struct device *pdp; 195 struct cfdata *cfp; 196 void *auxp; 197 { 198 struct zbus_args *zap; 199 static int regprod, fbprod, fbprod2; 200 int error; 201 202 fbprod2 = 0; 203 zap = auxp; 204 205 #ifndef CL5426CONSOLE 206 if (amiga_realconfig == 0) 207 return (0); 208 #endif 209 210 /* Grab the first board we encounter as the preferred one. This will 211 * allow one board to work in a multiple 5426 board system, but not 212 * multiple boards at the same time. */ 213 if (cltype == 0) { 214 switch (zap->manid) { 215 case PICASSO: 216 switch (zap->prodid) { 217 case 11: 218 case 12: 219 regprod = 12; 220 fbprod = 11; 221 error = 0; 222 break; 223 case 22: 224 fbprod2 = 22; 225 error = 0; 226 break; 227 case 21: 228 case 23: 229 regprod = 23; 230 fbprod = 21; 231 cl_64bit = 1; 232 error = 0; 233 break; 234 case 24: 235 regprod = 24; 236 fbprod = 24; 237 cl_64bit = 1; 238 error = 0; 239 break; 240 default: 241 error = 1; 242 break; 243 } 244 if (error == 1) 245 return (0); 246 else 247 break; 248 case SPECTRUM: 249 if (zap->prodid != 2 && zap->prodid != 1) 250 return (0); 251 regprod = 2; 252 fbprod = 1; 253 break; 254 case PICCOLO: 255 switch (zap->prodid) { 256 case 5: 257 case 6: 258 regprod = 6; 259 fbprod = 5; 260 error = 0; 261 break; 262 case 10: 263 case 11: 264 regprod = 11; 265 fbprod = 10; 266 cl_64bit = 1; 267 error = 0; 268 break; 269 default: 270 error = 1; 271 break; 272 } 273 if (error == 1) 274 return (0); 275 else 276 break; 277 default: 278 return (0); 279 } 280 cltype = zap->manid; 281 } else { 282 if (cltype != zap->manid) { 283 return (0); 284 } 285 } 286 287 /* Configure either registers or framebuffer in any order */ 288 if ((cltype == PICASSO) && (cl_64bit == 1)) { 289 switch (zap->prodid) { 290 case 21: 291 cl_fbaddr = zap->va; 292 cl_fbautosize = zap->size; 293 break; 294 case 22: 295 cl_fbautosize += zap->size; 296 break; 297 case 23: 298 cl_regaddr = (void *)((unsigned long)(zap->va) + 0x10000); 299 break; 300 case 24: 301 cl_regaddr = (void *)((unsigned long)(zap->va) + 0x600000); 302 /* check for PicassoIV with 64MB config and handle it */ 303 if (zap->size == 0x04000000) { 304 cl_fbaddr = (void *)((unsigned long)(zap->va) + 0x02000000); 305 } else { 306 cl_fbaddr = (void *)((unsigned long)(zap->va) + 0x01000000); 307 } 308 cl_fbautosize = 0x400000; 309 break; 310 default: 311 return (0); 312 } 313 } 314 else { 315 if (zap->prodid == regprod) 316 cl_regaddr = zap->va; 317 else 318 if (zap->prodid == fbprod) { 319 cl_fbaddr = zap->va; 320 cl_fbautosize = zap->size; 321 } else 322 return (0); 323 } 324 325 #ifdef CL5426CONSOLE 326 if (amiga_realconfig == 0) { 327 cfdata = cfp; 328 } 329 #endif 330 331 return (1); 332 } 333 334 void 335 grfclattach(pdp, dp, auxp) 336 struct device *pdp, *dp; 337 void *auxp; 338 { 339 static struct grf_softc congrf; 340 struct zbus_args *zap; 341 struct grf_softc *gp; 342 static char attachflag = 0; 343 344 zap = auxp; 345 346 printf("\n"); 347 348 /* make sure both halves have matched */ 349 if (!cl_regaddr || !cl_fbaddr) 350 return; 351 352 /* do all that messy console/grf stuff */ 353 if (dp == NULL) 354 gp = &congrf; 355 else 356 gp = (struct grf_softc *) dp; 357 358 if (dp != NULL && congrf.g_regkva != 0) { 359 /* 360 * inited earlier, just copy (not device struct) 361 */ 362 bcopy(&congrf.g_display, &gp->g_display, 363 (char *) &gp[1] - (char *) &gp->g_display); 364 } else { 365 gp->g_regkva = (volatile caddr_t) cl_regaddr; 366 gp->g_fbkva = (volatile caddr_t) cl_fbaddr; 367 368 gp->g_unit = GRF_CL5426_UNIT; 369 gp->g_mode = cl_mode; 370 gp->g_conpri = grfcl_cnprobe(); 371 gp->g_flags = GF_ALIVE; 372 373 /* wakeup the board */ 374 cl_boardinit(gp); 375 #ifdef CL5426CONSOLE 376 grfcl_iteinit(gp); 377 (void) cl_load_mon(gp, &clconsole_mode); 378 #endif 379 380 } 381 382 /* 383 * attach grf (once) 384 */ 385 if (amiga_config_found(cfdata, &gp->g_device, gp, grfclprint)) { 386 attachflag = 1; 387 printf("grfcl: %dMB ", cl_fbsize / 0x100000); 388 switch (cltype) { 389 case PICASSO: 390 if (cl_64bit == 1) { 391 printf("Picasso IV"); 392 /* 135MHz will be supported if we 393 * have a palette doubling mode. 394 */ 395 cl_maxpixelclock = 86000000; 396 } 397 else { 398 printf("Picasso II"); 399 400 /* check for PicassoII+ (crest) */ 401 if(zap->serno == 0x00100000) 402 printf("+"); 403 404 /* determine used Gfx/chipset (crest) */ 405 vgaw(gp->g_regkva, CRT_ADDRESS, 0x27); /* Chip ID */ 406 switch(vgar(gp->g_regkva, CRT_ADDRESS_R)>>2) { 407 case 0x24: 408 printf(" (with CL-GD5426)"); 409 break; 410 case 0x26: 411 printf(" (with CL-GD5428)"); 412 break; 413 case 0x27: 414 printf(" (with CL-GD5429)"); 415 break; 416 } 417 cl_maxpixelclock = 86000000; 418 } 419 break; 420 case SPECTRUM: 421 printf("Spectrum"); 422 cl_maxpixelclock = 90000000; 423 break; 424 case PICCOLO: 425 if (cl_64bit == 1) { 426 printf("Piccolo SD64"); 427 /* 110MHz will be supported if we 428 * have a palette doubling mode. 429 */ 430 cl_maxpixelclock = 90000000; 431 } else { 432 printf("Piccolo"); 433 cl_maxpixelclock = 90000000; 434 } 435 break; 436 } 437 printf(" being used\n"); 438 #ifdef CL_OVERCLOCK 439 cl_maxpixelclock = 115000000; 440 #endif 441 } else { 442 if (!attachflag) 443 printf("grfcl unattached!!\n"); 444 } 445 } 446 447 int 448 grfclprint(auxp, pnp) 449 void *auxp; 450 const char *pnp; 451 { 452 if (pnp) 453 printf("ite at %s: ", pnp); 454 return (UNCONF); 455 } 456 457 void 458 cl_boardinit(gp) 459 struct grf_softc *gp; 460 { 461 unsigned char *ba = gp->g_regkva; 462 int x; 463 464 if ((cltype == PICASSO) && (cl_64bit == 1)) { /* PicassoIV */ 465 WCrt(ba, 0x51, 0x00); /* disable capture (FlickerFixer) */ 466 delay(200000); /* wait some time (two frames as of now) */ 467 WGfx(ba, 0x2f, 0x00); /* get Blitter into 542x */ 468 WGfx(ba, GCT_ID_RESERVED, 0x00); /* compatibility mode */ 469 WGfx(ba, GCT_ID_BLT_STAT_START, 0x00); /* or at least, try so... */ 470 cl_fbsize = cl_fbautosize; 471 } else { 472 473 /* wakeup board and flip passthru OFF */ 474 RegWakeup(ba); 475 RegOnpass(ba); 476 477 vgaw(ba, 0x46e8, 0x16); 478 vgaw(ba, 0x102, 1); 479 vgaw(ba, 0x46e8, 0x0e); 480 if (cl_64bit != 1) 481 vgaw(ba, 0x3c3, 1); 482 483 cl_fbsize = cl_fbautosize; 484 485 /* setup initial unchanging parameters */ 486 487 WSeq(ba, SEQ_ID_CLOCKING_MODE, 0x21); /* 8 dot - display off */ 488 vgaw(ba, GREG_MISC_OUTPUT_W, 0xed); /* mem disable */ 489 490 WGfx(ba, GCT_ID_OFFSET_1, 0xec); /* magic cookie */ 491 WSeq(ba, SEQ_ID_UNLOCK_EXT, 0x12); /* yum! cookies! */ 492 493 if (cl_64bit == 1) { 494 WSeq(ba, SEQ_ID_CONF_RBACK, 0x00); 495 WSeq(ba, SEQ_ID_DRAM_CNTL, (cl_fbsize / 0x100000 == 2) ? 0x38 : 0xb8); 496 } else { 497 WSeq(ba, SEQ_ID_DRAM_CNTL, 0xb0); 498 } 499 WSeq(ba, SEQ_ID_RESET, 0x03); 500 WSeq(ba, SEQ_ID_MAP_MASK, 0xff); 501 WSeq(ba, SEQ_ID_CHAR_MAP_SELECT, 0x00); 502 WSeq(ba, SEQ_ID_MEMORY_MODE, 0x0e); /* a or 6? */ 503 WSeq(ba, SEQ_ID_EXT_SEQ_MODE, (cltype == PICASSO) ? 0x21 : 0x81); 504 WSeq(ba, SEQ_ID_EEPROM_CNTL, 0x00); 505 if (cl_64bit == 1) 506 WSeq(ba, SEQ_ID_PERF_TUNE, 0x5a); 507 else 508 WSeq(ba, SEQ_ID_PERF_TUNE, 0x0a); /* mouse 0a fa */ 509 WSeq(ba, SEQ_ID_SIG_CNTL, 0x02); 510 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x04); 511 512 if (cl_64bit == 1) 513 WSeq(ba, SEQ_ID_MCLK_SELECT, 0x1c); 514 else 515 WSeq(ba, SEQ_ID_MCLK_SELECT, 0x22); 516 517 WCrt(ba, CRT_ID_PRESET_ROW_SCAN, 0x00); 518 WCrt(ba, CRT_ID_CURSOR_START, 0x00); 519 WCrt(ba, CRT_ID_CURSOR_END, 0x08); 520 WCrt(ba, CRT_ID_START_ADDR_HIGH, 0x00); 521 WCrt(ba, CRT_ID_START_ADDR_LOW, 0x00); 522 WCrt(ba, CRT_ID_CURSOR_LOC_HIGH, 0x00); 523 WCrt(ba, CRT_ID_CURSOR_LOC_LOW, 0x00); 524 525 WCrt(ba, CRT_ID_UNDERLINE_LOC, 0x07); 526 WCrt(ba, CRT_ID_MODE_CONTROL, 0xe3); 527 WCrt(ba, CRT_ID_LINE_COMPARE, 0xff); /* ff */ 528 WCrt(ba, CRT_ID_EXT_DISP_CNTL, 0x22); 529 if (cl_64bit == 1) { 530 WCrt(ba, CRT_ID_SYNC_ADJ_GENLOCK, 0x00); 531 WCrt(ba, CRT_ID_OVERLAY_EXT_CTRL_REG, 0x40); 532 } 533 WSeq(ba, SEQ_ID_CURSOR_STORE, 0x3c); /* mouse 0x00 */ 534 535 WGfx(ba, GCT_ID_SET_RESET, 0x00); 536 WGfx(ba, GCT_ID_ENABLE_SET_RESET, 0x00); 537 WGfx(ba, GCT_ID_DATA_ROTATE, 0x00); 538 WGfx(ba, GCT_ID_READ_MAP_SELECT, 0x00); 539 WGfx(ba, GCT_ID_GRAPHICS_MODE, 0x00); 540 WGfx(ba, GCT_ID_MISC, 0x01); 541 WGfx(ba, GCT_ID_COLOR_XCARE, 0x0f); 542 WGfx(ba, GCT_ID_BITMASK, 0xff); 543 WGfx(ba, GCT_ID_MODE_EXT, 0x28); 544 545 for (x = 0; x < 0x10; x++) 546 WAttr(ba, x, x); 547 WAttr(ba, ACT_ID_ATTR_MODE_CNTL, 0x01); 548 WAttr(ba, ACT_ID_OVERSCAN_COLOR, 0x00); 549 WAttr(ba, ACT_ID_COLOR_PLANE_ENA, 0x0f); 550 WAttr(ba, ACT_ID_HOR_PEL_PANNING, 0x00); 551 WAttr(ba, ACT_ID_COLOR_SELECT, 0x00); 552 WAttr(ba, 0x34, 0x00); 553 554 vgaw(ba, VDAC_MASK, 0xff); 555 vgaw(ba, GREG_MISC_OUTPUT_W, 0xef); 556 557 WGfx(ba, GCT_ID_BLT_STAT_START, 0x04); 558 WGfx(ba, GCT_ID_BLT_STAT_START, 0x00); 559 } 560 561 /* colors initially set to greyscale */ 562 vgaw(ba, VDAC_ADDRESS_W, 0); 563 for (x = 255; x >= 0; x--) { 564 vgaw(ba, VDAC_DATA, x); 565 vgaw(ba, VDAC_DATA, x); 566 vgaw(ba, VDAC_DATA, x); 567 } 568 /* set sprite bitmap pointers */ 569 cl_cursprite.image = cl_imageptr; 570 cl_cursprite.mask = cl_maskptr; 571 cl_cursprite.cmap.red = cl_sprred; 572 cl_cursprite.cmap.green = cl_sprgreen; 573 cl_cursprite.cmap.blue = cl_sprblue; 574 575 if (cl_64bit == 0) { 576 577 /* check for 1MB or 2MB board (crest) */ 578 volatile unsigned long *cl_fbtestaddr; 579 cl_fbtestaddr = (volatile unsigned long *)gp->g_fbkva; 580 581 WGfx(ba, GCT_ID_OFFSET_0, 0x40); 582 *cl_fbtestaddr = 0x12345678; 583 584 if (*cl_fbtestaddr != 0x12345678) { 585 WSeq(ba, SEQ_ID_DRAM_CNTL, 0x30); 586 cl_fbsize = 0x100000; 587 } 588 else 589 { 590 cl_fbsize = 0x200000; 591 } 592 } 593 WGfx(ba, GCT_ID_OFFSET_0, 0x00); 594 } 595 596 597 int 598 cl_getvmode(gp, vm) 599 struct grf_softc *gp; 600 struct grfvideo_mode *vm; 601 { 602 struct grfvideo_mode *gv; 603 604 #ifdef CL5426CONSOLE 605 /* Handle grabbing console mode */ 606 if (vm->mode_num == 255) { 607 bcopy(&clconsole_mode, vm, sizeof(struct grfvideo_mode)); 608 /* XXX so grfconfig can tell us the correct text dimensions. */ 609 vm->depth = clconsole_mode.fy; 610 } else 611 #endif 612 { 613 if (vm->mode_num == 0) 614 vm->mode_num = (monitor_current - monitor_def) + 1; 615 if (vm->mode_num < 1 || vm->mode_num > monitor_def_max) 616 return (EINVAL); 617 gv = monitor_def + (vm->mode_num - 1); 618 if (gv->mode_num == 0) 619 return (EINVAL); 620 621 bcopy(gv, vm, sizeof(struct grfvideo_mode)); 622 } 623 624 /* adjust internal values to pixel values */ 625 626 vm->hblank_start *= 8; 627 vm->hsync_start *= 8; 628 vm->hsync_stop *= 8; 629 vm->htotal *= 8; 630 631 return (0); 632 } 633 634 635 int 636 cl_setvmode(gp, mode) 637 struct grf_softc *gp; 638 unsigned mode; 639 { 640 if (!mode || (mode > monitor_def_max) || 641 monitor_def[mode - 1].mode_num == 0) 642 return (EINVAL); 643 644 monitor_current = monitor_def + (mode - 1); 645 646 return (0); 647 } 648 649 #ifndef CL5426CONSOLE 650 void 651 cl_off(gp) 652 struct grf_softc *gp; 653 { 654 char *ba = gp->g_regkva; 655 656 /* 657 * we'll put the pass-through on for cc ite and set Full Bandwidth bit 658 * on just in case it didn't work...but then it doesn't matter does 659 * it? =) 660 */ 661 RegOnpass(ba); 662 vgaw(ba, SEQ_ADDRESS, SEQ_ID_CLOCKING_MODE); 663 vgaw(ba, SEQ_ADDRESS_W, vgar(ba, SEQ_ADDRESS_W) | 0x20); 664 } 665 #endif 666 667 int 668 cl_blank(gp, on) 669 struct grf_softc *gp; 670 int *on; 671 { 672 WSeq(gp->g_regkva, SEQ_ID_CLOCKING_MODE, *on > 0 ? 0x01 : 0x21); 673 return(0); 674 } 675 676 /* 677 * Change the mode of the display. 678 * Return a UNIX error number or 0 for success. 679 */ 680 int 681 cl_mode(gp, cmd, arg, a2, a3) 682 register struct grf_softc *gp; 683 u_long cmd; 684 void *arg; 685 u_long a2; 686 int a3; 687 { 688 int error; 689 690 switch (cmd) { 691 case GM_GRFON: 692 error = cl_load_mon(gp, 693 (struct grfcltext_mode *) monitor_current) ? 0 : EINVAL; 694 return (error); 695 696 case GM_GRFOFF: 697 #ifndef CL5426CONSOLE 698 cl_off(gp); 699 #else 700 cl_load_mon(gp, &clconsole_mode); 701 #endif 702 return (0); 703 704 case GM_GRFCONFIG: 705 return (0); 706 707 case GM_GRFGETVMODE: 708 return (cl_getvmode(gp, (struct grfvideo_mode *) arg)); 709 710 case GM_GRFSETVMODE: 711 error = cl_setvmode(gp, *(unsigned *) arg); 712 if (!error && (gp->g_flags & GF_GRFON)) 713 cl_load_mon(gp, 714 (struct grfcltext_mode *) monitor_current); 715 return (error); 716 717 case GM_GRFGETNUMVM: 718 *(int *) arg = monitor_def_max; 719 return (0); 720 721 case GM_GRFIOCTL: 722 return (cl_ioctl(gp, a2, arg)); 723 724 default: 725 break; 726 } 727 728 return (EINVAL); 729 } 730 731 int 732 cl_ioctl(gp, cmd, data) 733 register struct grf_softc *gp; 734 u_long cmd; 735 void *data; 736 { 737 switch (cmd) { 738 case GRFIOCGSPRITEPOS: 739 return (cl_getmousepos(gp, (struct grf_position *) data)); 740 741 case GRFIOCSSPRITEPOS: 742 return (cl_setmousepos(gp, (struct grf_position *) data)); 743 744 case GRFIOCSSPRITEINF: 745 return (cl_setspriteinfo(gp, (struct grf_spriteinfo *) data)); 746 747 case GRFIOCGSPRITEINF: 748 return (cl_getspriteinfo(gp, (struct grf_spriteinfo *) data)); 749 750 case GRFIOCGSPRITEMAX: 751 return (cl_getspritemax(gp, (struct grf_position *) data)); 752 753 case GRFIOCGETCMAP: 754 return (cl_getcmap(gp, (struct grf_colormap *) data)); 755 756 case GRFIOCPUTCMAP: 757 return (cl_putcmap(gp, (struct grf_colormap *) data)); 758 759 case GRFIOCBITBLT: 760 break; 761 762 case GRFTOGGLE: 763 return (cl_toggle(gp, 0)); 764 765 case GRFIOCSETMON: 766 return (cl_setmonitor(gp, (struct grfvideo_mode *) data)); 767 768 case GRFIOCBLANK: 769 return (cl_blank(gp, (int *)data)); 770 771 } 772 return (EINVAL); 773 } 774 775 int 776 cl_getmousepos(gp, data) 777 struct grf_softc *gp; 778 struct grf_position *data; 779 { 780 data->x = cl_cursprite.pos.x; 781 data->y = cl_cursprite.pos.y; 782 return (0); 783 } 784 785 void 786 cl_writesprpos(ba, x, y) 787 volatile char *ba; 788 short x; 789 short y; 790 { 791 /* we want to use a 16-bit write to 3c4 so no macros used */ 792 volatile unsigned char *cwp; 793 volatile unsigned short *wp; 794 795 cwp = ba + 0x3c4; 796 wp = (unsigned short *)cwp; 797 798 /* 799 * don't ask me why, but apparently you can't do a 16-bit write with 800 * x-position like with y-position below (dagge) 801 */ 802 cwp[0] = 0x10 | ((x << 5) & 0xff); 803 cwp[1] = (x >> 3) & 0xff; 804 805 *wp = 0x1100 | ((y & 7) << 13) | ((y >> 3) & 0xff); 806 } 807 808 void 809 writeshifted(to, shiftx, shifty) 810 volatile char *to; 811 char shiftx; 812 char shifty; 813 { 814 int y; 815 unsigned long long *tptr, *iptr, *mptr, line; 816 817 tptr = (unsigned long long *) to; 818 iptr = (unsigned long long *) cl_cursprite.image; 819 mptr = (unsigned long long *) cl_cursprite.mask; 820 821 shiftx = shiftx < 0 ? 0 : shiftx; 822 shifty = shifty < 0 ? 0 : shifty; 823 824 /* start reading shifty lines down, and 825 * shift each line in by shiftx 826 */ 827 for (y = shifty; y < 64; y++) { 828 829 /* image */ 830 line = iptr[y]; 831 *tptr++ = line << shiftx; 832 833 /* mask */ 834 line = mptr[y]; 835 *tptr++ = line << shiftx; 836 } 837 838 /* clear the remainder */ 839 for (y = shifty; y > 0; y--) { 840 *tptr++ = 0; 841 *tptr++ = 0; 842 } 843 } 844 845 int 846 cl_setmousepos(gp, data) 847 struct grf_softc *gp; 848 struct grf_position *data; 849 { 850 volatile char *ba = gp->g_regkva; 851 short rx, ry, prx, pry; 852 #ifdef CL_SHIFTSPRITE 853 volatile char *fb = gp->g_fbkva; 854 volatile char *sprite = fb + (cl_fbsize - 1024); 855 #endif 856 857 /* no movement */ 858 if (cl_cursprite.pos.x == data->x && cl_cursprite.pos.y == data->y) 859 return (0); 860 861 /* current and previous real coordinates */ 862 rx = data->x - cl_cursprite.hot.x; 863 ry = data->y - cl_cursprite.hot.y; 864 prx = cl_cursprite.pos.x - cl_cursprite.hot.x; 865 pry = cl_cursprite.pos.y - cl_cursprite.hot.y; 866 867 /* 868 * if we are/were on an edge, create (un)shifted bitmap -- 869 * ripped out optimization (not extremely worthwhile, 870 * and kind of buggy anyhow). 871 */ 872 #ifdef CL_SHIFTSPRITE 873 if (rx < 0 || ry < 0 || prx < 0 || pry < 0) { 874 writeshifted(sprite, rx < 0 ? -rx : 0, ry < 0 ? -ry : 0); 875 } 876 #endif 877 878 /* do movement, save position */ 879 cl_writesprpos(ba, rx < 0 ? 0 : rx, ry < 0 ? 0 : ry); 880 cl_cursprite.pos.x = data->x; 881 cl_cursprite.pos.y = data->y; 882 883 return (0); 884 } 885 886 int 887 cl_getspriteinfo(gp, data) 888 struct grf_softc *gp; 889 struct grf_spriteinfo *data; 890 { 891 copyout(&cl_cursprite, data, sizeof(struct grf_spriteinfo)); 892 copyout(cl_cursprite.image, data->image, 64 * 8); 893 copyout(cl_cursprite.mask, data->mask, 64 * 8); 894 return (0); 895 } 896 897 static int 898 cl_setspriteinfo(gp, data) 899 struct grf_softc *gp; 900 struct grf_spriteinfo *data; 901 { 902 volatile unsigned char *ba = gp->g_regkva, *fb = gp->g_fbkva; 903 volatile char *sprite = fb + (cl_fbsize - 1024); 904 905 if (data->set & GRFSPRSET_SHAPE) { 906 907 short dsx, dsy, i; 908 unsigned long *di, *dm, *si, *sm; 909 unsigned long ssi[128], ssm[128]; 910 struct grf_position gpos; 911 912 913 /* check for a too large sprite (no clipping!) */ 914 dsy = data->size.y; 915 dsx = data->size.x; 916 if (dsy > 64 || dsx > 64) 917 return(EINVAL); 918 919 /* prepare destination */ 920 di = (unsigned long *)cl_cursprite.image; 921 dm = (unsigned long *)cl_cursprite.mask; 922 cl_memset((unsigned char *)di, 0, 8*64); 923 cl_memset((unsigned char *)dm, 0, 8*64); 924 925 /* two alternatives: 64 across, then it's 926 * the same format we use, just copy. Otherwise, 927 * copy into tmp buf and recopy skipping the 928 * unused 32 bits. 929 */ 930 if ((dsx - 1) / 32) { 931 copyin(data->image, di, 8 * dsy); 932 copyin(data->mask, dm, 8 * dsy); 933 } else { 934 si = ssi; sm = ssm; 935 copyin(data->image, si, 4 * dsy); 936 copyin(data->mask, sm, 4 * dsy); 937 for (i = 0; i < dsy; i++) { 938 *di = *si++; 939 *dm = *sm++; 940 di += 2; 941 dm += 2; 942 } 943 } 944 945 /* set size */ 946 cl_cursprite.size.x = data->size.x; 947 cl_cursprite.size.y = data->size.y; 948 949 /* forcably load into board */ 950 gpos.x = cl_cursprite.pos.x; 951 gpos.y = cl_cursprite.pos.y; 952 cl_cursprite.pos.x = -1; 953 cl_cursprite.pos.y = -1; 954 writeshifted(sprite, 0, 0); 955 cl_setmousepos(gp, &gpos); 956 957 } 958 if (data->set & GRFSPRSET_HOT) { 959 960 cl_cursprite.hot = data->hot; 961 962 } 963 if (data->set & GRFSPRSET_CMAP) { 964 965 u_char red[2], green[2], blue[2]; 966 967 copyin(data->cmap.red, red, 2); 968 copyin(data->cmap.green, green, 2); 969 copyin(data->cmap.blue, blue, 2); 970 bcopy(red, cl_cursprite.cmap.red, 2); 971 bcopy(green, cl_cursprite.cmap.green, 2); 972 bcopy(blue, cl_cursprite.cmap.blue, 2); 973 974 /* enable and load colors 256 & 257 */ 975 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x06); 976 977 /* 256 */ 978 vgaw(ba, VDAC_ADDRESS_W, 0x00); 979 if (cltype == PICASSO) { 980 vgaw(ba, VDAC_DATA, (u_char) (red[0] >> 2)); 981 vgaw(ba, VDAC_DATA, (u_char) (green[0] >> 2)); 982 vgaw(ba, VDAC_DATA, (u_char) (blue[0] >> 2)); 983 } else { 984 vgaw(ba, VDAC_DATA, (u_char) (blue[0] >> 2)); 985 vgaw(ba, VDAC_DATA, (u_char) (green[0] >> 2)); 986 vgaw(ba, VDAC_DATA, (u_char) (red[0] >> 2)); 987 } 988 989 /* 257 */ 990 vgaw(ba, VDAC_ADDRESS_W, 0x0f); 991 if (cltype == PICASSO) { 992 vgaw(ba, VDAC_DATA, (u_char) (red[1] >> 2)); 993 vgaw(ba, VDAC_DATA, (u_char) (green[1] >> 2)); 994 vgaw(ba, VDAC_DATA, (u_char) (blue[1] >> 2)); 995 } else { 996 vgaw(ba, VDAC_DATA, (u_char) (blue[1] >> 2)); 997 vgaw(ba, VDAC_DATA, (u_char) (green[1] >> 2)); 998 vgaw(ba, VDAC_DATA, (u_char) (red[1] >> 2)); 999 } 1000 1001 /* turn on/off sprite */ 1002 if (cl_cursprite.enable) { 1003 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x05); 1004 } else { 1005 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x04); 1006 } 1007 1008 } 1009 if (data->set & GRFSPRSET_ENABLE) { 1010 1011 if (data->enable == 1) { 1012 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x05); 1013 cl_cursprite.enable = 1; 1014 } else { 1015 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x04); 1016 cl_cursprite.enable = 0; 1017 } 1018 1019 } 1020 if (data->set & GRFSPRSET_POS) { 1021 1022 /* force placement */ 1023 cl_cursprite.pos.x = -1; 1024 cl_cursprite.pos.y = -1; 1025 1026 /* do it */ 1027 cl_setmousepos(gp, &data->pos); 1028 1029 } 1030 return (0); 1031 } 1032 1033 static int 1034 cl_getspritemax(gp, data) 1035 struct grf_softc *gp; 1036 struct grf_position *data; 1037 { 1038 if (gp->g_display.gd_planes == 24) 1039 return (EINVAL); 1040 data->x = 64; 1041 data->y = 64; 1042 return (0); 1043 } 1044 1045 int 1046 cl_setmonitor(gp, gv) 1047 struct grf_softc *gp; 1048 struct grfvideo_mode *gv; 1049 { 1050 struct grfvideo_mode *md; 1051 1052 if (!cl_mondefok(gv)) 1053 return(EINVAL); 1054 1055 #ifdef CL5426CONSOLE 1056 /* handle interactive setting of console mode */ 1057 if (gv->mode_num == 255) { 1058 bcopy(gv, &clconsole_mode.gv, sizeof(struct grfvideo_mode)); 1059 clconsole_mode.gv.hblank_start /= 8; 1060 clconsole_mode.gv.hsync_start /= 8; 1061 clconsole_mode.gv.hsync_stop /= 8; 1062 clconsole_mode.gv.htotal /= 8; 1063 clconsole_mode.rows = gv->disp_height / clconsole_mode.fy; 1064 clconsole_mode.cols = gv->disp_width / clconsole_mode.fx; 1065 if (!(gp->g_flags & GF_GRFON)) 1066 cl_load_mon(gp, &clconsole_mode); 1067 ite_reinit(gp->g_itedev); 1068 return (0); 1069 } 1070 #endif 1071 1072 md = monitor_def + (gv->mode_num - 1); 1073 bcopy(gv, md, sizeof(struct grfvideo_mode)); 1074 1075 /* adjust pixel oriented values to internal rep. */ 1076 1077 md->hblank_start /= 8; 1078 md->hsync_start /= 8; 1079 md->hsync_stop /= 8; 1080 md->htotal /= 8; 1081 1082 return (0); 1083 } 1084 1085 int 1086 cl_getcmap(gfp, cmap) 1087 struct grf_softc *gfp; 1088 struct grf_colormap *cmap; 1089 { 1090 volatile unsigned char *ba; 1091 u_char red[256], green[256], blue[256], *rp, *gp, *bp; 1092 short x; 1093 int error; 1094 1095 if (cmap->count == 0 || cmap->index >= 256) 1096 return 0; 1097 1098 if (cmap->index + cmap->count > 256) 1099 cmap->count = 256 - cmap->index; 1100 1101 ba = gfp->g_regkva; 1102 /* first read colors out of the chip, then copyout to userspace */ 1103 vgaw(ba, VDAC_ADDRESS_R, cmap->index); 1104 x = cmap->count - 1; 1105 1106 /* 1107 * Some sort 'o Magic. Spectrum has some changes on the board to speed 1108 * up 15 and 16Bit modes. They can access these modes with easy-to-programm 1109 * rgbrgbrgb instead of rrrgggbbb. Side effect: when in 8Bit mode, rgb 1110 * is swapped to bgr. I wonder if we need to check for 8Bit though, ill 1111 */ 1112 1113 /* 1114 * The source for the above comment is somewhat unknow to me. 1115 * The Spectrum, Piccolo and PiccoloSD64 have the analog Red and Blue 1116 * lines swapped. In 24BPP this provides RGB instead of BGR as it would 1117 * be native to the chipset. This requires special programming for the 1118 * CLUT in 8BPP to compensate and avoid false colors. 1119 * I didn't find any special stuff for 15 and 16BPP though, crest. 1120 */ 1121 1122 switch (cltype) { 1123 case SPECTRUM: 1124 case PICCOLO: 1125 rp = blue + cmap->index; 1126 gp = green + cmap->index; 1127 bp = red + cmap->index; 1128 break; 1129 case PICASSO: 1130 rp = red + cmap->index; 1131 gp = green + cmap->index; 1132 bp = blue + cmap->index; 1133 break; 1134 default: 1135 rp = gp = bp = 0; 1136 break; 1137 } 1138 1139 do { 1140 *rp++ = vgar(ba, VDAC_DATA) << 2; 1141 *gp++ = vgar(ba, VDAC_DATA) << 2; 1142 *bp++ = vgar(ba, VDAC_DATA) << 2; 1143 } while (x-- > 0); 1144 1145 if (!(error = copyout(red + cmap->index, cmap->red, cmap->count)) 1146 && !(error = copyout(green + cmap->index, cmap->green, cmap->count)) 1147 && !(error = copyout(blue + cmap->index, cmap->blue, cmap->count))) 1148 return (0); 1149 1150 return (error); 1151 } 1152 1153 int 1154 cl_putcmap(gfp, cmap) 1155 struct grf_softc *gfp; 1156 struct grf_colormap *cmap; 1157 { 1158 volatile unsigned char *ba; 1159 u_char red[256], green[256], blue[256], *rp, *gp, *bp; 1160 short x; 1161 int error; 1162 1163 if (cmap->count == 0 || cmap->index >= 256) 1164 return (0); 1165 1166 if (cmap->index + cmap->count > 256) 1167 cmap->count = 256 - cmap->index; 1168 1169 /* first copy the colors into kernelspace */ 1170 if (!(error = copyin(cmap->red, red + cmap->index, cmap->count)) 1171 && !(error = copyin(cmap->green, green + cmap->index, cmap->count)) 1172 && !(error = copyin(cmap->blue, blue + cmap->index, cmap->count))) { 1173 ba = gfp->g_regkva; 1174 vgaw(ba, VDAC_ADDRESS_W, cmap->index); 1175 x = cmap->count - 1; 1176 1177 switch (cltype) { 1178 case SPECTRUM: 1179 case PICCOLO: 1180 rp = blue + cmap->index; 1181 gp = green + cmap->index; 1182 bp = red + cmap->index; 1183 break; 1184 case PICASSO: 1185 rp = red + cmap->index; 1186 gp = green + cmap->index; 1187 bp = blue + cmap->index; 1188 break; 1189 default: 1190 rp = gp = bp = 0; 1191 break; 1192 } 1193 1194 do { 1195 vgaw(ba, VDAC_DATA, *rp++ >> 2); 1196 vgaw(ba, VDAC_DATA, *gp++ >> 2); 1197 vgaw(ba, VDAC_DATA, *bp++ >> 2); 1198 } while (x-- > 0); 1199 return (0); 1200 } else 1201 return (error); 1202 } 1203 1204 1205 int 1206 cl_toggle(gp, wopp) 1207 struct grf_softc *gp; 1208 unsigned short wopp; /* don't need that one yet, ill */ 1209 { 1210 volatile caddr_t ba; 1211 1212 ba = gp->g_regkva; 1213 1214 if (pass_toggle) { 1215 RegOffpass(ba); 1216 } else { 1217 RegOnpass(ba); 1218 } 1219 return (0); 1220 } 1221 1222 static void 1223 cl_CompFQ(fq, num, denom, clkdoub) 1224 u_int fq; 1225 u_char *num; 1226 u_char *denom; 1227 u_char *clkdoub; 1228 { 1229 #define OSC 14318180 1230 /* OK, here's what we're doing here: 1231 * 1232 * OSC * NUMERATOR 1233 * VCLK = ------------------- Hz 1234 * DENOMINATOR * (1+P) 1235 * 1236 * so we're given VCLK and we should give out some useful 1237 * values.... 1238 * 1239 * NUMERATOR is 7 bits wide 1240 * DENOMINATOR is 5 bits wide with bit P in the same char as bit 0. 1241 * 1242 * We run through all the possible combinations and 1243 * return the values which deviate the least from the chosen frequency. 1244 * 1245 */ 1246 #define OSC 14318180 1247 #define count(n,d,p) ((OSC * n)/(d * (1+p))) 1248 1249 unsigned char n, d, p, minn, mind, minp = 0; 1250 unsigned long err, minerr; 1251 1252 /* 1253 numer = 0x00 - 0x7f 1254 denom = 0x00 - 0x1f (1) 0x20 - 0x3e (even) 1255 */ 1256 1257 /* find lowest error in 6144 iterations. */ 1258 minerr = fq; 1259 minn = 0; 1260 mind = 0; 1261 p = 0; 1262 1263 if ((cl_64bit == 1) && (fq >= 86000000)) 1264 { 1265 for (d = 1; d < 0x20; d++) { 1266 for (n = 1; n < 0x80; n++) { 1267 err = abs(count(n, d, 0) - fq); 1268 if (err < minerr) { 1269 minerr = err; 1270 minn = n; 1271 mind = d; 1272 minp = 1; 1273 } 1274 } 1275 } 1276 *clkdoub = 1; 1277 } 1278 else { 1279 for (d = 1; d < 0x20; d++) { 1280 for (n = 1; n < 0x80; n++) { 1281 err = abs(count(n, d, p) - fq); 1282 if (err < minerr) { 1283 minerr = err; 1284 minn = n; 1285 mind = d; 1286 minp = p; 1287 } 1288 } 1289 if (d == 0x1f && p == 0) { 1290 p = 1; 1291 d = 0x0f; 1292 } 1293 } 1294 *clkdoub = 0; 1295 } 1296 1297 *num = minn; 1298 *denom = (mind << 1) | minp; 1299 if (minerr > 500000) 1300 printf("Warning: CompFQ minimum error = %ld\n", minerr); 1301 return; 1302 } 1303 1304 int 1305 cl_mondefok(gv) 1306 struct grfvideo_mode *gv; 1307 { 1308 unsigned long maxpix; 1309 1310 if (gv->mode_num < 1 || gv->mode_num > monitor_def_max) 1311 if (gv->mode_num != 255 || gv->depth != 4) 1312 return(0); 1313 1314 switch (gv->depth) { 1315 case 4: 1316 if (gv->mode_num != 255) 1317 return(0); 1318 case 1: 1319 case 8: 1320 maxpix = cl_maxpixelclock; 1321 if (cl_64bit == 1) 1322 { 1323 if (cltype == PICASSO) /* Picasso IV */ 1324 maxpix = 135000000; 1325 else /* Piccolo SD64 */ 1326 maxpix = 110000000; 1327 } 1328 break; 1329 case 15: 1330 case 16: 1331 if (cl_64bit == 1) 1332 maxpix = 85000000; 1333 else 1334 maxpix = cl_maxpixelclock - (cl_maxpixelclock / 3); 1335 break; 1336 case 24: 1337 if ((cltype == PICASSO) && (cl_64bit == 1)) 1338 maxpix = 85000000; 1339 else 1340 maxpix = cl_maxpixelclock / 3; 1341 break; 1342 case 32: 1343 if ((cltype == PICCOLO) && (cl_64bit == 1)) 1344 maxpix = 50000000; 1345 else 1346 maxpix = 0; 1347 break; 1348 default: 1349 printf("grfcl: Illegal depth in mode %d\n", 1350 (int) gv->mode_num); 1351 return (0); 1352 } 1353 1354 if (gv->pixel_clock > maxpix) { 1355 printf("grfcl: Pixelclock too high in mode %d\n", 1356 (int) gv->mode_num); 1357 return (0); 1358 } 1359 1360 if (gv->disp_flags & GRF_FLAGS_SYNC_ON_GREEN) { 1361 printf("grfcl: sync-on-green is not supported\n"); 1362 return (0); 1363 } 1364 1365 return (1); 1366 } 1367 1368 int 1369 cl_load_mon(gp, md) 1370 struct grf_softc *gp; 1371 struct grfcltext_mode *md; 1372 { 1373 struct grfvideo_mode *gv; 1374 struct grfinfo *gi; 1375 volatile caddr_t ba, fb; 1376 unsigned char num0, denom0, clkdoub; 1377 unsigned short HT, HDE, HBS, HBE, HSS, HSE, VDE, VBS, VBE, VSS, 1378 VSE, VT; 1379 int clkmul, offsmul, clkmode; 1380 int vmul; 1381 int sr15; 1382 unsigned char hvsync_pulse; 1383 char TEXT; 1384 1385 /* identity */ 1386 gv = &md->gv; 1387 TEXT = (gv->depth == 4); 1388 1389 if (!cl_mondefok(gv)) { 1390 printf("grfcl: Monitor definition not ok\n"); 1391 return (0); 1392 } 1393 1394 ba = gp->g_regkva; 1395 fb = gp->g_fbkva; 1396 1397 /* provide all needed information in grf device-independant locations */ 1398 gp->g_data = (caddr_t) gv; 1399 gi = &gp->g_display; 1400 gi->gd_regaddr = (caddr_t) kvtop(ba); 1401 gi->gd_regsize = 64 * 1024; 1402 gi->gd_fbaddr = (caddr_t) kvtop(fb); 1403 gi->gd_fbsize = cl_fbsize; 1404 gi->gd_colors = 1 << gv->depth; 1405 gi->gd_planes = gv->depth; 1406 gi->gd_fbwidth = gv->disp_width; 1407 gi->gd_fbheight = gv->disp_height; 1408 gi->gd_fbx = 0; 1409 gi->gd_fby = 0; 1410 if (TEXT) { 1411 gi->gd_dwidth = md->fx * md->cols; 1412 gi->gd_dheight = md->fy * md->rows; 1413 } else { 1414 gi->gd_dwidth = gv->disp_width; 1415 gi->gd_dheight = gv->disp_height; 1416 } 1417 gi->gd_dx = 0; 1418 gi->gd_dy = 0; 1419 1420 /* get display mode parameters */ 1421 1422 HBS = gv->hblank_start; 1423 HSS = gv->hsync_start; 1424 HSE = gv->hsync_stop; 1425 HBE = gv->htotal - 1; 1426 HT = gv->htotal; 1427 VBS = gv->vblank_start; 1428 VSS = gv->vsync_start; 1429 VSE = gv->vsync_stop; 1430 VBE = gv->vtotal - 1; 1431 VT = gv->vtotal; 1432 1433 if (TEXT) 1434 HDE = ((gv->disp_width + md->fx - 1) / md->fx) - 1; 1435 else 1436 HDE = (gv->disp_width + 3) / 8 - 1; /* HBS; */ 1437 VDE = gv->disp_height - 1; 1438 1439 /* adjustments */ 1440 switch (gv->depth) { 1441 case 8: 1442 clkmul = 1; 1443 offsmul = 1; 1444 clkmode = 0x0; 1445 break; 1446 case 15: 1447 case 16: 1448 clkmul = 1; 1449 offsmul = 2; 1450 clkmode = 0x6; 1451 break; 1452 case 24: 1453 if ((cltype == PICASSO) && (cl_64bit == 1)) /* Picasso IV */ 1454 clkmul = 1; 1455 else 1456 clkmul = 3; 1457 offsmul = 3; 1458 clkmode = 0x4; 1459 break; 1460 case 32: 1461 clkmul = 1; 1462 offsmul = 2; 1463 clkmode = 0x8; 1464 break; 1465 default: 1466 clkmul = 1; 1467 offsmul = 1; 1468 clkmode = 0x0; 1469 break; 1470 } 1471 1472 if ((VT > 1023) && (!(gv->disp_flags & GRF_FLAGS_LACE))) { 1473 WCrt(ba, CRT_ID_MODE_CONTROL, 0xe7); 1474 } else 1475 WCrt(ba, CRT_ID_MODE_CONTROL, 0xe3); 1476 1477 vmul = 2; 1478 if ((VT > 1023) || (gv->disp_flags & GRF_FLAGS_LACE)) 1479 vmul = 1; 1480 if (gv->disp_flags & GRF_FLAGS_DBLSCAN) 1481 vmul = 4; 1482 1483 VDE = VDE * vmul / 2; 1484 VBS = VBS * vmul / 2; 1485 VSS = VSS * vmul / 2; 1486 VSE = VSE * vmul / 2; 1487 VBE = VBE * vmul / 2; 1488 VT = VT * vmul / 2; 1489 1490 WSeq(ba, SEQ_ID_MEMORY_MODE, (TEXT || (gv->depth == 1)) ? 0x06 : 0x0e); 1491 if (cl_64bit == 1) { 1492 if (TEXT || (gv->depth == 1)) 1493 sr15 = 0xd0; 1494 else 1495 sr15 = ((cl_fbsize / 0x100000 == 2) ? 0x38 : 0xb8); 1496 WSeq(ba, SEQ_ID_CONF_RBACK, 0x00); 1497 } else { 1498 sr15 = (TEXT || (gv->depth == 1)) ? 0xd0 : 0xb0; 1499 sr15 &= ((cl_fbsize / 0x100000) == 2) ? 0xff : 0x7f; 1500 } 1501 WSeq(ba, SEQ_ID_DRAM_CNTL, sr15); 1502 WGfx(ba, GCT_ID_READ_MAP_SELECT, 0x00); 1503 WSeq(ba, SEQ_ID_MAP_MASK, (gv->depth == 1) ? 0x01 : 0xff); 1504 WSeq(ba, SEQ_ID_CHAR_MAP_SELECT, 0x00); 1505 1506 /* Set clock */ 1507 1508 cl_CompFQ(gv->pixel_clock * clkmul, &num0, &denom0, &clkdoub); 1509 1510 /* Horizontal/Vertical Sync Pulse */ 1511 hvsync_pulse = vgar(ba, GREG_MISC_OUTPUT_R); 1512 if (gv->disp_flags & GRF_FLAGS_PHSYNC) 1513 hvsync_pulse &= ~0x40; 1514 else 1515 hvsync_pulse |= 0x40; 1516 if (gv->disp_flags & GRF_FLAGS_PVSYNC) 1517 hvsync_pulse &= ~0x80; 1518 else 1519 hvsync_pulse |= 0x80; 1520 vgaw(ba, GREG_MISC_OUTPUT_W, hvsync_pulse); 1521 1522 if (clkdoub) { 1523 HDE /= 2; 1524 HBS /= 2; 1525 HSS /= 2; 1526 HSE /= 2; 1527 HBE /= 2; 1528 HT /= 2; 1529 clkmode = 0x6; 1530 } 1531 1532 WSeq(ba, SEQ_ID_VCLK_3_NUM, num0); 1533 WSeq(ba, SEQ_ID_VCLK_3_DENOM, denom0); 1534 1535 /* load display parameters into board */ 1536 1537 WCrt(ba, CRT_ID_HOR_TOTAL, HT); 1538 WCrt(ba, CRT_ID_HOR_DISP_ENA_END, ((HDE >= HBS) ? HBS - 1 : HDE)); 1539 WCrt(ba, CRT_ID_START_HOR_BLANK, HBS); 1540 WCrt(ba, CRT_ID_END_HOR_BLANK, (HBE & 0x1f) | 0x80); /* | 0x80? */ 1541 WCrt(ba, CRT_ID_START_HOR_RETR, HSS); 1542 WCrt(ba, CRT_ID_END_HOR_RETR, 1543 (HSE & 0x1f) | 1544 ((HBE & 0x20) ? 0x80 : 0x00)); 1545 WCrt(ba, CRT_ID_VER_TOTAL, VT); 1546 WCrt(ba, CRT_ID_OVERFLOW, 1547 0x10 | 1548 ((VT & 0x100) ? 0x01 : 0x00) | 1549 ((VDE & 0x100) ? 0x02 : 0x00) | 1550 ((VSS & 0x100) ? 0x04 : 0x00) | 1551 ((VBS & 0x100) ? 0x08 : 0x00) | 1552 ((VT & 0x200) ? 0x20 : 0x00) | 1553 ((VDE & 0x200) ? 0x40 : 0x00) | 1554 ((VSS & 0x200) ? 0x80 : 0x00)); 1555 1556 WCrt(ba, CRT_ID_CHAR_HEIGHT, 1557 0x40 | /* TEXT ? 0x00 ??? */ 1558 ((gv->disp_flags & GRF_FLAGS_DBLSCAN) ? 0x80 : 0x00) | 1559 ((VBS & 0x200) ? 0x20 : 0x00) | 1560 (TEXT ? ((md->fy - 1) & 0x1f) : 0x00)); 1561 1562 /* text cursor */ 1563 1564 if (TEXT) { 1565 #if CL_ULCURSOR 1566 WCrt(ba, CRT_ID_CURSOR_START, (md->fy & 0x1f) - 2); 1567 WCrt(ba, CRT_ID_CURSOR_END, (md->fy & 0x1f) - 1); 1568 #else 1569 WCrt(ba, CRT_ID_CURSOR_START, 0x00); 1570 WCrt(ba, CRT_ID_CURSOR_END, md->fy & 0x1f); 1571 #endif 1572 WCrt(ba, CRT_ID_UNDERLINE_LOC, (md->fy - 1) & 0x1f); 1573 1574 WCrt(ba, CRT_ID_CURSOR_LOC_HIGH, 0x00); 1575 WCrt(ba, CRT_ID_CURSOR_LOC_LOW, 0x00); 1576 } 1577 WCrt(ba, CRT_ID_START_ADDR_HIGH, 0x00); 1578 WCrt(ba, CRT_ID_START_ADDR_LOW, 0x00); 1579 1580 WCrt(ba, CRT_ID_START_VER_RETR, VSS); 1581 WCrt(ba, CRT_ID_END_VER_RETR, (VSE & 0x0f) | 0x20); 1582 WCrt(ba, CRT_ID_VER_DISP_ENA_END, VDE); 1583 WCrt(ba, CRT_ID_START_VER_BLANK, VBS); 1584 WCrt(ba, CRT_ID_END_VER_BLANK, VBE); 1585 1586 WCrt(ba, CRT_ID_LINE_COMPARE, 0xff); 1587 WCrt(ba, CRT_ID_LACE_END, HT / 2); /* MW/16 */ 1588 WCrt(ba, CRT_ID_LACE_CNTL, 1589 ((gv->disp_flags & GRF_FLAGS_LACE) ? 0x01 : 0x00) | 1590 ((HBE & 0x40) ? 0x10 : 0x00) | 1591 ((HBE & 0x80) ? 0x20 : 0x00) | 1592 ((VBE & 0x100) ? 0x40 : 0x00) | 1593 ((VBE & 0x200) ? 0x80 : 0x00)); 1594 1595 WGfx(ba, GCT_ID_GRAPHICS_MODE, 1596 ((TEXT || (gv->depth == 1)) ? 0x00 : 0x40)); 1597 WGfx(ba, GCT_ID_MISC, (TEXT ? 0x04 : 0x01)); 1598 1599 WSeq(ba, SEQ_ID_EXT_SEQ_MODE, 1600 ((TEXT || (gv->depth == 1)) ? 0x00 : 0x01) | 1601 ((cltype == PICASSO) ? 0x20 : 0x80) | clkmode); 1602 1603 /* write 0x00 to VDAC_MASK before accessing HDR this helps 1604 sometimes, out of "secret" application note (crest) */ 1605 vgaw(ba, VDAC_MASK, 0); 1606 /* reset HDR "magic" access counter (crest) */ 1607 vgar(ba, VDAC_ADDRESS); 1608 1609 delay(200000); 1610 vgar(ba, VDAC_MASK); 1611 delay(200000); 1612 vgar(ba, VDAC_MASK); 1613 delay(200000); 1614 vgar(ba, VDAC_MASK); 1615 delay(200000); 1616 vgar(ba, VDAC_MASK); 1617 delay(200000); 1618 switch (gv->depth) { 1619 case 1: 1620 case 4: /* text */ 1621 vgaw(ba, VDAC_MASK, 0); 1622 HDE = gv->disp_width / 16; 1623 break; 1624 case 8: 1625 if (clkdoub) 1626 vgaw(ba, VDAC_MASK, 0x4a); /* Clockdouble Magic */ 1627 else 1628 vgaw(ba, VDAC_MASK, 0); 1629 HDE = gv->disp_width / 8; 1630 break; 1631 case 15: 1632 vgaw(ba, VDAC_MASK, 0xd0); 1633 HDE = gv->disp_width / 4; 1634 break; 1635 case 16: 1636 vgaw(ba, VDAC_MASK, 0xc1); 1637 HDE = gv->disp_width / 4; 1638 break; 1639 case 24: 1640 vgaw(ba, VDAC_MASK, 0xc5); 1641 HDE = (gv->disp_width / 8) * 3; 1642 break; 1643 case 32: 1644 vgaw(ba, VDAC_MASK, 0xc5); 1645 HDE = (gv->disp_width / 4); 1646 break; 1647 } 1648 1649 /* reset HDR "magic" access counter (crest) */ 1650 vgar(ba, VDAC_ADDRESS); 1651 /* then enable all bit in VDAC_MASK afterwards (crest) */ 1652 vgaw(ba, VDAC_MASK, 0xff); 1653 1654 WCrt(ba, CRT_ID_OFFSET, HDE); 1655 if (cl_64bit == 1) { 1656 WCrt(ba, CRT_ID_SYNC_ADJ_GENLOCK, 0x00); 1657 WCrt(ba, CRT_ID_OVERLAY_EXT_CTRL_REG, 0x40); 1658 } 1659 WCrt(ba, CRT_ID_EXT_DISP_CNTL, 1660 ((TEXT && gv->pixel_clock > 29000000) ? 0x40 : 0x00) | 1661 0x22 | 1662 ((HDE > 0xff) ? 0x10 : 0x00)); 1663 1664 WAttr(ba, ACT_ID_ATTR_MODE_CNTL, (TEXT ? 0x0a : 0x01)); 1665 WAttr(ba, 0x20 | ACT_ID_COLOR_PLANE_ENA, 1666 (gv->depth == 1) ? 0x01 : 0x0f); 1667 1668 /* text initialization */ 1669 1670 if (TEXT) { 1671 cl_inittextmode(gp); 1672 } 1673 WSeq(ba, SEQ_ID_CURSOR_ATTR, 0x14); 1674 WSeq(ba, SEQ_ID_CLOCKING_MODE, 0x01); 1675 1676 /* Pass-through */ 1677 1678 RegOffpass(ba); 1679 1680 return (1); 1681 } 1682 1683 void 1684 cl_inittextmode(gp) 1685 struct grf_softc *gp; 1686 { 1687 struct grfcltext_mode *tm = (struct grfcltext_mode *) gp->g_data; 1688 volatile unsigned char *ba = gp->g_regkva; 1689 unsigned char *fb = gp->g_fbkva; 1690 unsigned char *c, *f, y; 1691 unsigned short z; 1692 1693 1694 /* load text font into beginning of display memory. Each character 1695 * cell is 32 bytes long (enough for 4 planes) */ 1696 1697 SetTextPlane(ba, 0x02); 1698 cl_memset(fb, 0, 256 * 32); 1699 c = (unsigned char *) (fb) + (32 * tm->fdstart); 1700 f = tm->fdata; 1701 for (z = tm->fdstart; z <= tm->fdend; z++, c += (32 - tm->fy)) 1702 for (y = 0; y < tm->fy; y++) 1703 *c++ = *f++; 1704 1705 /* clear out text/attr planes (three screens worth) */ 1706 1707 SetTextPlane(ba, 0x01); 1708 cl_memset(fb, 0x07, tm->cols * tm->rows * 3); 1709 SetTextPlane(ba, 0x00); 1710 cl_memset(fb, 0x20, tm->cols * tm->rows * 3); 1711 1712 /* print out a little init msg */ 1713 1714 c = (unsigned char *) (fb) + (tm->cols - 16); 1715 strcpy(c, "CIRRUS"); 1716 c[6] = 0x20; 1717 1718 /* set colors (B&W) */ 1719 1720 vgaw(ba, VDAC_ADDRESS_W, 0); 1721 for (z = 0; z < 256; z++) { 1722 unsigned char r, g, b; 1723 1724 y = (z & 1) ? ((z > 7) ? 2 : 1) : 0; 1725 1726 if (cltype == PICASSO) { 1727 r = clconscolors[y][0]; 1728 g = clconscolors[y][1]; 1729 b = clconscolors[y][2]; 1730 } else { 1731 b = clconscolors[y][0]; 1732 g = clconscolors[y][1]; 1733 r = clconscolors[y][2]; 1734 } 1735 vgaw(ba, VDAC_DATA, r >> 2); 1736 vgaw(ba, VDAC_DATA, g >> 2); 1737 vgaw(ba, VDAC_DATA, b >> 2); 1738 } 1739 } 1740 1741 void 1742 cl_memset(d, c, l) 1743 unsigned char *d; 1744 unsigned char c; 1745 int l; 1746 { 1747 for (; l > 0; l--) 1748 *d++ = c; 1749 } 1750 1751 /* 1752 * Special wakeup/passthrough registers on graphics boards 1753 * 1754 * The methods have diverged a bit for each board, so 1755 * WPass(P) has been converted into a set of specific 1756 * inline functions. 1757 */ 1758 static void 1759 RegWakeup(ba) 1760 volatile caddr_t ba; 1761 { 1762 1763 switch (cltype) { 1764 case SPECTRUM: 1765 vgaw(ba, PASS_ADDRESS_W, 0x1f); 1766 break; 1767 case PICASSO: 1768 /* Picasso needs no wakeup */ 1769 break; 1770 case PICCOLO: 1771 if (cl_64bit == 1) 1772 vgaw(ba, PASS_ADDRESS_W, 0x1f); 1773 else 1774 vgaw(ba, PASS_ADDRESS_W, vgar(ba, PASS_ADDRESS) | 0x10); 1775 break; 1776 } 1777 delay(200000); 1778 } 1779 1780 static void 1781 RegOnpass(ba) 1782 volatile caddr_t ba; 1783 { 1784 1785 switch (cltype) { 1786 case SPECTRUM: 1787 vgaw(ba, PASS_ADDRESS_W, 0x4f); 1788 break; 1789 case PICASSO: 1790 if (cl_64bit == 0) 1791 vgaw(ba, PASS_ADDRESS_WP, 0x01); 1792 break; 1793 case PICCOLO: 1794 if (cl_64bit == 1) 1795 vgaw(ba, PASS_ADDRESS_W, 0x4f); 1796 else 1797 vgaw(ba, PASS_ADDRESS_W, vgar(ba, PASS_ADDRESS) & 0xdf); 1798 break; 1799 } 1800 pass_toggle = 1; 1801 delay(200000); 1802 } 1803 1804 static void 1805 RegOffpass(ba) 1806 volatile caddr_t ba; 1807 { 1808 1809 switch (cltype) { 1810 case SPECTRUM: 1811 vgaw(ba, PASS_ADDRESS_W, 0x6f); 1812 break; 1813 case PICASSO: 1814 if (cl_64bit == 0) 1815 vgaw(ba, PASS_ADDRESS_W, 0xff); 1816 break; 1817 case PICCOLO: 1818 if (cl_64bit == 1) 1819 vgaw(ba, PASS_ADDRESS_W, 0x6f); 1820 else 1821 vgaw(ba, PASS_ADDRESS_W, vgar(ba, PASS_ADDRESS) | 0x20); 1822 break; 1823 } 1824 pass_toggle = 0; 1825 delay(200000); 1826 } 1827 1828 #endif /* NGRFCL */ 1829