xref: /netbsd-src/sys/arch/amd64/include/pmap_private.h (revision b2809c5e007e9832fa5c6bd6975b29b0152fb05d)
1*b2809c5eSriastradh /*	$NetBSD: pmap_private.h,v 1.4 2022/08/21 09:12:43 riastradh Exp $	*/
28f18579dSriastradh 
38f18579dSriastradh /*
48f18579dSriastradh  * Copyright (c) 1997 Charles D. Cranor and Washington University.
58f18579dSriastradh  * All rights reserved.
68f18579dSriastradh  *
78f18579dSriastradh  * Redistribution and use in source and binary forms, with or without
88f18579dSriastradh  * modification, are permitted provided that the following conditions
98f18579dSriastradh  * are met:
108f18579dSriastradh  * 1. Redistributions of source code must retain the above copyright
118f18579dSriastradh  *    notice, this list of conditions and the following disclaimer.
128f18579dSriastradh  * 2. Redistributions in binary form must reproduce the above copyright
138f18579dSriastradh  *    notice, this list of conditions and the following disclaimer in the
148f18579dSriastradh  *    documentation and/or other materials provided with the distribution.
158f18579dSriastradh  *
168f18579dSriastradh  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
178f18579dSriastradh  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
188f18579dSriastradh  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
198f18579dSriastradh  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
208f18579dSriastradh  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
218f18579dSriastradh  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
228f18579dSriastradh  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
238f18579dSriastradh  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
248f18579dSriastradh  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
258f18579dSriastradh  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
268f18579dSriastradh  */
278f18579dSriastradh 
288f18579dSriastradh /*
298f18579dSriastradh  * Copyright (c) 2001 Wasabi Systems, Inc.
308f18579dSriastradh  * All rights reserved.
318f18579dSriastradh  *
328f18579dSriastradh  * Written by Frank van der Linden for Wasabi Systems, Inc.
338f18579dSriastradh  *
348f18579dSriastradh  * Redistribution and use in source and binary forms, with or without
358f18579dSriastradh  * modification, are permitted provided that the following conditions
368f18579dSriastradh  * are met:
378f18579dSriastradh  * 1. Redistributions of source code must retain the above copyright
388f18579dSriastradh  *    notice, this list of conditions and the following disclaimer.
398f18579dSriastradh  * 2. Redistributions in binary form must reproduce the above copyright
408f18579dSriastradh  *    notice, this list of conditions and the following disclaimer in the
418f18579dSriastradh  *    documentation and/or other materials provided with the distribution.
428f18579dSriastradh  * 3. All advertising materials mentioning features or use of this software
438f18579dSriastradh  *    must display the following acknowledgement:
448f18579dSriastradh  *      This product includes software developed for the NetBSD Project by
458f18579dSriastradh  *      Wasabi Systems, Inc.
468f18579dSriastradh  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
478f18579dSriastradh  *    or promote products derived from this software without specific prior
488f18579dSriastradh  *    written permission.
498f18579dSriastradh  *
508f18579dSriastradh  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
518f18579dSriastradh  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
528f18579dSriastradh  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
538f18579dSriastradh  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
548f18579dSriastradh  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
558f18579dSriastradh  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
568f18579dSriastradh  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
578f18579dSriastradh  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
588f18579dSriastradh  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
598f18579dSriastradh  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
608f18579dSriastradh  * POSSIBILITY OF SUCH DAMAGE.
618f18579dSriastradh  */
628f18579dSriastradh 
638f18579dSriastradh #ifndef	_AMD64_PMAP_PRIVATE_H_
648f18579dSriastradh #define	_AMD64_PMAP_PRIVATE_H_
658f18579dSriastradh 
668f18579dSriastradh #ifdef __x86_64__
678f18579dSriastradh 
688f18579dSriastradh #if defined(_KERNEL_OPT)
698f18579dSriastradh #include "opt_xen.h"
708f18579dSriastradh #include "opt_kasan.h"
718f18579dSriastradh #include "opt_kmsan.h"
728f18579dSriastradh #include "opt_kubsan.h"
738f18579dSriastradh #endif
748f18579dSriastradh 
758f18579dSriastradh #include <sys/atomic.h>
768f18579dSriastradh 
778f18579dSriastradh #include <machine/pte.h>
788f18579dSriastradh #include <machine/segments.h>
798f18579dSriastradh #ifdef _KERNEL
808f18579dSriastradh #include <machine/cpufunc.h>
818f18579dSriastradh #endif
828f18579dSriastradh 
838f18579dSriastradh #include <uvm/uvm_object.h>
848f18579dSriastradh #ifdef XENPV
858f18579dSriastradh #include <xen/xenfunc.h>
868f18579dSriastradh #include <xen/xenpmap.h>
878f18579dSriastradh #endif
888f18579dSriastradh 
898f18579dSriastradh #ifdef KASAN
908f18579dSriastradh #define L4_SLOT_KASAN		256
918f18579dSriastradh #define NL4_SLOT_KASAN		32
928f18579dSriastradh #endif
938f18579dSriastradh 
948f18579dSriastradh #ifdef KMSAN
958f18579dSriastradh #define L4_SLOT_KMSAN		256
968f18579dSriastradh #define NL4_SLOT_KMSAN		4
978f18579dSriastradh #endif
988f18579dSriastradh 
998f18579dSriastradh #define NL4_SLOT_DIRECT		32
1008f18579dSriastradh 
1018f18579dSriastradh #ifndef XENPV
1028f18579dSriastradh #define L4_SLOT_PTE		slotspace.area[SLAREA_PTE].sslot
1038f18579dSriastradh #else
1048f18579dSriastradh #define L4_SLOT_PTE		509
1058f18579dSriastradh #endif
1068f18579dSriastradh #define L4_SLOT_KERN		slotspace.area[SLAREA_MAIN].sslot
1078f18579dSriastradh #define L4_SLOT_KERNBASE	511 /* pl4_i(KERNBASE) */
1088f18579dSriastradh 
1098f18579dSriastradh #define PDIR_SLOT_USERLIM	255
1108f18579dSriastradh #define PDIR_SLOT_KERN	L4_SLOT_KERN
1118f18579dSriastradh #define PDIR_SLOT_PTE	L4_SLOT_PTE
1128f18579dSriastradh 
1138f18579dSriastradh /*
1148f18579dSriastradh  * The following defines give the virtual addresses of various MMU
1158f18579dSriastradh  * data structures:
1168f18579dSriastradh  * PTE_BASE: the base VA of the linear PTE mappings
1178f18579dSriastradh  * PDP_BASE: the base VA of the recursive mapping of the PTD
1188f18579dSriastradh  */
1198f18579dSriastradh 
1208f18579dSriastradh #ifndef XENPV
1218f18579dSriastradh extern pt_entry_t *pte_base;
1228f18579dSriastradh #define PTE_BASE	pte_base
1238f18579dSriastradh #else
1248f18579dSriastradh #define PTE_BASE	((pt_entry_t *)VA_SIGN_NEG((L4_SLOT_PTE * NBPD_L4)))
1258f18579dSriastradh #endif
1268f18579dSriastradh 
1278f18579dSriastradh #define L1_BASE	PTE_BASE
1288f18579dSriastradh #define L2_BASE	((pd_entry_t *)((char *)L1_BASE + L4_SLOT_PTE * NBPD_L3))
1298f18579dSriastradh #define L3_BASE	((pd_entry_t *)((char *)L2_BASE + L4_SLOT_PTE * NBPD_L2))
1308f18579dSriastradh #define L4_BASE	((pd_entry_t *)((char *)L3_BASE + L4_SLOT_PTE * NBPD_L1))
1318f18579dSriastradh 
1328f18579dSriastradh #define PDP_BASE	L4_BASE
1338f18579dSriastradh 
1348f18579dSriastradh #if defined(KMSAN)
1358f18579dSriastradh #define NKL4_MAX_ENTRIES	(unsigned long)1	/* 512GB only */
1368f18579dSriastradh #else
1378f18579dSriastradh #define NKL4_MAX_ENTRIES	(unsigned long)64
1388f18579dSriastradh #endif
1398f18579dSriastradh #define NKL3_MAX_ENTRIES	(unsigned long)(NKL4_MAX_ENTRIES * 512)
1408f18579dSriastradh #define NKL2_MAX_ENTRIES	(unsigned long)(NKL3_MAX_ENTRIES * 512)
1418f18579dSriastradh #define NKL1_MAX_ENTRIES	(unsigned long)(NKL2_MAX_ENTRIES * 512)
1428f18579dSriastradh 
1438f18579dSriastradh #define NKL4_KIMG_ENTRIES	1
1448f18579dSriastradh #define NKL3_KIMG_ENTRIES	1
1458f18579dSriastradh #if defined(KUBSAN) || defined(KMSAN)
1468f18579dSriastradh #define NKL2_KIMG_ENTRIES	64	/* really big kernel */
1478f18579dSriastradh #else
1488f18579dSriastradh #define NKL2_KIMG_ENTRIES	48
1498f18579dSriastradh #endif
1508f18579dSriastradh 
1518f18579dSriastradh /*
1528f18579dSriastradh  * Since kva space is below the kernel in its entirety, we start off
1538f18579dSriastradh  * with zero entries on each level.
1548f18579dSriastradh  */
1558f18579dSriastradh #define NKL4_START_ENTRIES	0
1568f18579dSriastradh #define NKL3_START_ENTRIES	0
1578f18579dSriastradh #define NKL2_START_ENTRIES	0
1588f18579dSriastradh #define NKL1_START_ENTRIES	0
1598f18579dSriastradh 
1608f18579dSriastradh #define PTP_MASK_INITIALIZER	{ L1_MASK, L2_MASK, L3_MASK, L4_MASK }
1618f18579dSriastradh #define PTP_FRAME_INITIALIZER	{ L1_FRAME, L2_FRAME, L3_FRAME, L4_FRAME }
1628f18579dSriastradh #define PTP_SHIFT_INITIALIZER	{ L1_SHIFT, L2_SHIFT, L3_SHIFT, L4_SHIFT }
1638f18579dSriastradh #define NKPTP_INITIALIZER	{ NKL1_START_ENTRIES, NKL2_START_ENTRIES, \
1648f18579dSriastradh 				  NKL3_START_ENTRIES, NKL4_START_ENTRIES }
1658f18579dSriastradh #define NKPTPMAX_INITIALIZER	{ NKL1_MAX_ENTRIES, NKL2_MAX_ENTRIES, \
1668f18579dSriastradh 				  NKL3_MAX_ENTRIES, NKL4_MAX_ENTRIES }
1678f18579dSriastradh #define NBPD_INITIALIZER	{ NBPD_L1, NBPD_L2, NBPD_L3, NBPD_L4 }
1688f18579dSriastradh #define PDES_INITIALIZER	{ L2_BASE, L3_BASE, L4_BASE }
1698f18579dSriastradh 
17055d48114Sriastradh #define PTP_LEVELS	4
17155d48114Sriastradh 
1728f18579dSriastradh /*
1738f18579dSriastradh  * PTE_AVL usage: we make use of the ignored bits of the PTE
1748f18579dSriastradh  */
1758f18579dSriastradh #define PTE_WIRED	PTE_AVL1	/* Wired Mapping */
1768f18579dSriastradh #define PTE_PVLIST	PTE_AVL2	/* Mapping has entry on pvlist */
1778f18579dSriastradh #define PTE_X		0		/* Dummy */
1788f18579dSriastradh 
1798f18579dSriastradh /* XXX To be deleted. */
1808f18579dSriastradh #define PG_W		PTE_WIRED
1818f18579dSriastradh #define PG_PVLIST	PTE_PVLIST
1828f18579dSriastradh #define PG_X		PTE_X
1838f18579dSriastradh 
1848f18579dSriastradh void svs_pmap_sync(struct pmap *, int);
1858f18579dSriastradh void svs_ldt_sync(struct pmap *);
1868f18579dSriastradh void svs_lwp_switch(struct lwp *, struct lwp *);
1878f18579dSriastradh void svs_pdir_switch(struct pmap *);
1888f18579dSriastradh void svs_init(void);
1898f18579dSriastradh extern bool svs_enabled;
1908f18579dSriastradh extern bool svs_pcid;
1918f18579dSriastradh 
1928f18579dSriastradh #define	_MACHINE_PMAP_PRIVATE_H_X86
1938f18579dSriastradh #include <x86/pmap_private.h>
1948f18579dSriastradh #undef	_MACHINE_PMAP_PRIVATE_H_X86
1958f18579dSriastradh 
1968f18579dSriastradh #ifndef XENPV
197d7bf4bedSriastradh 
1988f18579dSriastradh #define pmap_pa2pte(a)			(a)
1998f18579dSriastradh #define pmap_pte2pa(a)			((a) & PTE_FRAME)
2008f18579dSriastradh #define pmap_pte_set(p, n)		do { *(p) = (n); } while (0)
2018f18579dSriastradh #define pmap_pte_cas(p, o, n)		atomic_cas_64((p), (o), (n))
2028f18579dSriastradh #define pmap_pte_testset(p, n)		\
2038f18579dSriastradh     atomic_swap_ulong((volatile unsigned long *)p, n)
2048f18579dSriastradh #define pmap_pte_setbits(p, b)		\
2058f18579dSriastradh     atomic_or_ulong((volatile unsigned long *)p, b)
2068f18579dSriastradh #define pmap_pte_clearbits(p, b)	\
2078f18579dSriastradh     atomic_and_ulong((volatile unsigned long *)p, ~(b))
2088f18579dSriastradh #define pmap_pte_flush()		/* nothing */
209d7bf4bedSriastradh 
2108f18579dSriastradh #else
211d7bf4bedSriastradh 
2128f18579dSriastradh extern kmutex_t pte_lock;
2138f18579dSriastradh 
2148f18579dSriastradh static __inline pt_entry_t
pmap_pa2pte(paddr_t pa)2158f18579dSriastradh pmap_pa2pte(paddr_t pa)
2168f18579dSriastradh {
2178f18579dSriastradh 	return (pt_entry_t)xpmap_ptom_masked(pa);
2188f18579dSriastradh }
2198f18579dSriastradh 
2208f18579dSriastradh static __inline paddr_t
pmap_pte2pa(pt_entry_t pte)2218f18579dSriastradh pmap_pte2pa(pt_entry_t pte)
2228f18579dSriastradh {
2238f18579dSriastradh 	return xpmap_mtop_masked(pte & PTE_FRAME);
2248f18579dSriastradh }
2258f18579dSriastradh 
2268f18579dSriastradh static __inline void
pmap_pte_set(pt_entry_t * pte,pt_entry_t npte)2278f18579dSriastradh pmap_pte_set(pt_entry_t *pte, pt_entry_t npte)
2288f18579dSriastradh {
2298f18579dSriastradh 	int s = splvm();
2308f18579dSriastradh 	xpq_queue_pte_update(xpmap_ptetomach(pte), npte);
2318f18579dSriastradh 	splx(s);
2328f18579dSriastradh }
2338f18579dSriastradh 
2348f18579dSriastradh static __inline pt_entry_t
pmap_pte_cas(volatile pt_entry_t * ptep,pt_entry_t o,pt_entry_t n)2358f18579dSriastradh pmap_pte_cas(volatile pt_entry_t *ptep, pt_entry_t o, pt_entry_t n)
2368f18579dSriastradh {
2378f18579dSriastradh 	pt_entry_t opte;
2388f18579dSriastradh 
2398f18579dSriastradh 	mutex_enter(&pte_lock);
2408f18579dSriastradh 	opte = *ptep;
2418f18579dSriastradh 	if (opte == o) {
2428f18579dSriastradh 		xpq_queue_pte_update(xpmap_ptetomach(__UNVOLATILE(ptep)), n);
2438f18579dSriastradh 		xpq_flush_queue();
2448f18579dSriastradh 	}
2458f18579dSriastradh 	mutex_exit(&pte_lock);
2468f18579dSriastradh 	return opte;
2478f18579dSriastradh }
2488f18579dSriastradh 
2498f18579dSriastradh static __inline pt_entry_t
pmap_pte_testset(volatile pt_entry_t * pte,pt_entry_t npte)2508f18579dSriastradh pmap_pte_testset(volatile pt_entry_t *pte, pt_entry_t npte)
2518f18579dSriastradh {
2528f18579dSriastradh 	pt_entry_t opte;
2538f18579dSriastradh 
2548f18579dSriastradh 	mutex_enter(&pte_lock);
2558f18579dSriastradh 	opte = *pte;
2568f18579dSriastradh 	xpq_queue_pte_update(xpmap_ptetomach(__UNVOLATILE(pte)), npte);
2578f18579dSriastradh 	xpq_flush_queue();
2588f18579dSriastradh 	mutex_exit(&pte_lock);
2598f18579dSriastradh 	return opte;
2608f18579dSriastradh }
2618f18579dSriastradh 
2628f18579dSriastradh static __inline void
pmap_pte_setbits(volatile pt_entry_t * pte,pt_entry_t bits)2638f18579dSriastradh pmap_pte_setbits(volatile pt_entry_t *pte, pt_entry_t bits)
2648f18579dSriastradh {
2658f18579dSriastradh 	mutex_enter(&pte_lock);
2668f18579dSriastradh 	xpq_queue_pte_update(xpmap_ptetomach(__UNVOLATILE(pte)), (*pte) | bits);
2678f18579dSriastradh 	xpq_flush_queue();
2688f18579dSriastradh 	mutex_exit(&pte_lock);
2698f18579dSriastradh }
2708f18579dSriastradh 
2718f18579dSriastradh static __inline void
pmap_pte_clearbits(volatile pt_entry_t * pte,pt_entry_t bits)2728f18579dSriastradh pmap_pte_clearbits(volatile pt_entry_t *pte, pt_entry_t bits)
2738f18579dSriastradh {
2748f18579dSriastradh 	mutex_enter(&pte_lock);
2758f18579dSriastradh 	xpq_queue_pte_update(xpmap_ptetomach(__UNVOLATILE(pte)),
2768f18579dSriastradh 	    (*pte) & ~bits);
2778f18579dSriastradh 	xpq_flush_queue();
2788f18579dSriastradh 	mutex_exit(&pte_lock);
2798f18579dSriastradh }
2808f18579dSriastradh 
2818f18579dSriastradh static __inline void
pmap_pte_flush(void)2828f18579dSriastradh pmap_pte_flush(void)
2838f18579dSriastradh {
2848f18579dSriastradh 	int s = splvm();
2858f18579dSriastradh 	xpq_flush_queue();
2868f18579dSriastradh 	splx(s);
2878f18579dSriastradh }
288d7bf4bedSriastradh 
2898f18579dSriastradh #endif
2908f18579dSriastradh 
2918f18579dSriastradh #ifdef __HAVE_DIRECT_MAP
2928f18579dSriastradh #define PMAP_DIRECT
2938f18579dSriastradh 
2948f18579dSriastradh static __inline int
pmap_direct_process(paddr_t pa,voff_t pgoff,size_t len,int (* process)(void *,size_t,void *),void * arg)2958f18579dSriastradh pmap_direct_process(paddr_t pa, voff_t pgoff, size_t len,
2968f18579dSriastradh     int (*process)(void *, size_t, void *), void *arg)
2978f18579dSriastradh {
2988f18579dSriastradh 	vaddr_t va = PMAP_DIRECT_MAP(pa);
2998f18579dSriastradh 
3008f18579dSriastradh 	return process((void *)(va + pgoff), len, arg);
3018f18579dSriastradh }
3028f18579dSriastradh 
3038f18579dSriastradh #endif /* __HAVE_DIRECT_MAP */
3048f18579dSriastradh 
3058f18579dSriastradh void pmap_changeprot_local(vaddr_t, vm_prot_t);
3068f18579dSriastradh 
3078f18579dSriastradh #else	/*	!__x86_64__	*/
3088f18579dSriastradh 
3098f18579dSriastradh #include <i386/pmap_private.h>
3108f18579dSriastradh 
3118f18579dSriastradh #endif	/*	__x86_64__	*/
3128f18579dSriastradh 
3138f18579dSriastradh #endif	/* _AMD64_PMAP_PRIVATE_H_ */
314