xref: /netbsd-src/sys/arch/alpha/include/pte.h (revision eacc5f97c950c6d7d4f75a36e7874d813724ae95)
1*eacc5f97Smatt /* $NetBSD: pte.h,v 1.31 2012/02/06 02:14:13 matt Exp $ */
2900e1c90Sthorpej 
3900e1c90Sthorpej /*-
4900e1c90Sthorpej  * Copyright (c) 1998 The NetBSD Foundation, Inc.
5900e1c90Sthorpej  * All rights reserved.
6900e1c90Sthorpej  *
7900e1c90Sthorpej  * This code is derived from software contributed to The NetBSD Foundation
8900e1c90Sthorpej  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9900e1c90Sthorpej  * NASA Ames Research Center.
10900e1c90Sthorpej  *
11900e1c90Sthorpej  * Redistribution and use in source and binary forms, with or without
12900e1c90Sthorpej  * modification, are permitted provided that the following conditions
13900e1c90Sthorpej  * are met:
14900e1c90Sthorpej  * 1. Redistributions of source code must retain the above copyright
15900e1c90Sthorpej  *    notice, this list of conditions and the following disclaimer.
16900e1c90Sthorpej  * 2. Redistributions in binary form must reproduce the above copyright
17900e1c90Sthorpej  *    notice, this list of conditions and the following disclaimer in the
18900e1c90Sthorpej  *    documentation and/or other materials provided with the distribution.
19900e1c90Sthorpej  *
20900e1c90Sthorpej  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21900e1c90Sthorpej  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22900e1c90Sthorpej  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23900e1c90Sthorpej  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24900e1c90Sthorpej  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25900e1c90Sthorpej  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26900e1c90Sthorpej  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27900e1c90Sthorpej  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28900e1c90Sthorpej  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29900e1c90Sthorpej  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30900e1c90Sthorpej  * POSSIBILITY OF SUCH DAMAGE.
31900e1c90Sthorpej  */
3285854cb4Scgd 
3385854cb4Scgd /*
34db5fd4e8Scgd  * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University.
3585854cb4Scgd  * All rights reserved.
3685854cb4Scgd  *
3785854cb4Scgd  * Author: Chris G. Demetriou
3885854cb4Scgd  *
3985854cb4Scgd  * Permission to use, copy, modify and distribute this software and
4085854cb4Scgd  * its documentation is hereby granted, provided that both the copyright
4185854cb4Scgd  * notice and this permission notice appear in all copies of the
4285854cb4Scgd  * software, derivative works or modified versions, and any portions
4385854cb4Scgd  * thereof, and that both notices appear in supporting documentation.
4485854cb4Scgd  *
4585854cb4Scgd  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
4685854cb4Scgd  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
4785854cb4Scgd  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
4885854cb4Scgd  *
4985854cb4Scgd  * Carnegie Mellon requests users of this software to return to
5085854cb4Scgd  *
5185854cb4Scgd  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
5285854cb4Scgd  *  School of Computer Science
5385854cb4Scgd  *  Carnegie Mellon University
5485854cb4Scgd  *  Pittsburgh PA 15213-3890
5585854cb4Scgd  *
5685854cb4Scgd  * any improvements or extensions that they make and grant Carnegie the
5785854cb4Scgd  * rights to redistribute these changes.
5885854cb4Scgd  */
5985854cb4Scgd 
60f55b280fSthorpej #ifndef _ALPHA_PTE_H_
61f55b280fSthorpej #define	_ALPHA_PTE_H_
62f55b280fSthorpej 
6385854cb4Scgd /*
6485854cb4Scgd  * Alpha page table entry.
6585854cb4Scgd  * Things which are in the VMS PALcode but not in the OSF PALcode
6685854cb4Scgd  * are marked with "(VMS)".
6785854cb4Scgd  *
6885854cb4Scgd  * This information derived from pp. (II) 3-3 - (II) 3-6 and
6985854cb4Scgd  * (III) 3-3 - (III) 3-5 of the "Alpha Architecture Reference Manual" by
7085854cb4Scgd  * Richard L. Sites.
7185854cb4Scgd  */
7285854cb4Scgd 
7385854cb4Scgd /*
7485854cb4Scgd  * Alpha Page Table Entry
7585854cb4Scgd  */
762ba2d62bScgd 
772ba2d62bScgd #include <machine/alpha_cpu.h>
782ba2d62bScgd 
792ba2d62bScgd typedef	alpha_pt_entry_t	pt_entry_t;
802ba2d62bScgd 
8185854cb4Scgd #define	PTESHIFT	3			/* pte size == 1 << PTESHIFT */
8285854cb4Scgd 
832ba2d62bScgd #define	PG_V		ALPHA_PTE_VALID
842ba2d62bScgd #define	PG_NV		0
852ba2d62bScgd #define	PG_FOR		ALPHA_PTE_FAULT_ON_READ
862ba2d62bScgd #define	PG_FOW		ALPHA_PTE_FAULT_ON_WRITE
872ba2d62bScgd #define	PG_FOE		ALPHA_PTE_FAULT_ON_EXECUTE
882ba2d62bScgd #define	PG_ASM		ALPHA_PTE_ASM
892ba2d62bScgd #define	PG_GH		ALPHA_PTE_GRANULARITY
902ba2d62bScgd #define	PG_KRE		ALPHA_PTE_KR
912ba2d62bScgd #define	PG_URE		ALPHA_PTE_UR
922ba2d62bScgd #define	PG_KWE		ALPHA_PTE_KW
932ba2d62bScgd #define	PG_UWE		ALPHA_PTE_UW
94939df36eSchs #define	PG_PROT		(ALPHA_PTE_PROT | PG_EXEC | PG_FOE)
9555207ad8Sthorpej #define	PG_RSVD		0x000000000000cc80	/* Reserved for hardware */
9685854cb4Scgd #define	PG_WIRED	0x0000000000010000	/* Wired. [SOFTWARE] */
97f8cff5abSthorpej #define	PG_PVLIST	0x0000000000020000	/* on pv list [SOFTWARE] */
9855207ad8Sthorpej #define	PG_EXEC		0x0000000000040000	/* execute perms [SOFTWARE] */
99939df36eSchs #define	PG_FRAME	ALPHA_PTE_PFN
10085854cb4Scgd #define	PG_SHIFT	32
1012ba2d62bScgd #define	PG_PFNUM(x)	ALPHA_PTE_TO_PFN(x)
10285854cb4Scgd 
103a8d22137Sthorpej /*
104a8d22137Sthorpej  * These are the PALcode PTE bits that we care about when checking to see
105e468d4c8Sthorpej  * if a PTE has changed in such a way as to require a TBI.
106a8d22137Sthorpej  */
107e468d4c8Sthorpej #define	PG_PALCODE(x)	((x) & ALPHA_PTE_PALCODE)
108a8d22137Sthorpej 
109e6cf334fSthorpej #if defined(_KERNEL) || defined(__KVM_ALPHA_PRIVATE)
11000452b44Sthorpej #define	NPTEPG_SHIFT	(PAGE_SHIFT - PTESHIFT)
111bf8f319dSthorpej #define	NPTEPG		(1L << NPTEPG_SHIFT)
11200452b44Sthorpej 
11385854cb4Scgd #define	PTEMASK		(NPTEPG - 1)
11400452b44Sthorpej 
11500452b44Sthorpej #define	l3pte_index(va)	\
116d5df5511Sthorpej 	(((vaddr_t)(va) >> PAGE_SHIFT) & PTEMASK)
11700452b44Sthorpej 
11800452b44Sthorpej #define	l2pte_index(va)	\
119d5df5511Sthorpej 	(((vaddr_t)(va) >> (PAGE_SHIFT + NPTEPG_SHIFT)) & PTEMASK)
12000452b44Sthorpej 
1217a571c64Sthorpej #define	l1pte_index(va) \
122d5df5511Sthorpej 	(((vaddr_t)(va) >> (PAGE_SHIFT + 2 * NPTEPG_SHIFT)) & PTEMASK)
12345884143Scgd 
12478a173baSthorpej #define	VPT_INDEX(va)	\
125d5df5511Sthorpej 	(((vaddr_t)(va) >> PAGE_SHIFT) & ((1 << 3 * NPTEPG_SHIFT) - 1))
12678a173baSthorpej 
127900e1c90Sthorpej /* Space mapped by one level 1 PTE */
128900e1c90Sthorpej #define	ALPHA_L1SEG_SIZE	(1L << ((2 * NPTEPG_SHIFT) + PAGE_SHIFT))
129900e1c90Sthorpej 
130900e1c90Sthorpej /* Space mapped by one level 2 PTE */
131900e1c90Sthorpej #define	ALPHA_L2SEG_SIZE	(1L << (NPTEPG_SHIFT + PAGE_SHIFT))
132900e1c90Sthorpej 
133900e1c90Sthorpej #define	alpha_trunc_l1seg(x)	(((u_long)(x)) & ~(ALPHA_L1SEG_SIZE-1))
134900e1c90Sthorpej #define	alpha_trunc_l2seg(x)	(((u_long)(x)) & ~(ALPHA_L2SEG_SIZE-1))
135e6cf334fSthorpej #endif /* _KERNEL || __KVM_ALPHA_PRIVATE */
136900e1c90Sthorpej 
137deb4082fScgd #ifdef _KERNEL
138ca819f29Sthorpej extern	pt_entry_t *kernel_lev1map;	/* kernel level 1 page table */
139f55b280fSthorpej #endif /* _KERNEL */
140f55b280fSthorpej 
141f55b280fSthorpej #endif /* ! _ALPHA_PTE_H_ */
142