1*fcdad19eSandvar /* $NetBSD: sfas.c,v 1.31 2023/08/28 18:04:33 andvar Exp $ */
2aad01611Sagc
3aad01611Sagc /*
4aad01611Sagc * Copyright (c) 1990 The Regents of the University of California.
5aad01611Sagc * All rights reserved.
6aad01611Sagc *
7aad01611Sagc * This code is derived from software contributed to Berkeley by
8aad01611Sagc * Van Jacobson of Lawrence Berkeley Laboratory.
9aad01611Sagc *
10aad01611Sagc * Redistribution and use in source and binary forms, with or without
11aad01611Sagc * modification, are permitted provided that the following conditions
12aad01611Sagc * are met:
13aad01611Sagc * 1. Redistributions of source code must retain the above copyright
14aad01611Sagc * notice, this list of conditions and the following disclaimer.
15aad01611Sagc * 2. Redistributions in binary form must reproduce the above copyright
16aad01611Sagc * notice, this list of conditions and the following disclaimer in the
17aad01611Sagc * documentation and/or other materials provided with the distribution.
18aad01611Sagc * 3. Neither the name of the University nor the names of its contributors
19aad01611Sagc * may be used to endorse or promote products derived from this software
20aad01611Sagc * without specific prior written permission.
21aad01611Sagc *
22aad01611Sagc * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
23aad01611Sagc * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24aad01611Sagc * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25aad01611Sagc * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
26aad01611Sagc * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27aad01611Sagc * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28aad01611Sagc * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29aad01611Sagc * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30aad01611Sagc * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31aad01611Sagc * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32aad01611Sagc * SUCH DAMAGE.
33aad01611Sagc *
34aad01611Sagc * @(#)scsi.c 7.5 (Berkeley) 5/4/91
35aad01611Sagc */
367d4a1addSreinoud
377d4a1addSreinoud /*
387d4a1addSreinoud * Copyright (c) 1995 Scott Stevens
397d4a1addSreinoud * Copyright (c) 1995 Daniel Widenfalk
407d4a1addSreinoud * Copyright (c) 1994 Christian E. Hopps
417d4a1addSreinoud *
427d4a1addSreinoud * This code is derived from software contributed to Berkeley by
437d4a1addSreinoud * Van Jacobson of Lawrence Berkeley Laboratory.
447d4a1addSreinoud *
457d4a1addSreinoud * Redistribution and use in source and binary forms, with or without
467d4a1addSreinoud * modification, are permitted provided that the following conditions
477d4a1addSreinoud * are met:
487d4a1addSreinoud * 1. Redistributions of source code must retain the above copyright
497d4a1addSreinoud * notice, this list of conditions and the following disclaimer.
507d4a1addSreinoud * 2. Redistributions in binary form must reproduce the above copyright
517d4a1addSreinoud * notice, this list of conditions and the following disclaimer in the
527d4a1addSreinoud * documentation and/or other materials provided with the distribution.
537d4a1addSreinoud * 3. All advertising materials mentioning features or use of this software
547d4a1addSreinoud * must display the following acknowledgement:
557d4a1addSreinoud * This product includes software developed by the University of
567d4a1addSreinoud * California, Berkeley and its contributors.
577d4a1addSreinoud * 4. Neither the name of the University nor the names of its contributors
587d4a1addSreinoud * may be used to endorse or promote products derived from this software
597d4a1addSreinoud * without specific prior written permission.
607d4a1addSreinoud *
617d4a1addSreinoud * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
627d4a1addSreinoud * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
637d4a1addSreinoud * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
647d4a1addSreinoud * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
657d4a1addSreinoud * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
667d4a1addSreinoud * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
677d4a1addSreinoud * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
687d4a1addSreinoud * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
697d4a1addSreinoud * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
707d4a1addSreinoud * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
717d4a1addSreinoud * SUCH DAMAGE.
727d4a1addSreinoud *
737d4a1addSreinoud * @(#)scsi.c 7.5 (Berkeley) 5/4/91
747d4a1addSreinoud */
757d4a1addSreinoud
767d4a1addSreinoud /*
777d4a1addSreinoud * Emulex FAS216 scsi adaptor driver
787d4a1addSreinoud */
797d4a1addSreinoud
807d4a1addSreinoud /*
817d4a1addSreinoud * Modified for NetBSD/arm32 by Scott Stevens
827d4a1addSreinoud */
837d4a1addSreinoud
841b7326b5Slukem #include <sys/cdefs.h>
85*fcdad19eSandvar __KERNEL_RCSID(0, "$NetBSD: sfas.c,v 1.31 2023/08/28 18:04:33 andvar Exp $");
861b7326b5Slukem
877d4a1addSreinoud #include <sys/param.h>
887d4a1addSreinoud #include <sys/systm.h>
897d4a1addSreinoud #include <sys/device.h>
907d4a1addSreinoud #include <sys/buf.h>
917d4a1addSreinoud #include <sys/proc.h>
927d4a1addSreinoud
937d4a1addSreinoud #include <dev/scsipi/scsi_all.h>
947d4a1addSreinoud #include <dev/scsipi/scsipi_all.h>
957d4a1addSreinoud #include <dev/scsipi/scsiconf.h>
967d4a1addSreinoud
977d4a1addSreinoud #include <uvm/uvm_extern.h>
987d4a1addSreinoud
997d4a1addSreinoud #include <machine/pmap.h>
1007d4a1addSreinoud #include <machine/cpu.h>
1017d4a1addSreinoud #include <machine/io.h>
102ce1401feSthorpej #include <machine/intr.h>
1037d4a1addSreinoud #include <acorn32/podulebus/podulebus.h>
1047d4a1addSreinoud #include <acorn32/podulebus/sfasreg.h>
1057d4a1addSreinoud #include <acorn32/podulebus/sfasvar.h>
1067d4a1addSreinoud
107ecdf1b40Schs void sfas_minphys(struct buf *);
108ecdf1b40Schs void sfas_init_nexus(struct sfas_softc *, struct nexus *);
109ecdf1b40Schs void sfasinitialize(struct sfas_softc *);
110ecdf1b40Schs void sfas_scsi_request(struct scsipi_channel *, scsipi_adapter_req_t, void *);
111ecdf1b40Schs void sfas_donextcmd(struct sfas_softc *, struct sfas_pending *);
112ecdf1b40Schs void sfas_scsidone(struct sfas_softc *, struct scsipi_xfer *, int);
113ecdf1b40Schs void sfasintr(struct sfas_softc *);
114ecdf1b40Schs void sfasiwait(struct sfas_softc *);
115ecdf1b40Schs void sfas_ixfer(void *, int);
116ecdf1b40Schs void sfasreset(struct sfas_softc *, int);
117ecdf1b40Schs int sfasselect(struct sfas_softc *, struct sfas_pending *, unsigned char *,
118ecdf1b40Schs int, unsigned char *, int, int);
119ecdf1b40Schs void sfasicmd(struct sfas_softc *, struct sfas_pending *);
120ecdf1b40Schs void sfasgo(struct sfas_softc *, struct sfas_pending *);
121ecdf1b40Schs void sfas_save_pointers(struct sfas_softc *);
122ecdf1b40Schs void sfas_restore_pointers(struct sfas_softc *);
123ecdf1b40Schs void sfas_build_sdtrm(struct sfas_softc *, int, int);
124ecdf1b40Schs int sfas_select_unit(struct sfas_softc *, short);
125ecdf1b40Schs struct nexus *sfas_arbitate_target(struct sfas_softc *, int);
126ecdf1b40Schs void sfas_setup_nexus(struct sfas_softc *, struct nexus *,
127ecdf1b40Schs struct sfas_pending *, unsigned char *, int,
128ecdf1b40Schs unsigned char *, int, int);
129ecdf1b40Schs int sfas_pretests(struct sfas_softc *, sfas_regmap_p);
130ecdf1b40Schs int sfas_midaction(struct sfas_softc *, sfas_regmap_p, struct nexus *);
131ecdf1b40Schs int sfas_postaction(struct sfas_softc *, sfas_regmap_p, struct nexus *);
1327d4a1addSreinoud
133*fcdad19eSandvar #ifdef SFAS_DEBUG
134*fcdad19eSandvar void dump_nexus(struct nexus *nexus);
135*fcdad19eSandvar void dump_nexii(struct sfas_softc *sc);
136*fcdad19eSandvar void dump_sfassoftc(struct sfas_softc *sc);
137*fcdad19eSandvar #endif
138*fcdad19eSandvar
1397d4a1addSreinoud /*
1407d4a1addSreinoud * Initialize these to make 'em patchable. Defaults to enable sync and discon.
1417d4a1addSreinoud */
1427d4a1addSreinoud u_char sfas_inhibit_sync[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
1437d4a1addSreinoud u_char sfas_inhibit_disc[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
1447d4a1addSreinoud
145b495fe08Suebayasi #undef DEBUG
1467d4a1addSreinoud #define DEBUG
1477d4a1addSreinoud #ifdef DEBUG
1487d4a1addSreinoud #define QPRINTF(a) if (sfas_debug > 1) printf a
1497d4a1addSreinoud int sfas_debug = 2;
1507d4a1addSreinoud #else
1517d4a1addSreinoud #define QPRINTF
1527d4a1addSreinoud #endif
1537d4a1addSreinoud
1547d4a1addSreinoud /*
1557d4a1addSreinoud * default minphys routine for sfas based controllers
1567d4a1addSreinoud */
1577d4a1addSreinoud void
sfas_minphys(struct buf * bp)158454af1c0Sdsl sfas_minphys(struct buf *bp)
1597d4a1addSreinoud {
1607d4a1addSreinoud
1617d4a1addSreinoud /*
1627d4a1addSreinoud * No max transfer at this level.
1637d4a1addSreinoud */
1647d4a1addSreinoud minphys(bp);
1657d4a1addSreinoud }
1667d4a1addSreinoud
1677d4a1addSreinoud /*
1687d4a1addSreinoud * Initialize the nexus structs.
1697d4a1addSreinoud */
1707d4a1addSreinoud void
sfas_init_nexus(struct sfas_softc * dev,struct nexus * nexus)171454af1c0Sdsl sfas_init_nexus(struct sfas_softc *dev, struct nexus *nexus)
1727d4a1addSreinoud {
173c363a9cbScegger memset(nexus, 0, sizeof(struct nexus));
1747d4a1addSreinoud
1757d4a1addSreinoud nexus->state = SFAS_NS_IDLE;
1767d4a1addSreinoud nexus->period = 200;
1777d4a1addSreinoud nexus->offset = 0;
1787d4a1addSreinoud nexus->syncper = 5;
1797d4a1addSreinoud nexus->syncoff = 0;
1807d4a1addSreinoud nexus->config3 = dev->sc_config3 & ~SFAS_CFG3_FASTSCSI;
1817d4a1addSreinoud }
1827d4a1addSreinoud
1837d4a1addSreinoud void
sfasinitialize(struct sfas_softc * dev)184454af1c0Sdsl sfasinitialize(struct sfas_softc *dev)
1857d4a1addSreinoud {
1867d4a1addSreinoud int i;
1877d4a1addSreinoud
1887d4a1addSreinoud dev->sc_led_status = 0;
1897d4a1addSreinoud
1907d4a1addSreinoud TAILQ_INIT(&dev->sc_xs_pending);
1917d4a1addSreinoud TAILQ_INIT(&dev->sc_xs_free);
1927d4a1addSreinoud
1937d4a1addSreinoud /*
1947d4a1addSreinoud * Initialize the sfas_pending structs and link them into the free list. We
1957d4a1addSreinoud * have to set vm_link_data.pages to 0 or the vm FIX won't work.
1967d4a1addSreinoud */
1977d4a1addSreinoud for(i=0; i<MAXPENDING; i++) {
1987d4a1addSreinoud TAILQ_INSERT_TAIL(&dev->sc_xs_free, &dev->sc_xs_store[i],
1997d4a1addSreinoud link);
2007d4a1addSreinoud }
2017d4a1addSreinoud
2027d4a1addSreinoud /*
2037d4a1addSreinoud * Calculate the correct clock conversion factor 2 <= factor <= 8, i.e. set
2047d4a1addSreinoud * the factor to clock_freq / 5 (int).
2057d4a1addSreinoud */
2067d4a1addSreinoud if (dev->sc_clock_freq <= 10)
2077d4a1addSreinoud dev->sc_clock_conv_fact = 2;
2087d4a1addSreinoud if (dev->sc_clock_freq <= 40)
2097d4a1addSreinoud dev->sc_clock_conv_fact = 2+((dev->sc_clock_freq-10)/5);
2107d4a1addSreinoud else
2118324be4cSandvar panic("sfasinitialize: Clock frequency too high");
2127d4a1addSreinoud
2137d4a1addSreinoud /* Setup and save the basic configuration registers */
2147d4a1addSreinoud dev->sc_config1 = (dev->sc_host_id & SFAS_CFG1_BUS_ID_MASK);
2157d4a1addSreinoud dev->sc_config2 = SFAS_CFG2_FEATURES_ENABLE;
2167d4a1addSreinoud dev->sc_config3 = (dev->sc_clock_freq > 25 ? SFAS_CFG3_FASTCLK : 0);
2177d4a1addSreinoud
2187d4a1addSreinoud /* Precalculate timeout value and clock period. */
2197d4a1addSreinoud /* Ekkk ... floating point in the kernel !!!! */
2207d4a1addSreinoud /* dev->sc_timeout_val = 1+dev->sc_timeout*dev->sc_clock_freq/
2217d4a1addSreinoud (7.682*dev->sc_clock_conv_fact);*/
2227d4a1addSreinoud dev->sc_timeout_val = 1+dev->sc_timeout*dev->sc_clock_freq/
2237d4a1addSreinoud ((7682*dev->sc_clock_conv_fact)/1000);
2247d4a1addSreinoud dev->sc_clock_period = 1000/dev->sc_clock_freq;
2257d4a1addSreinoud
2267d4a1addSreinoud sfasreset(dev, 1 | 2); /* Reset Chip and Bus */
2277d4a1addSreinoud
2287d4a1addSreinoud dev->sc_units_disconnected = 0;
2297d4a1addSreinoud dev->sc_msg_in_len = 0;
2307d4a1addSreinoud dev->sc_msg_out_len = 0;
2317d4a1addSreinoud
2327d4a1addSreinoud dev->sc_flags = 0;
2337d4a1addSreinoud
2347d4a1addSreinoud for(i=0; i<8; i++)
2357d4a1addSreinoud sfas_init_nexus(dev, &dev->sc_nexus[i]);
2367d4a1addSreinoud
2377d4a1addSreinoud if (dev->sc_ixfer == NULL)
2387d4a1addSreinoud dev->sc_ixfer = sfas_ixfer;
2397d4a1addSreinoud
2407d4a1addSreinoud /*
2417d4a1addSreinoud * Setup bump buffer.
2427d4a1addSreinoud */
2436b2d8b66Syamt dev->sc_bump_va = (u_char *)uvm_km_alloc(kernel_map, dev->sc_bump_sz, 0,
2446b2d8b66Syamt UVM_KMF_WIRED | UVM_KMF_ZERO);
2457d4a1addSreinoud (void) pmap_extract(pmap_kernel(), (vaddr_t)dev->sc_bump_va,
2467d4a1addSreinoud (paddr_t *)&dev->sc_bump_pa);
2477d4a1addSreinoud
2487d4a1addSreinoud /*
2497d4a1addSreinoud * Setup pages to noncachable, that way we don't have to flush the cache
2507d4a1addSreinoud * every time we need "bumped" transfer.
2517d4a1addSreinoud */
2527469d28fSmatt pt_entry_t * const ptep = vtopte((vaddr_t) dev->sc_bump_va);
2537469d28fSmatt const pt_entry_t opte = *ptep;
2547469d28fSmatt const pt_entry_t npte = opte & ~(L2_C | L2_B);
2557469d28fSmatt l2pte_set(ptep, npte, opte);
2567469d28fSmatt PTE_SYNC(ptep);
2577d4a1addSreinoud cpu_tlb_flushD();
258d3d059aaSmatt cpu_dcache_wbinv_range((vaddr_t)dev->sc_bump_va, PAGE_SIZE);
2597d4a1addSreinoud
2607d4a1addSreinoud printf(" dmabuf V0x%08x P0x%08x", (u_int)dev->sc_bump_va, (u_int)dev->sc_bump_pa);
2617d4a1addSreinoud }
2627d4a1addSreinoud
2637d4a1addSreinoud
2647d4a1addSreinoud /*
2657d4a1addSreinoud * used by specific sfas controller
2667d4a1addSreinoud */
2677d4a1addSreinoud void
sfas_scsi_request(struct scsipi_channel * chan,scsipi_adapter_req_t req,void * arg)2687d4a1addSreinoud sfas_scsi_request(struct scsipi_channel *chan, scsipi_adapter_req_t req,
2697d4a1addSreinoud void *arg)
2707d4a1addSreinoud {
2717d4a1addSreinoud struct scsipi_xfer *xs;
272cbab9cadSchs struct sfas_softc *dev = device_private(chan->chan_adapter->adapt_dev);
2737d4a1addSreinoud struct scsipi_periph *periph;
2747d4a1addSreinoud struct sfas_pending *pendp;
2757d4a1addSreinoud int flags, s, target;
2767d4a1addSreinoud
2777d4a1addSreinoud switch (req) {
2787d4a1addSreinoud case ADAPTER_REQ_RUN_XFER:
2797d4a1addSreinoud xs = arg;
2807d4a1addSreinoud periph = xs->xs_periph;
2817d4a1addSreinoud flags = xs->xs_control;
2827d4a1addSreinoud target = periph->periph_target;
2837d4a1addSreinoud
2847d4a1addSreinoud if (flags & XS_CTL_DATA_UIO)
2857d4a1addSreinoud panic("sfas: scsi data uio requested");
2867d4a1addSreinoud
2877d4a1addSreinoud if ((flags & XS_CTL_POLL) && (dev->sc_flags & SFAS_ACTIVE))
2887d4a1addSreinoud panic("sfas_scsicmd: busy");
2897d4a1addSreinoud
2907d4a1addSreinoud /* Get hold of a sfas_pending block. */
2917d4a1addSreinoud s = splbio();
2927d4a1addSreinoud pendp = dev->sc_xs_free.tqh_first;
2937d4a1addSreinoud if (pendp == NULL) {
2947d4a1addSreinoud xs->error = XS_RESOURCE_SHORTAGE;
2957d4a1addSreinoud scsipi_done(xs);
2967d4a1addSreinoud splx(s);
2977d4a1addSreinoud return;
2987d4a1addSreinoud }
2997d4a1addSreinoud TAILQ_REMOVE(&dev->sc_xs_free, pendp, link);
3007d4a1addSreinoud pendp->xs = xs;
3017d4a1addSreinoud splx(s);
3027d4a1addSreinoud
3037d4a1addSreinoud
3047d4a1addSreinoud /* If the chip if busy OR the unit is busy, we have to wait for out turn. */
3057d4a1addSreinoud if ((dev->sc_flags & SFAS_ACTIVE) ||
3067d4a1addSreinoud (dev->sc_nexus[target].flags & SFAS_NF_UNIT_BUSY)) {
3077d4a1addSreinoud s = splbio();
3087d4a1addSreinoud TAILQ_INSERT_TAIL(&dev->sc_xs_pending, pendp, link);
3097d4a1addSreinoud splx(s);
3107d4a1addSreinoud } else
3117d4a1addSreinoud sfas_donextcmd(dev, pendp);
3127d4a1addSreinoud
3137d4a1addSreinoud return;
3147d4a1addSreinoud
3157d4a1addSreinoud case ADAPTER_REQ_GROW_RESOURCES:
3167d4a1addSreinoud case ADAPTER_REQ_SET_XFER_MODE:
3177d4a1addSreinoud /* XXX Not supported. */
3187d4a1addSreinoud return;
3197d4a1addSreinoud }
3207d4a1addSreinoud }
3217d4a1addSreinoud
3227d4a1addSreinoud /*
3237d4a1addSreinoud * Actually select the unit, whereby the whole scsi-process is started.
3247d4a1addSreinoud */
3257d4a1addSreinoud void
sfas_donextcmd(struct sfas_softc * dev,struct sfas_pending * pendp)326454af1c0Sdsl sfas_donextcmd(struct sfas_softc *dev, struct sfas_pending *pendp)
3277d4a1addSreinoud {
3287d4a1addSreinoud int s;
3297d4a1addSreinoud
3307d4a1addSreinoud /*
3317d4a1addSreinoud * Special case for scsi unit reset. I think this is waterproof. We first
3327d4a1addSreinoud * select the unit during splbio. We then cycle through the generated
3337d4a1addSreinoud * interrupts until the interrupt routine signals that the unit has
3347d4a1addSreinoud * acknowledged the reset. After that we have to wait a reset to select
3358324be4cSandvar * delay before anything else can happen.
3367d4a1addSreinoud */
3377d4a1addSreinoud if (pendp->xs->xs_control & XS_CTL_RESET) {
3387d4a1addSreinoud struct nexus *nexus;
3397d4a1addSreinoud
3407d4a1addSreinoud s = splbio();
3417d4a1addSreinoud while(!sfasselect(dev, pendp, 0, 0, 0, 0, SFAS_SELECT_K)) {
3427d4a1addSreinoud splx(s);
3437d4a1addSreinoud delay(10);
3447d4a1addSreinoud s = splbio();
3457d4a1addSreinoud }
3467d4a1addSreinoud
3477d4a1addSreinoud nexus = dev->sc_cur_nexus;
3487d4a1addSreinoud while(nexus->flags & SFAS_NF_UNIT_BUSY) {
3497d4a1addSreinoud sfasiwait(dev);
3507d4a1addSreinoud sfasintr(dev);
3517d4a1addSreinoud }
3527d4a1addSreinoud
3537d4a1addSreinoud nexus->flags |= SFAS_NF_UNIT_BUSY;
3547d4a1addSreinoud splx(s);
3557d4a1addSreinoud
3567d4a1addSreinoud sfasreset(dev, 0);
3577d4a1addSreinoud
3587d4a1addSreinoud s = splbio();
3597d4a1addSreinoud nexus->flags &= ~SFAS_NF_UNIT_BUSY;
3607d4a1addSreinoud splx(s);
3617d4a1addSreinoud }
3627d4a1addSreinoud
3637d4a1addSreinoud /*
3647d4a1addSreinoud * If we are polling, go to splbio and perform the command, else we poke
3657d4a1addSreinoud * the scsi-bus via sfasgo to get the interrupt machine going.
3667d4a1addSreinoud */
3677d4a1addSreinoud if (pendp->xs->xs_control & XS_CTL_POLL) {
3687d4a1addSreinoud s = splbio();
3697d4a1addSreinoud sfasicmd(dev, pendp);
3707d4a1addSreinoud TAILQ_INSERT_TAIL(&dev->sc_xs_free, pendp, link);
3717d4a1addSreinoud splx(s);
3727d4a1addSreinoud } else {
3737d4a1addSreinoud sfasgo(dev, pendp);
3747d4a1addSreinoud }
3757d4a1addSreinoud }
3767d4a1addSreinoud
3777d4a1addSreinoud void
sfas_scsidone(struct sfas_softc * dev,struct scsipi_xfer * xs,int stat)378454af1c0Sdsl sfas_scsidone(struct sfas_softc *dev, struct scsipi_xfer *xs, int stat)
3797d4a1addSreinoud {
3807d4a1addSreinoud struct sfas_pending *pendp;
3817d4a1addSreinoud int s;
3827d4a1addSreinoud
3837d4a1addSreinoud xs->status = stat;
3847d4a1addSreinoud
3857d4a1addSreinoud if (stat == 0)
3867d4a1addSreinoud xs->resid = 0;
3877d4a1addSreinoud else {
3887d4a1addSreinoud switch(stat) {
3897d4a1addSreinoud case SCSI_CHECK:
3907d4a1addSreinoud case SCSI_BUSY:
3917d4a1addSreinoud xs->error = XS_BUSY;
3927d4a1addSreinoud break;
3937d4a1addSreinoud case -1:
3947d4a1addSreinoud xs->error = XS_DRIVER_STUFFUP;
3957d4a1addSreinoud QPRINTF(("sfas_scsicmd() bad %x\n", stat));
3967d4a1addSreinoud break;
3977d4a1addSreinoud default:
3987d4a1addSreinoud xs->error = XS_TIMEOUT;
3997d4a1addSreinoud break;
4007d4a1addSreinoud }
4017d4a1addSreinoud }
4027d4a1addSreinoud
4037d4a1addSreinoud /* Steal the next command from the queue so that one unit can't hog the bus. */
4047d4a1addSreinoud s = splbio();
4057d4a1addSreinoud pendp = dev->sc_xs_pending.tqh_first;
4067d4a1addSreinoud while(pendp) {
4077d4a1addSreinoud if (!(dev->sc_nexus[pendp->xs->xs_periph->periph_target].flags &
4087d4a1addSreinoud SFAS_NF_UNIT_BUSY))
4097d4a1addSreinoud break;
4107d4a1addSreinoud pendp = pendp->link.tqe_next;
4117d4a1addSreinoud }
4127d4a1addSreinoud
4137d4a1addSreinoud if (pendp != NULL) {
4147d4a1addSreinoud TAILQ_REMOVE(&dev->sc_xs_pending, pendp, link);
4157d4a1addSreinoud }
4167d4a1addSreinoud
4177d4a1addSreinoud splx(s);
4187d4a1addSreinoud scsipi_done(xs);
4197d4a1addSreinoud
4207d4a1addSreinoud if (pendp)
4217d4a1addSreinoud sfas_donextcmd(dev, pendp);
4227d4a1addSreinoud }
4237d4a1addSreinoud
4247d4a1addSreinoud /*
4257d4a1addSreinoud * There are two kinds of reset:
4267d4a1addSreinoud * 1) CHIP-bus reset. This also implies a SCSI-bus reset.
4277d4a1addSreinoud * 2) SCSI-bus reset.
4287d4a1addSreinoud * After the appropriate resets have been performed we wait a reset to select
4297d4a1addSreinoud * delay time.
4307d4a1addSreinoud */
4317d4a1addSreinoud void
sfasreset(struct sfas_softc * dev,int how)432454af1c0Sdsl sfasreset(struct sfas_softc *dev, int how)
4337d4a1addSreinoud {
4347d4a1addSreinoud sfas_regmap_p rp;
4357d4a1addSreinoud int i, s;
4367d4a1addSreinoud
4377d4a1addSreinoud rp = dev->sc_fas;
4387d4a1addSreinoud
4397d4a1addSreinoud if (how & 1) {
4407d4a1addSreinoud for(i=0; i<8; i++)
4417d4a1addSreinoud sfas_init_nexus(dev, &dev->sc_nexus[i]);
4427d4a1addSreinoud
4437d4a1addSreinoud *rp->sfas_command = SFAS_CMD_RESET_CHIP;
4447d4a1addSreinoud delay(1);
4457d4a1addSreinoud *rp->sfas_command = SFAS_CMD_NOP;
4467d4a1addSreinoud
4477d4a1addSreinoud *rp->sfas_config1 = dev->sc_config1;
4487d4a1addSreinoud *rp->sfas_config2 = dev->sc_config2;
4497d4a1addSreinoud *rp->sfas_config3 = dev->sc_config3;
4507d4a1addSreinoud *rp->sfas_timeout = dev->sc_timeout_val;
4517d4a1addSreinoud *rp->sfas_clkconv = dev->sc_clock_conv_fact &
4527d4a1addSreinoud SFAS_CLOCK_CONVERSION_MASK;
4537d4a1addSreinoud }
4547d4a1addSreinoud
4557d4a1addSreinoud if (how & 2) {
4567d4a1addSreinoud for(i=0; i<8; i++)
4577d4a1addSreinoud sfas_init_nexus(dev, &dev->sc_nexus[i]);
4587d4a1addSreinoud
4597d4a1addSreinoud s = splbio();
4607d4a1addSreinoud
4617d4a1addSreinoud *rp->sfas_command = SFAS_CMD_RESET_SCSI_BUS;
4627d4a1addSreinoud delay(100);
4637d4a1addSreinoud
4647d4a1addSreinoud /* Skip interrupt generated by RESET_SCSI_BUS */
4657d4a1addSreinoud while(*rp->sfas_status & SFAS_STAT_INTERRUPT_PENDING) {
4667d4a1addSreinoud dev->sc_status = *rp->sfas_status;
4677d4a1addSreinoud dev->sc_interrupt = *rp->sfas_interrupt;
4687d4a1addSreinoud
4697d4a1addSreinoud delay(100);
4707d4a1addSreinoud }
4717d4a1addSreinoud
4727d4a1addSreinoud dev->sc_status = *rp->sfas_status;
4737d4a1addSreinoud dev->sc_interrupt = *rp->sfas_interrupt;
4747d4a1addSreinoud
4757d4a1addSreinoud splx(s);
4767d4a1addSreinoud }
4777d4a1addSreinoud
4787d4a1addSreinoud if (dev->sc_config_flags & SFAS_SLOW_START)
4797d4a1addSreinoud delay(4*250000); /* RESET to SELECT DELAY*4 for slow devices */
4807d4a1addSreinoud else
4817d4a1addSreinoud delay(250000); /* RESET to SELECT DELAY */
4827d4a1addSreinoud }
4837d4a1addSreinoud
4847d4a1addSreinoud /*
4857d4a1addSreinoud * Save active data pointers to the nexus block currently active.
4867d4a1addSreinoud */
4877d4a1addSreinoud void
sfas_save_pointers(struct sfas_softc * dev)488454af1c0Sdsl sfas_save_pointers(struct sfas_softc *dev)
4897d4a1addSreinoud {
4907d4a1addSreinoud struct nexus *nx;
4917d4a1addSreinoud
4927d4a1addSreinoud nx = dev->sc_cur_nexus;
4937d4a1addSreinoud if (nx) {
4947d4a1addSreinoud nx->cur_link = dev->sc_cur_link;
4957d4a1addSreinoud nx->max_link = dev->sc_max_link;
4967d4a1addSreinoud nx->buf = dev->sc_buf;
4977d4a1addSreinoud nx->len = dev->sc_len;
4987d4a1addSreinoud nx->dma_len = dev->sc_dma_len;
4997d4a1addSreinoud nx->dma_buf = dev->sc_dma_buf;
5007d4a1addSreinoud nx->dma_blk_flg = dev->sc_dma_blk_flg;
5017d4a1addSreinoud nx->dma_blk_len = dev->sc_dma_blk_len;
5027d4a1addSreinoud nx->dma_blk_ptr = dev->sc_dma_blk_ptr;
5037d4a1addSreinoud }
5047d4a1addSreinoud }
5057d4a1addSreinoud
5067d4a1addSreinoud /*
5077d4a1addSreinoud * Restore data pointers from the currently active nexus block.
5087d4a1addSreinoud */
5097d4a1addSreinoud void
sfas_restore_pointers(struct sfas_softc * dev)510454af1c0Sdsl sfas_restore_pointers(struct sfas_softc *dev)
5117d4a1addSreinoud {
5127d4a1addSreinoud struct nexus *nx;
5137d4a1addSreinoud
5147d4a1addSreinoud nx = dev->sc_cur_nexus;
5157d4a1addSreinoud if (nx) {
5167d4a1addSreinoud dev->sc_cur_link = nx->cur_link;
5177d4a1addSreinoud dev->sc_max_link = nx->max_link;
5187d4a1addSreinoud dev->sc_buf = nx->buf;
5197d4a1addSreinoud dev->sc_len = nx->len;
5207d4a1addSreinoud dev->sc_dma_len = nx->dma_len;
5217d4a1addSreinoud dev->sc_dma_buf = nx->dma_buf;
5227d4a1addSreinoud dev->sc_dma_blk_flg = nx->dma_blk_flg;
5237d4a1addSreinoud dev->sc_dma_blk_len = nx->dma_blk_len;
5247d4a1addSreinoud dev->sc_dma_blk_ptr = nx->dma_blk_ptr;
5257d4a1addSreinoud dev->sc_chain = nx->dma;
5267d4a1addSreinoud dev->sc_unit = (nx->lun_unit & 0x0F);
5277d4a1addSreinoud dev->sc_lun = (nx->lun_unit & 0xF0) >> 4;
5287d4a1addSreinoud }
5297d4a1addSreinoud }
5307d4a1addSreinoud
5317d4a1addSreinoud /*
5327d4a1addSreinoud * sfasiwait is used during interrupt and polled IO to wait for an event from
5337d4a1addSreinoud * the FAS chip. This function MUST NOT BE CALLED without interrupt disabled.
5347d4a1addSreinoud */
5357d4a1addSreinoud void
sfasiwait(struct sfas_softc * dev)536454af1c0Sdsl sfasiwait(struct sfas_softc *dev)
5377d4a1addSreinoud {
5387d4a1addSreinoud sfas_regmap_p rp;
5397d4a1addSreinoud
5407d4a1addSreinoud /*
5417d4a1addSreinoud * If SFAS_DONT_WAIT is set, we have already grabbed the interrupt info
5427d4a1addSreinoud * elsewhere. So we don't have to wait for it.
5437d4a1addSreinoud */
5447d4a1addSreinoud if (dev->sc_flags & SFAS_DONT_WAIT) {
5457d4a1addSreinoud dev->sc_flags &= ~SFAS_DONT_WAIT;
5467d4a1addSreinoud return;
5477d4a1addSreinoud }
5487d4a1addSreinoud
5497d4a1addSreinoud rp = dev->sc_fas;
5507d4a1addSreinoud
5517d4a1addSreinoud /* Wait for FAS chip to signal an interrupt. */
5527d4a1addSreinoud while(!(*rp->sfas_status & SFAS_STAT_INTERRUPT_PENDING))
5537d4a1addSreinoud delay(1);
5547d4a1addSreinoud
5557d4a1addSreinoud /* Grab interrupt info from chip. */
5567d4a1addSreinoud dev->sc_status = *rp->sfas_status;
5577d4a1addSreinoud dev->sc_interrupt = *rp->sfas_interrupt;
5587d4a1addSreinoud if (dev->sc_interrupt & SFAS_INT_RESELECTED) {
5597d4a1addSreinoud dev->sc_resel[0] = *rp->sfas_fifo;
5607d4a1addSreinoud dev->sc_resel[1] = *rp->sfas_fifo;
5617d4a1addSreinoud }
5627d4a1addSreinoud }
5637d4a1addSreinoud
5647d4a1addSreinoud /*
5657d4a1addSreinoud * Transfer info to/from device. sfas_ixfer uses polled IO+sfasiwait so the
5667d4a1addSreinoud * rules that apply to sfasiwait also applies here.
5677d4a1addSreinoud */
5687d4a1addSreinoud void
sfas_ixfer(void * v,int polling)569454af1c0Sdsl sfas_ixfer(void *v, int polling)
5707d4a1addSreinoud {
571ecdf1b40Schs struct sfas_softc *dev = v;
5727d4a1addSreinoud sfas_regmap_p rp;
5737d4a1addSreinoud u_char *buf;
5747d4a1addSreinoud int len, mode, phase;
5757d4a1addSreinoud
5767d4a1addSreinoud rp = dev->sc_fas;
5777d4a1addSreinoud buf = dev->sc_buf;
5787d4a1addSreinoud len = dev->sc_len;
5797d4a1addSreinoud
5807d4a1addSreinoud /*
5817d4a1addSreinoud * Decode the scsi phase to determine whether we are reading or writing.
5827d4a1addSreinoud * mode == 1 => READ, mode == 0 => WRITE
5837d4a1addSreinoud */
5847d4a1addSreinoud phase = dev->sc_status & SFAS_STAT_PHASE_MASK;
5857d4a1addSreinoud mode = (phase == SFAS_PHASE_DATA_IN);
5867d4a1addSreinoud
5877d4a1addSreinoud while(len && ((dev->sc_status & SFAS_STAT_PHASE_MASK) == phase))
5887d4a1addSreinoud if (mode) {
5897d4a1addSreinoud *rp->sfas_command = SFAS_CMD_TRANSFER_INFO;
5907d4a1addSreinoud
5917d4a1addSreinoud sfasiwait(dev);
5927d4a1addSreinoud
5937d4a1addSreinoud *buf++ = *rp->sfas_fifo;
5947d4a1addSreinoud len--;
5957d4a1addSreinoud } else {
5967d4a1addSreinoud len--;
5977d4a1addSreinoud *rp->sfas_fifo = *buf++;
5987d4a1addSreinoud *rp->sfas_command = SFAS_CMD_TRANSFER_INFO;
5997d4a1addSreinoud
6007d4a1addSreinoud sfasiwait(dev);
6017d4a1addSreinoud }
6027d4a1addSreinoud
6037d4a1addSreinoud /* Update buffer pointers to reflect the sent/received data. */
6047d4a1addSreinoud dev->sc_buf = buf;
6057d4a1addSreinoud dev->sc_len = len;
6067d4a1addSreinoud
6077d4a1addSreinoud /*
6087d4a1addSreinoud * Since the last sfasiwait will be a phase-change, we can't wait for it
6097d4a1addSreinoud * again later, so we have to signal that.
6107d4a1addSreinoud * Since this may be called from an interrupt initiated routine then we
6117d4a1addSreinoud * must call sfasintr again to avoid losing an interrupt. Phew!
6127d4a1addSreinoud */
6137d4a1addSreinoud if(polling)
6147d4a1addSreinoud dev->sc_flags |= SFAS_DONT_WAIT;
6157d4a1addSreinoud else
6167d4a1addSreinoud sfasintr(dev);
6177d4a1addSreinoud }
6187d4a1addSreinoud
6197d4a1addSreinoud /*
6207d4a1addSreinoud * Build a Synchronous Data Transfer Request message
6217d4a1addSreinoud */
6227d4a1addSreinoud void
sfas_build_sdtrm(struct sfas_softc * dev,int period,int offset)623454af1c0Sdsl sfas_build_sdtrm(struct sfas_softc *dev, int period, int offset)
6247d4a1addSreinoud {
6257d4a1addSreinoud dev->sc_msg_out[0] = 0x01;
6267d4a1addSreinoud dev->sc_msg_out[1] = 0x03;
6277d4a1addSreinoud dev->sc_msg_out[2] = 0x01;
6287d4a1addSreinoud dev->sc_msg_out[3] = period/4;
6297d4a1addSreinoud dev->sc_msg_out[4] = offset;
6307d4a1addSreinoud dev->sc_msg_out_len= 5;
6317d4a1addSreinoud }
6327d4a1addSreinoud
6337d4a1addSreinoud /*
6347d4a1addSreinoud * Arbitate the scsi bus and select the unit
6357d4a1addSreinoud */
6367d4a1addSreinoud int
sfas_select_unit(struct sfas_softc * dev,short target)637454af1c0Sdsl sfas_select_unit(struct sfas_softc *dev, short target)
6387d4a1addSreinoud {
6397d4a1addSreinoud sfas_regmap_p rp;
6407d4a1addSreinoud struct nexus *nexus;
6417d4a1addSreinoud int s, retcode, i;
6427d4a1addSreinoud u_char cmd;
6437d4a1addSreinoud
6447d4a1addSreinoud s = splbio(); /* Do this at splbio so that we won't be disturbed. */
6457d4a1addSreinoud
6467d4a1addSreinoud retcode = 0;
6477d4a1addSreinoud
6487d4a1addSreinoud nexus = &dev->sc_nexus[target];
6497d4a1addSreinoud
6507d4a1addSreinoud /*
6517d4a1addSreinoud * Check if the chip is busy. If not the we mark it as so and hope that nobody
6527d4a1addSreinoud * reselects us until we have grabbed the bus.
6537d4a1addSreinoud */
6547d4a1addSreinoud if (!(dev->sc_flags & SFAS_ACTIVE) && !dev->sc_sel_nexus) {
6557d4a1addSreinoud dev->sc_flags |= SFAS_ACTIVE;
6567d4a1addSreinoud
6577d4a1addSreinoud rp = dev->sc_fas;
6587d4a1addSreinoud
6597d4a1addSreinoud *rp->sfas_syncper = nexus->syncper;
6607d4a1addSreinoud *rp->sfas_syncoff = nexus->syncoff;
6617d4a1addSreinoud *rp->sfas_config3 = nexus->config3;
6627d4a1addSreinoud
6637d4a1addSreinoud *rp->sfas_config1 = dev->sc_config1;
6647d4a1addSreinoud *rp->sfas_timeout = dev->sc_timeout_val;
6657d4a1addSreinoud *rp->sfas_dest_id = target;
6667d4a1addSreinoud
6677d4a1addSreinoud /* If nobody has stolen the bus, we can send a select command to the chip. */
6687d4a1addSreinoud if (!(*rp->sfas_status & SFAS_STAT_INTERRUPT_PENDING)) {
6697d4a1addSreinoud *rp->sfas_fifo = nexus->ID;
6707d4a1addSreinoud if ((nexus->flags & (SFAS_NF_DO_SDTR | SFAS_NF_RESET))
6717d4a1addSreinoud || (dev->sc_msg_out_len != 0))
6727d4a1addSreinoud cmd = SFAS_CMD_SEL_ATN_STOP;
6737d4a1addSreinoud else {
6747d4a1addSreinoud for(i=0; i<nexus->clen; i++)
6757d4a1addSreinoud *rp->sfas_fifo = nexus->cbuf[i];
6767d4a1addSreinoud
6777d4a1addSreinoud cmd = SFAS_CMD_SEL_ATN;
6787d4a1addSreinoud }
6797d4a1addSreinoud
6807d4a1addSreinoud dev->sc_sel_nexus = nexus;
6817d4a1addSreinoud
6827d4a1addSreinoud *rp->sfas_command = cmd;
6837d4a1addSreinoud retcode = 1;
6847d4a1addSreinoud nexus->flags &= ~SFAS_NF_RETRY_SELECT;
6857d4a1addSreinoud } else
6867d4a1addSreinoud nexus->flags |= SFAS_NF_RETRY_SELECT;
6877d4a1addSreinoud } else
6887d4a1addSreinoud nexus->flags |= SFAS_NF_RETRY_SELECT;
6897d4a1addSreinoud
6907d4a1addSreinoud splx(s);
6917d4a1addSreinoud return(retcode);
6927d4a1addSreinoud }
6937d4a1addSreinoud
6947d4a1addSreinoud /*
6957d4a1addSreinoud * Grab the nexus if available else return 0.
6967d4a1addSreinoud */
6977d4a1addSreinoud struct nexus *
sfas_arbitate_target(struct sfas_softc * dev,int target)698454af1c0Sdsl sfas_arbitate_target(struct sfas_softc *dev, int target)
6997d4a1addSreinoud {
7007d4a1addSreinoud struct nexus *nexus;
7017d4a1addSreinoud int s;
7027d4a1addSreinoud
7037d4a1addSreinoud /*
7048324be4cSandvar * This is really simple. Raise interrupt level to splbio. Grab the nexus and
7057d4a1addSreinoud * leave.
7067d4a1addSreinoud */
7077d4a1addSreinoud nexus = &dev->sc_nexus[target];
7087d4a1addSreinoud
7097d4a1addSreinoud s = splbio();
7107d4a1addSreinoud
7117d4a1addSreinoud if (nexus->flags & SFAS_NF_UNIT_BUSY)
7127d4a1addSreinoud nexus = 0;
7137d4a1addSreinoud else
7147d4a1addSreinoud nexus->flags |= SFAS_NF_UNIT_BUSY;
7157d4a1addSreinoud
7167d4a1addSreinoud splx(s);
7177d4a1addSreinoud return(nexus);
7187d4a1addSreinoud }
7197d4a1addSreinoud
7207d4a1addSreinoud /*
7211ffa7b76Swiz * Setup a nexus for use. Initializes command, buffer pointers and DMA chain.
7227d4a1addSreinoud */
7237d4a1addSreinoud void
sfas_setup_nexus(struct sfas_softc * dev,struct nexus * nexus,struct sfas_pending * pendp,unsigned char * cbuf,int clen,unsigned char * buf,int len,int mode)724454af1c0Sdsl sfas_setup_nexus(struct sfas_softc *dev, struct nexus *nexus, struct sfas_pending *pendp, unsigned char *cbuf, int clen, unsigned char *buf, int len, int mode)
7257d4a1addSreinoud {
7267d4a1addSreinoud char sync, target, lun;
7277d4a1addSreinoud
7287d4a1addSreinoud target = pendp->xs->xs_periph->periph_target;
7297d4a1addSreinoud lun = pendp->xs->xs_periph->periph_lun;
7307d4a1addSreinoud
7317d4a1addSreinoud /*
7327d4a1addSreinoud * Adopt mode to reflect the config flags.
7337d4a1addSreinoud * If we can't use DMA we can't use synch transfer. Also check the
7347d4a1addSreinoud * sfas_inhibit_xxx[target] flags.
7357d4a1addSreinoud */
7367d4a1addSreinoud if ((dev->sc_config_flags & (SFAS_NO_SYNCH | SFAS_NO_DMA)) ||
7377d4a1addSreinoud sfas_inhibit_sync[(int)target])
7387d4a1addSreinoud mode &= ~SFAS_SELECT_S;
7397d4a1addSreinoud
7407d4a1addSreinoud if ((dev->sc_config_flags & SFAS_NO_RESELECT) ||
7417d4a1addSreinoud sfas_inhibit_disc[(int)target])
7427d4a1addSreinoud mode &= ~SFAS_SELECT_R;
7437d4a1addSreinoud
7447d4a1addSreinoud nexus->xs = pendp->xs;
7457d4a1addSreinoud
7467d4a1addSreinoud /* Setup the nexus struct. */
7477d4a1addSreinoud nexus->ID = ((mode & SFAS_SELECT_R) ? 0xC0 : 0x80) | lun;
7487d4a1addSreinoud nexus->clen = clen;
749e2cb8590Scegger memcpy(nexus->cbuf, cbuf, nexus->clen);
7507d4a1addSreinoud nexus->cbuf[1] |= lun << 5; /* Fix the lun bits */
7517d4a1addSreinoud nexus->cur_link = 0;
7527d4a1addSreinoud nexus->dma_len = 0;
7537d4a1addSreinoud nexus->dma_buf = 0;
7547d4a1addSreinoud nexus->dma_blk_len = 0;
7557d4a1addSreinoud nexus->dma_blk_ptr = 0;
7567d4a1addSreinoud nexus->len = len;
7577d4a1addSreinoud nexus->buf = buf;
7587d4a1addSreinoud nexus->lun_unit = (lun << 4) | target;
7597d4a1addSreinoud nexus->state = SFAS_NS_SELECTED;
7607d4a1addSreinoud
7617d4a1addSreinoud /* We must keep these flags. All else must be zero. */
7627d4a1addSreinoud nexus->flags &= SFAS_NF_UNIT_BUSY
7637d4a1addSreinoud | SFAS_NF_SYNC_TESTED | SFAS_NF_SELECT_ME;
7647d4a1addSreinoud
7657d4a1addSreinoud if (mode & SFAS_SELECT_I)
7667d4a1addSreinoud nexus->flags |= SFAS_NF_IMMEDIATE;
7677d4a1addSreinoud if (mode & SFAS_SELECT_K)
7687d4a1addSreinoud nexus->flags |= SFAS_NF_RESET;
7697d4a1addSreinoud
7707d4a1addSreinoud sync = ((mode & SFAS_SELECT_S) ? 1 : 0);
7717d4a1addSreinoud
7727d4a1addSreinoud /* We can't use sync during polled IO. */
7737d4a1addSreinoud if (sync && (mode & SFAS_SELECT_I))
7747d4a1addSreinoud sync = 0;
7757d4a1addSreinoud
7767d4a1addSreinoud if (!sync &&
7777d4a1addSreinoud ((nexus->flags & SFAS_NF_SYNC_TESTED) && (nexus->offset != 0))) {
7787d4a1addSreinoud /*
7797d4a1addSreinoud * If the scsi unit is set to synch transfer and we don't want
7807d4a1addSreinoud * that, we have to renegotiate.
7817d4a1addSreinoud */
7827d4a1addSreinoud
7837d4a1addSreinoud nexus->flags |= SFAS_NF_DO_SDTR;
7847d4a1addSreinoud nexus->period = 200;
7857d4a1addSreinoud nexus->offset = 0;
7867d4a1addSreinoud } else if (sync && !(nexus->flags & SFAS_NF_SYNC_TESTED)) {
7877d4a1addSreinoud /*
7887d4a1addSreinoud * If the scsi unit is not set to synch transfer and we want
7898324be4cSandvar * that, we have to negotiate. This should really base the
7908324be4cSandvar * period on the clock frequency rather than just check if
791a1f606d3Slukem * >25 MHz
7927d4a1addSreinoud */
7937d4a1addSreinoud
7947d4a1addSreinoud nexus->flags |= SFAS_NF_DO_SDTR;
7957d4a1addSreinoud nexus->period = ((dev->sc_clock_freq>25) ? 100 : 200);
7967d4a1addSreinoud nexus->offset = 8;
7977d4a1addSreinoud
7987d4a1addSreinoud /* If the user has a long cable, we want to limit the period */
7997d4a1addSreinoud if ((nexus->period == 100) &&
8007d4a1addSreinoud (dev->sc_config_flags & SFAS_SLOW_CABLE))
8017d4a1addSreinoud nexus->period = 200;
8027d4a1addSreinoud }
8037d4a1addSreinoud
8047d4a1addSreinoud /*
8051ffa7b76Swiz * Fake a DMA-block for polled IO. This way we can use the same code to handle
8067d4a1addSreinoud * reselection. Much nicer this way.
8077d4a1addSreinoud */
8087d4a1addSreinoud if ((mode & SFAS_SELECT_I) || (dev->sc_config_flags & SFAS_NO_DMA)) {
809ecdf1b40Schs nexus->dma[0].ptr = buf;
8107d4a1addSreinoud nexus->dma[0].len = len;
8117d4a1addSreinoud nexus->dma[0].flg = SFAS_CHAIN_PRG;
8127d4a1addSreinoud nexus->max_link = 1;
8137d4a1addSreinoud } else {
8147d4a1addSreinoud nexus->max_link = dev->sc_build_dma_chain(dev, nexus->dma,
8157d4a1addSreinoud buf, len);
8167d4a1addSreinoud }
8177d4a1addSreinoud
8187d4a1addSreinoud /* Flush the caches. */
8197d4a1addSreinoud
8207d4a1addSreinoud if (len && !(mode & SFAS_SELECT_I))
821d3d059aaSmatt cpu_dcache_wbinv_range((vaddr_t)buf, len);
8227d4a1addSreinoud }
8237d4a1addSreinoud
8247d4a1addSreinoud int
sfasselect(struct sfas_softc * dev,struct sfas_pending * pendp,unsigned char * cbuf,int clen,unsigned char * buf,int len,int mode)825454af1c0Sdsl sfasselect(struct sfas_softc *dev, struct sfas_pending *pendp, unsigned char *cbuf, int clen, unsigned char *buf, int len, int mode)
8267d4a1addSreinoud {
8277d4a1addSreinoud struct nexus *nexus;
8287d4a1addSreinoud
8297d4a1addSreinoud /* Get the nexus struct. */
8307d4a1addSreinoud nexus = sfas_arbitate_target(dev, pendp->xs->xs_periph->periph_target);
8317d4a1addSreinoud if (nexus == NULL)
8327d4a1addSreinoud return(0);
8337d4a1addSreinoud
8347d4a1addSreinoud /* Setup the nexus struct. */
8357d4a1addSreinoud sfas_setup_nexus(dev, nexus, pendp, cbuf, clen, buf, len, mode);
8367d4a1addSreinoud
8377d4a1addSreinoud /* Post it to the interrupt machine. */
8387d4a1addSreinoud sfas_select_unit(dev, pendp->xs->xs_periph->periph_target);
8397d4a1addSreinoud
8407d4a1addSreinoud return(1);
8417d4a1addSreinoud }
8427d4a1addSreinoud
8437d4a1addSreinoud void
sfasgo(struct sfas_softc * dev,struct sfas_pending * pendp)844454af1c0Sdsl sfasgo(struct sfas_softc *dev, struct sfas_pending *pendp)
8457d4a1addSreinoud {
8467d4a1addSreinoud int s;
8477d4a1addSreinoud char *buf;
8487d4a1addSreinoud
8497d4a1addSreinoud buf = pendp->xs->data;
8507d4a1addSreinoud
8517d4a1addSreinoud if (sfasselect(dev, pendp, (char *)pendp->xs->cmd, pendp->xs->cmdlen,
8527d4a1addSreinoud buf, pendp->xs->datalen, SFAS_SELECT_RS)) {
8537d4a1addSreinoud /*
8547d4a1addSreinoud * We got the command going so the sfas_pending struct is now
8557d4a1addSreinoud * free to reuse.
8567d4a1addSreinoud */
8577d4a1addSreinoud
8587d4a1addSreinoud s = splbio();
8597d4a1addSreinoud TAILQ_INSERT_TAIL(&dev->sc_xs_free, pendp, link);
8607d4a1addSreinoud splx(s);
8617d4a1addSreinoud } else {
8627d4a1addSreinoud /*
8637d4a1addSreinoud * We couldn't make the command fly so we have to wait. The
8647d4a1addSreinoud * struct MUST be inserted at the head to keep the order of
8657d4a1addSreinoud * the commands.
8667d4a1addSreinoud */
8677d4a1addSreinoud
8687d4a1addSreinoud s = splbio();
8697d4a1addSreinoud TAILQ_INSERT_HEAD(&dev->sc_xs_pending, pendp, link);
8707d4a1addSreinoud splx(s);
8717d4a1addSreinoud }
8727d4a1addSreinoud
8737d4a1addSreinoud return;
8747d4a1addSreinoud }
8757d4a1addSreinoud
8767d4a1addSreinoud /*
8777d4a1addSreinoud * Part one of the interrupt machine. Error checks and reselection test.
8787d4a1addSreinoud * We don't know if we have an active nexus here!
8797d4a1addSreinoud */
8807d4a1addSreinoud int
sfas_pretests(struct sfas_softc * dev,sfas_regmap_p rp)881454af1c0Sdsl sfas_pretests(struct sfas_softc *dev, sfas_regmap_p rp)
8827d4a1addSreinoud {
8837d4a1addSreinoud struct nexus *nexus;
8847d4a1addSreinoud int i, s;
8857d4a1addSreinoud
8867d4a1addSreinoud if (dev->sc_interrupt & SFAS_INT_SCSI_RESET_DETECTED) {
8877d4a1addSreinoud /*
8887d4a1addSreinoud * Cleanup and notify user. Lets hope that this is all we
8897d4a1addSreinoud * have to do
8907d4a1addSreinoud */
8917d4a1addSreinoud
8927d4a1addSreinoud for(i=0; i<8; i++) {
8937d4a1addSreinoud if (dev->sc_nexus[i].xs)
8947d4a1addSreinoud sfas_scsidone(dev, dev->sc_nexus[i].xs, -2);
8957d4a1addSreinoud
8967d4a1addSreinoud sfas_init_nexus(dev, &dev->sc_nexus[i]);
8977d4a1addSreinoud }
8987d4a1addSreinoud printf("sfasintr: SCSI-RESET detected!");
8997d4a1addSreinoud return(-1);
9007d4a1addSreinoud }
9017d4a1addSreinoud
9027d4a1addSreinoud if (dev->sc_interrupt & SFAS_INT_ILLEGAL_COMMAND) {
9037d4a1addSreinoud /* Something went terrible wrong! Dump some data and panic! */
9047d4a1addSreinoud
9057d4a1addSreinoud printf("FIFO:");
9067d4a1addSreinoud while(*rp->sfas_fifo_flags & SFAS_FIFO_COUNT_MASK)
9077d4a1addSreinoud printf(" %x", *rp->sfas_fifo);
9087d4a1addSreinoud printf("\n");
9097d4a1addSreinoud
9107d4a1addSreinoud printf("CMD: %x\n", *rp->sfas_command);
9117d4a1addSreinoud panic("sfasintr: ILLEGAL COMMAND!");
9127d4a1addSreinoud }
9137d4a1addSreinoud
9147d4a1addSreinoud if (dev->sc_interrupt & SFAS_INT_RESELECTED) {
9157d4a1addSreinoud /* We were reselected. Set the chip as busy */
9167d4a1addSreinoud
9177d4a1addSreinoud s = splbio();
9187d4a1addSreinoud dev->sc_flags |= SFAS_ACTIVE;
9197d4a1addSreinoud if (dev->sc_sel_nexus) {
9207d4a1addSreinoud dev->sc_sel_nexus->flags |= SFAS_NF_SELECT_ME;
9217d4a1addSreinoud dev->sc_sel_nexus = 0;
9227d4a1addSreinoud }
9237d4a1addSreinoud splx(s);
9247d4a1addSreinoud
9257d4a1addSreinoud if (dev->sc_units_disconnected) {
9267d4a1addSreinoud /* Find out who reselected us. */
9277d4a1addSreinoud
9287d4a1addSreinoud dev->sc_resel[0] &= ~(1<<dev->sc_host_id);
9297d4a1addSreinoud
9307d4a1addSreinoud for(i=0; i<8; i++)
9317d4a1addSreinoud if (dev->sc_resel[0] & (1<<i))
9327d4a1addSreinoud break;
9337d4a1addSreinoud
9347d4a1addSreinoud if (i == 8)
9357d4a1addSreinoud panic("Illegal reselection!");
9367d4a1addSreinoud
9377d4a1addSreinoud if (dev->sc_nexus[i].state == SFAS_NS_DISCONNECTED) {
9387d4a1addSreinoud /*
9397d4a1addSreinoud * This unit had disconnected, so we reconnect
9407d4a1addSreinoud * it.
9417d4a1addSreinoud */
9427d4a1addSreinoud
9437d4a1addSreinoud dev->sc_cur_nexus = &dev->sc_nexus[i];
9447d4a1addSreinoud nexus = dev->sc_cur_nexus;
9457d4a1addSreinoud
9467d4a1addSreinoud *rp->sfas_syncper = nexus->syncper;
9477d4a1addSreinoud *rp->sfas_syncoff = nexus->syncoff;
9487d4a1addSreinoud *rp->sfas_config3 = nexus->config3;
9497d4a1addSreinoud
9507d4a1addSreinoud *rp->sfas_dest_id = i & 7;
9517d4a1addSreinoud
9527d4a1addSreinoud dev->sc_units_disconnected--;
9537d4a1addSreinoud dev->sc_msg_in_len= 0;
9547d4a1addSreinoud
9557d4a1addSreinoud /* Restore active pointers. */
9567d4a1addSreinoud sfas_restore_pointers(dev);
9577d4a1addSreinoud
9587d4a1addSreinoud nexus->state = SFAS_NS_RESELECTED;
9597d4a1addSreinoud
9607d4a1addSreinoud *rp->sfas_command = SFAS_CMD_MESSAGE_ACCEPTED;
9617d4a1addSreinoud
9627d4a1addSreinoud return(1);
9637d4a1addSreinoud }
9647d4a1addSreinoud }
9657d4a1addSreinoud
9667d4a1addSreinoud /* Somehow we got an illegal reselection. Dump and panic. */
9677d4a1addSreinoud printf("sfasintr: resel[0] %x resel[1] %x disconnected %d\n",
9687d4a1addSreinoud dev->sc_resel[0], dev->sc_resel[1],
9697d4a1addSreinoud dev->sc_units_disconnected);
9707d4a1addSreinoud panic("sfasintr: Unexpected reselection!");
9717d4a1addSreinoud }
9727d4a1addSreinoud
9737d4a1addSreinoud return(0);
9747d4a1addSreinoud }
9757d4a1addSreinoud
9767d4a1addSreinoud /*
9777d4a1addSreinoud * Part two of the interrupt machine. Handle disconnection and post command
9787d4a1addSreinoud * processing. We know that we have an active nexus here.
9797d4a1addSreinoud */
9807d4a1addSreinoud int
sfas_midaction(struct sfas_softc * dev,sfas_regmap_p rp,struct nexus * nexus)981454af1c0Sdsl sfas_midaction(struct sfas_softc *dev, sfas_regmap_p rp, struct nexus *nexus)
9827d4a1addSreinoud {
9837d4a1addSreinoud int i, left, len, s;
9847d4a1addSreinoud u_char status, msg;
9857d4a1addSreinoud
9867d4a1addSreinoud if (dev->sc_interrupt & SFAS_INT_DISCONNECT) {
9877d4a1addSreinoud s = splbio();
9887d4a1addSreinoud dev->sc_cur_nexus = 0;
9897d4a1addSreinoud
9907d4a1addSreinoud /* Mark chip as busy and clean up the chip FIFO. */
9917d4a1addSreinoud dev->sc_flags &= ~SFAS_ACTIVE;
9927d4a1addSreinoud *rp->sfas_command = SFAS_CMD_FLUSH_FIFO;
9937d4a1addSreinoud
9947d4a1addSreinoud /* Let the nexus state reflect what we have to do. */
9957d4a1addSreinoud switch(nexus->state) {
9967d4a1addSreinoud case SFAS_NS_SELECTED:
9977d4a1addSreinoud dev->sc_sel_nexus = 0;
9987d4a1addSreinoud nexus->flags &= ~SFAS_NF_SELECT_ME;
9997d4a1addSreinoud
10007d4a1addSreinoud /*
10017d4a1addSreinoud * We were trying to select the unit. Probably no unit
10027d4a1addSreinoud * at this ID.
10037d4a1addSreinoud */
10047d4a1addSreinoud nexus->xs->resid = dev->sc_len;
10057d4a1addSreinoud
10067d4a1addSreinoud nexus->status = -2;
10077d4a1addSreinoud nexus->flags &= ~SFAS_NF_UNIT_BUSY;
10087d4a1addSreinoud nexus->state = SFAS_NS_FINISHED;
10097d4a1addSreinoud break;
10107d4a1addSreinoud
10117d4a1addSreinoud case SFAS_NS_DONE:
10127d4a1addSreinoud /* All done. */
10137d4a1addSreinoud nexus->xs->resid = dev->sc_len;
10147d4a1addSreinoud
10157d4a1addSreinoud nexus->flags &= ~SFAS_NF_UNIT_BUSY;
10167d4a1addSreinoud nexus->state = SFAS_NS_FINISHED;
10177d4a1addSreinoud dev->sc_led(dev, 0);
10187d4a1addSreinoud break;
10197d4a1addSreinoud
10207d4a1addSreinoud case SFAS_NS_DISCONNECTING:
10217d4a1addSreinoud /*
10227d4a1addSreinoud * We have received a DISCONNECT message, so we are
10237d4a1addSreinoud * doing a normal disconnection.
10247d4a1addSreinoud */
10257d4a1addSreinoud nexus->state = SFAS_NS_DISCONNECTED;
10267d4a1addSreinoud
10277d4a1addSreinoud dev->sc_units_disconnected++;
10287d4a1addSreinoud break;
10297d4a1addSreinoud
10307d4a1addSreinoud case SFAS_NS_RESET:
10317d4a1addSreinoud /*
1032984bb2b3Smsaitoh * We were resetting this SCSI-unit. Clean up the
10337d4a1addSreinoud * nexus struct.
10347d4a1addSreinoud */
10357d4a1addSreinoud dev->sc_led(dev, 0);
10367d4a1addSreinoud sfas_init_nexus(dev, nexus);
10377d4a1addSreinoud break;
10387d4a1addSreinoud
10397d4a1addSreinoud default:
10407d4a1addSreinoud /*
10417d4a1addSreinoud * Unexpected disconnection! Cleanup and exit. This
10427d4a1addSreinoud * shouldn't cause any problems.
10437d4a1addSreinoud */
10447d4a1addSreinoud printf("sfasintr: Unexpected disconnection\n");
10457d4a1addSreinoud printf("sfasintr: u %x s %d p %d f %x c %x\n",
10467d4a1addSreinoud nexus->lun_unit, nexus->state,
10477d4a1addSreinoud dev->sc_status & SFAS_STAT_PHASE_MASK,
10487d4a1addSreinoud nexus->flags, nexus->cbuf[0]);
10497d4a1addSreinoud
10507d4a1addSreinoud nexus->xs->resid = dev->sc_len;
10517d4a1addSreinoud
10527d4a1addSreinoud nexus->flags &= ~SFAS_NF_UNIT_BUSY;
10537d4a1addSreinoud nexus->state = SFAS_NS_FINISHED;
10547d4a1addSreinoud nexus->status = -3;
10557d4a1addSreinoud
10567d4a1addSreinoud dev->sc_led(dev, 0);
10577d4a1addSreinoud break;
10587d4a1addSreinoud }
10597d4a1addSreinoud
10607d4a1addSreinoud /*
10617d4a1addSreinoud * If we have disconnected units, we MUST enable reselection
10627d4a1addSreinoud * within 250ms.
10637d4a1addSreinoud */
10647d4a1addSreinoud if (dev->sc_units_disconnected &&
10657d4a1addSreinoud !(dev->sc_flags & SFAS_ACTIVE))
10667d4a1addSreinoud *rp->sfas_command = SFAS_CMD_ENABLE_RESEL;
10677d4a1addSreinoud
10687d4a1addSreinoud splx(s);
10697d4a1addSreinoud
10707d4a1addSreinoud /* Select the first pre-initialized nexus we find. */
10717d4a1addSreinoud for(i=0; i<8; i++)
10727d4a1addSreinoud if (dev->sc_nexus[i].flags & (SFAS_NF_SELECT_ME | SFAS_NF_RETRY_SELECT))
10737d4a1addSreinoud if (sfas_select_unit(dev, i) == 2)
10747d4a1addSreinoud break;
10757d4a1addSreinoud
10767d4a1addSreinoud /* We are done with this nexus! */
10777d4a1addSreinoud if (nexus->state == SFAS_NS_FINISHED)
10787d4a1addSreinoud sfas_scsidone(dev, nexus->xs, nexus->status);
10797d4a1addSreinoud
10807d4a1addSreinoud return(1);
10817d4a1addSreinoud }
10827d4a1addSreinoud
10837d4a1addSreinoud switch(nexus->state) {
10847d4a1addSreinoud case SFAS_NS_SELECTED:
10857d4a1addSreinoud dev->sc_cur_nexus = nexus;
10867d4a1addSreinoud dev->sc_sel_nexus = 0;
10877d4a1addSreinoud
10887d4a1addSreinoud nexus->flags &= ~SFAS_NF_SELECT_ME;
10897d4a1addSreinoud
10907d4a1addSreinoud /*
10917d4a1addSreinoud * We have selected a unit. Setup chip, restore pointers and
10927d4a1addSreinoud * light the led.
10937d4a1addSreinoud */
10947d4a1addSreinoud *rp->sfas_syncper = nexus->syncper;
10957d4a1addSreinoud *rp->sfas_syncoff = nexus->syncoff;
10967d4a1addSreinoud *rp->sfas_config3 = nexus->config3;
10977d4a1addSreinoud
10987d4a1addSreinoud sfas_restore_pointers(dev);
10997d4a1addSreinoud
11007d4a1addSreinoud nexus->status = 0xFF;
11017d4a1addSreinoud dev->sc_msg_in[0] = 0xFF;
11027d4a1addSreinoud dev->sc_msg_in_len= 0;
11037d4a1addSreinoud
11047d4a1addSreinoud dev->sc_led(dev, 1);
11057d4a1addSreinoud
11067d4a1addSreinoud break;
11077d4a1addSreinoud
11087d4a1addSreinoud case SFAS_NS_DATA_IN:
11097d4a1addSreinoud case SFAS_NS_DATA_OUT:
1110a0403cdeSmsaitoh /* We have transferred data. */
11117d4a1addSreinoud if (dev->sc_dma_len)
11127d4a1addSreinoud if (dev->sc_cur_link < dev->sc_max_link) {
11137d4a1addSreinoud /*
11141ffa7b76Swiz * Clean up DMA and at the same time get how
1115a0403cdeSmsaitoh * many bytes that were NOT transferred.
11167d4a1addSreinoud */
11177d4a1addSreinoud left = dev->sc_setup_dma(dev, 0, 0, SFAS_DMA_CLEAR);
11187d4a1addSreinoud len = dev->sc_dma_len;
11197d4a1addSreinoud
11207d4a1addSreinoud if (nexus->state == SFAS_NS_DATA_IN) {
11217d4a1addSreinoud /*
11227d4a1addSreinoud * If we were bumping we may have had an odd length
11237d4a1addSreinoud * which means that there may be bytes left in the
11247d4a1addSreinoud * fifo. We also need to move the data from the
11257d4a1addSreinoud * bump buffer to the actual memory.
11267d4a1addSreinoud */
11277d4a1addSreinoud if (dev->sc_dma_buf == dev->sc_bump_pa)
11287d4a1addSreinoud {
11297d4a1addSreinoud while((*rp->sfas_fifo_flags&SFAS_FIFO_COUNT_MASK)
11307d4a1addSreinoud && left)
11317d4a1addSreinoud dev->sc_bump_va[len-(left--)] = *rp->sfas_fifo;
11327d4a1addSreinoud
1133e2cb8590Scegger memcpy(dev->sc_buf, dev->sc_bump_va, len-left);
11347d4a1addSreinoud }
11357d4a1addSreinoud } else {
11367d4a1addSreinoud /* Count any unsent bytes and flush them. */
11377d4a1addSreinoud left+= *rp->sfas_fifo_flags & SFAS_FIFO_COUNT_MASK;
11387d4a1addSreinoud *rp->sfas_command = SFAS_CMD_FLUSH_FIFO;
11397d4a1addSreinoud }
11407d4a1addSreinoud
11417d4a1addSreinoud /*
1142a0403cdeSmsaitoh * Update pointers/length to reflect the transferred
11437d4a1addSreinoud * data.
11447d4a1addSreinoud */
11457d4a1addSreinoud dev->sc_len -= len-left;
11467d4a1addSreinoud dev->sc_buf += len-left;
11477d4a1addSreinoud
1148ecdf1b40Schs dev->sc_dma_buf = (char *)dev->sc_dma_buf + len-left;
11497d4a1addSreinoud dev->sc_dma_len = left;
11507d4a1addSreinoud
1151ecdf1b40Schs dev->sc_dma_blk_ptr = (char *)dev->sc_dma_blk_ptr +
1152ecdf1b40Schs len-left;
11537d4a1addSreinoud dev->sc_dma_blk_len -= len-left;
11547d4a1addSreinoud
11557d4a1addSreinoud /*
11561ffa7b76Swiz * If it was the end of a DMA block, we select the
11577d4a1addSreinoud * next to begin with.
11587d4a1addSreinoud */
11597d4a1addSreinoud if (!dev->sc_dma_blk_len)
11607d4a1addSreinoud dev->sc_cur_link++;
11617d4a1addSreinoud }
11627d4a1addSreinoud break;
11637d4a1addSreinoud
11647d4a1addSreinoud case SFAS_NS_STATUS:
11657d4a1addSreinoud /*
11667d4a1addSreinoud * If we were not sensing, grab the status byte. If we were
11677d4a1addSreinoud * sensing and we got a bad status, let the user know.
11687d4a1addSreinoud */
11697d4a1addSreinoud
11707d4a1addSreinoud status = *rp->sfas_fifo;
11717d4a1addSreinoud msg = *rp->sfas_fifo;
11727d4a1addSreinoud
11737d4a1addSreinoud nexus->status = status;
11747d4a1addSreinoud if (status != 0)
11757d4a1addSreinoud nexus->status = -1;
11767d4a1addSreinoud
11777d4a1addSreinoud /*
11788324be4cSandvar * Preload the command complete message. Handled in
11797d4a1addSreinoud * sfas_postaction.
11807d4a1addSreinoud */
11817d4a1addSreinoud dev->sc_msg_in[0] = msg;
11827d4a1addSreinoud dev->sc_msg_in_len = 1;
11837d4a1addSreinoud nexus->flags |= SFAS_NF_HAS_MSG;
11847d4a1addSreinoud break;
11857d4a1addSreinoud
11867d4a1addSreinoud default:
11877d4a1addSreinoud break;
11887d4a1addSreinoud }
11897d4a1addSreinoud
11907d4a1addSreinoud return(0);
11917d4a1addSreinoud }
11927d4a1addSreinoud
11937d4a1addSreinoud /*
11947d4a1addSreinoud * Part three of the interrupt machine. Handle phase changes (and repeated
11957d4a1addSreinoud * phase passes). We know that we have an active nexus here.
11967d4a1addSreinoud */
11977d4a1addSreinoud int
sfas_postaction(struct sfas_softc * dev,sfas_regmap_p rp,struct nexus * nexus)1198454af1c0Sdsl sfas_postaction(struct sfas_softc *dev, sfas_regmap_p rp, struct nexus *nexus)
11997d4a1addSreinoud {
12007d4a1addSreinoud int i, len;
12017d4a1addSreinoud u_char cmd;
12027d4a1addSreinoud short offset, period;
12037d4a1addSreinoud
12047d4a1addSreinoud cmd = 0;
12057d4a1addSreinoud
12067d4a1addSreinoud switch(dev->sc_status & SFAS_STAT_PHASE_MASK) {
12077d4a1addSreinoud case SFAS_PHASE_DATA_OUT:
12087d4a1addSreinoud case SFAS_PHASE_DATA_IN:
12097d4a1addSreinoud if ((dev->sc_status & SFAS_STAT_PHASE_MASK) ==
12107d4a1addSreinoud SFAS_PHASE_DATA_OUT)
12117d4a1addSreinoud nexus->state = SFAS_NS_DATA_OUT;
12127d4a1addSreinoud else
12137d4a1addSreinoud nexus->state = SFAS_NS_DATA_IN;
12147d4a1addSreinoud
12157d4a1addSreinoud /* Make DMA ready to accept new data. Load active pointers
12167d4a1addSreinoud * from the DMA block. */
12177d4a1addSreinoud dev->sc_setup_dma(dev, 0, 0, SFAS_DMA_CLEAR);
12187d4a1addSreinoud if (dev->sc_cur_link < dev->sc_max_link) {
12197d4a1addSreinoud if (!dev->sc_dma_blk_len) {
12207d4a1addSreinoud dev->sc_dma_blk_ptr = dev->sc_chain[dev->sc_cur_link].ptr;
12217d4a1addSreinoud dev->sc_dma_blk_len = dev->sc_chain[dev->sc_cur_link].len;
12227d4a1addSreinoud dev->sc_dma_blk_flg = dev->sc_chain[dev->sc_cur_link].flg;
12237d4a1addSreinoud }
12247d4a1addSreinoud
12257d4a1addSreinoud /* We should use polled IO here. */
12267d4a1addSreinoud if (dev->sc_dma_blk_flg == SFAS_CHAIN_PRG) {
12277d4a1addSreinoud dev->sc_ixfer(dev, nexus->xs->xs_control & XS_CTL_POLL);
12287d4a1addSreinoud dev->sc_cur_link++;
12297d4a1addSreinoud dev->sc_dma_len = 0;
12307d4a1addSreinoud break;
12317d4a1addSreinoud }
12327d4a1addSreinoud else if (dev->sc_dma_blk_flg == SFAS_CHAIN_BUMP)
12337d4a1addSreinoud len = dev->sc_dma_blk_len;
12347d4a1addSreinoud else
12357d4a1addSreinoud len = dev->sc_need_bump(dev, dev->sc_dma_blk_ptr,
12367d4a1addSreinoud dev->sc_dma_blk_len);
12377d4a1addSreinoud
12387d4a1addSreinoud /*
12397d4a1addSreinoud * If len != 0 we must bump the data, else we just DMA it
12407d4a1addSreinoud * straight into memory.
12417d4a1addSreinoud */
12427d4a1addSreinoud if (len) {
12437d4a1addSreinoud dev->sc_dma_buf = dev->sc_bump_pa;
12447d4a1addSreinoud dev->sc_dma_len = len;
12457d4a1addSreinoud
12467d4a1addSreinoud if (nexus->state == SFAS_NS_DATA_OUT)
1247e2cb8590Scegger memcpy(dev->sc_bump_va, dev->sc_buf, dev->sc_dma_len);
12487d4a1addSreinoud } else {
12497d4a1addSreinoud dev->sc_dma_buf = dev->sc_dma_blk_ptr;
12507d4a1addSreinoud dev->sc_dma_len = dev->sc_dma_blk_len;
12517d4a1addSreinoud }
12527d4a1addSreinoud
1253ee1b4065Swiz /* Load DMA with address and length of transfer. */
12547d4a1addSreinoud dev->sc_setup_dma(dev, dev->sc_dma_buf, dev->sc_dma_len,
12557d4a1addSreinoud ((nexus->state == SFAS_NS_DATA_OUT) ?
12567d4a1addSreinoud SFAS_DMA_WRITE : SFAS_DMA_READ));
12577d4a1addSreinoud
12587d4a1addSreinoud /* printf("Using DMA !!!!\n");*/
12597d4a1addSreinoud cmd = SFAS_CMD_TRANSFER_INFO | SFAS_CMD_DMA;
12607d4a1addSreinoud } else {
12617d4a1addSreinoud /*
12627d4a1addSreinoud * Hmmm, the unit wants more info than we have or has
12637d4a1addSreinoud * more than we want. Let the chip handle that.
12647d4a1addSreinoud */
12657d4a1addSreinoud
12667d4a1addSreinoud *rp->sfas_tc_low = 0; /* was 256 but this does not make sense */
12677d4a1addSreinoud *rp->sfas_tc_mid = 1;
12687d4a1addSreinoud *rp->sfas_tc_high = 0;
12697d4a1addSreinoud cmd = SFAS_CMD_TRANSFER_PAD;
12707d4a1addSreinoud }
12717d4a1addSreinoud break;
12727d4a1addSreinoud
12737d4a1addSreinoud case SFAS_PHASE_COMMAND:
12747d4a1addSreinoud /* The scsi unit wants the command, send it. */
12757d4a1addSreinoud nexus->state = SFAS_NS_SVC;
12767d4a1addSreinoud
12777d4a1addSreinoud *rp->sfas_command = SFAS_CMD_FLUSH_FIFO;
12787d4a1addSreinoud for(i=0; i<5; i++);
12797d4a1addSreinoud
12807d4a1addSreinoud for(i=0; i<nexus->clen; i++)
12817d4a1addSreinoud *rp->sfas_fifo = nexus->cbuf[i];
12827d4a1addSreinoud cmd = SFAS_CMD_TRANSFER_INFO;
12837d4a1addSreinoud break;
12847d4a1addSreinoud
12857d4a1addSreinoud case SFAS_PHASE_STATUS:
12867d4a1addSreinoud /*
12877d4a1addSreinoud * We've got status phase. Request status and command
12887d4a1addSreinoud * complete message.
12897d4a1addSreinoud */
12907d4a1addSreinoud nexus->state = SFAS_NS_STATUS;
12917d4a1addSreinoud cmd = SFAS_CMD_COMMAND_COMPLETE;
12927d4a1addSreinoud break;
12937d4a1addSreinoud
12947d4a1addSreinoud case SFAS_PHASE_MESSAGE_OUT:
12957d4a1addSreinoud /*
12967d4a1addSreinoud * Either the scsi unit wants us to send a message or we have
12978324be4cSandvar * asked for it by setting the ATN bit.
12987d4a1addSreinoud */
12997d4a1addSreinoud nexus->state = SFAS_NS_MSG_OUT;
13007d4a1addSreinoud
13017d4a1addSreinoud *rp->sfas_command = SFAS_CMD_FLUSH_FIFO;
13027d4a1addSreinoud
13037d4a1addSreinoud if (nexus->flags & SFAS_NF_DO_SDTR) {
13047d4a1addSreinoud /* Send a Synchronous Data Transfer Request. */
13057d4a1addSreinoud
13067d4a1addSreinoud sfas_build_sdtrm(dev, nexus->period, nexus->offset);
13077d4a1addSreinoud nexus->flags |= SFAS_NF_SDTR_SENT;
13087d4a1addSreinoud nexus->flags &= ~SFAS_NF_DO_SDTR;
13097d4a1addSreinoud } else if (nexus->flags & SFAS_NF_RESET) {
13107d4a1addSreinoud /* Send a reset scsi unit message. */
13117d4a1addSreinoud
13127d4a1addSreinoud dev->sc_msg_out[0] = 0x0C;
13137d4a1addSreinoud dev->sc_msg_out_len = 1;
13147d4a1addSreinoud nexus->state = SFAS_NS_RESET;
13157d4a1addSreinoud nexus->flags &= ~SFAS_NF_RESET;
13167d4a1addSreinoud } else if (dev->sc_msg_out_len == 0) {
13177d4a1addSreinoud /* Don't know what to send so we send a NOP message. */
13187d4a1addSreinoud
13197d4a1addSreinoud dev->sc_msg_out[0] = 0x08;
13207d4a1addSreinoud dev->sc_msg_out_len = 1;
13217d4a1addSreinoud }
13227d4a1addSreinoud
13237d4a1addSreinoud cmd = SFAS_CMD_TRANSFER_INFO;
13247d4a1addSreinoud
13257d4a1addSreinoud for(i=0; i<dev->sc_msg_out_len; i++)
13267d4a1addSreinoud *rp->sfas_fifo = dev->sc_msg_out[i];
13277d4a1addSreinoud dev->sc_msg_out_len = 0;
13287d4a1addSreinoud
13297d4a1addSreinoud break;
13307d4a1addSreinoud
13317d4a1addSreinoud case SFAS_PHASE_MESSAGE_IN:
13327d4a1addSreinoud /* Receive a message from the scsi unit. */
13337d4a1addSreinoud nexus->state = SFAS_NS_MSG_IN;
13347d4a1addSreinoud
13357d4a1addSreinoud while(!(nexus->flags & SFAS_NF_HAS_MSG)) {
13367d4a1addSreinoud *rp->sfas_command = SFAS_CMD_TRANSFER_INFO;
13377d4a1addSreinoud sfasiwait(dev);
13387d4a1addSreinoud
13397d4a1addSreinoud dev->sc_msg_in[dev->sc_msg_in_len++] = *rp->sfas_fifo;
13407d4a1addSreinoud
13417d4a1addSreinoud /* Check if we got all the bytes in the message. */
13427d4a1addSreinoud if (dev->sc_msg_in[0] >= 0x80) ;
13437d4a1addSreinoud else if (dev->sc_msg_in[0] >= 0x30) ;
13447d4a1addSreinoud else if (((dev->sc_msg_in[0] >= 0x20) &&
13457d4a1addSreinoud (dev->sc_msg_in_len == 2)) ||
13467d4a1addSreinoud ((dev->sc_msg_in[0] != 0x01) &&
13477d4a1addSreinoud (dev->sc_msg_in_len == 1))) {
13487d4a1addSreinoud nexus->flags |= SFAS_NF_HAS_MSG;
13497d4a1addSreinoud break;
13507d4a1addSreinoud } else {
13517d4a1addSreinoud if (dev->sc_msg_in_len >= 2)
13527d4a1addSreinoud if ((dev->sc_msg_in[1]+2) == dev->sc_msg_in_len) {
13537d4a1addSreinoud nexus->flags |= SFAS_NF_HAS_MSG;
13547d4a1addSreinoud break;
13557d4a1addSreinoud }
13567d4a1addSreinoud }
13577d4a1addSreinoud
13587d4a1addSreinoud *rp->sfas_command = SFAS_CMD_MESSAGE_ACCEPTED;
13597d4a1addSreinoud sfasiwait(dev);
13607d4a1addSreinoud
13617d4a1addSreinoud if ((dev->sc_status & SFAS_STAT_PHASE_MASK) !=
13627d4a1addSreinoud SFAS_PHASE_MESSAGE_IN)
13637d4a1addSreinoud break;
13647d4a1addSreinoud }
13657d4a1addSreinoud
13667d4a1addSreinoud cmd = SFAS_CMD_MESSAGE_ACCEPTED;
13677d4a1addSreinoud if (nexus->flags & SFAS_NF_HAS_MSG) {
13687d4a1addSreinoud /* We have a message. Decode it. */
13697d4a1addSreinoud
13707d4a1addSreinoud switch(dev->sc_msg_in[0]) {
13717d4a1addSreinoud case 0x00: /* COMMAND COMPLETE */
13727d4a1addSreinoud nexus->state = SFAS_NS_DONE;
13737d4a1addSreinoud break;
13747d4a1addSreinoud case 0x04: /* DISCONNECT */
13757d4a1addSreinoud nexus->state = SFAS_NS_DISCONNECTING;
13767d4a1addSreinoud break;
13777d4a1addSreinoud case 0x02: /* SAVE DATA POINTER */
13787d4a1addSreinoud sfas_save_pointers(dev);
13797d4a1addSreinoud break;
13807d4a1addSreinoud case 0x03: /* RESTORE DATA POINTERS */
13817d4a1addSreinoud sfas_restore_pointers(dev);
13827d4a1addSreinoud break;
13837d4a1addSreinoud case 0x07: /* MESSAGE REJECT */
13847d4a1addSreinoud /*
13857d4a1addSreinoud * If we had sent a SDTR and we got a message
13867d4a1addSreinoud * reject, the scsi docs say that we must go
13877d4a1addSreinoud * to async transfer.
13887d4a1addSreinoud */
13897d4a1addSreinoud if (nexus->flags & SFAS_NF_SDTR_SENT) {
13907d4a1addSreinoud nexus->flags &= ~SFAS_NF_SDTR_SENT;
13917d4a1addSreinoud
13927d4a1addSreinoud nexus->config3 &= ~SFAS_CFG3_FASTSCSI;
13937d4a1addSreinoud nexus->syncper = 5;
13947d4a1addSreinoud nexus->syncoff = 0;
13957d4a1addSreinoud
13967d4a1addSreinoud *rp->sfas_syncper = nexus->syncper;
13977d4a1addSreinoud *rp->sfas_syncoff = nexus->syncoff;
13987d4a1addSreinoud *rp->sfas_config3 = nexus->config3;
13997d4a1addSreinoud } else
14007d4a1addSreinoud /*
14017d4a1addSreinoud * Something was rejected but we don't know
14027d4a1addSreinoud * what! PANIC!
14037d4a1addSreinoud */
14047d4a1addSreinoud panic("sfasintr: Unknown message rejected!");
14057d4a1addSreinoud break;
14067d4a1addSreinoud case 0x08: /* MO OPERATION */
14077d4a1addSreinoud break;
14087d4a1addSreinoud case 0x01: /* EXTENDED MESSAGE */
14097d4a1addSreinoud switch(dev->sc_msg_in[2]) {
14107d4a1addSreinoud case 0x01:/* SYNC. DATA TRANSFER REQUEST */
14117d4a1addSreinoud /* Decode the SDTR message. */
14127d4a1addSreinoud period = 4*dev->sc_msg_in[3];
14137d4a1addSreinoud offset = dev->sc_msg_in[4];
14147d4a1addSreinoud
14157d4a1addSreinoud /*
14167d4a1addSreinoud * Make sure that the specs are within
14177d4a1addSreinoud * chip limits. Note that if we
14187d4a1addSreinoud * initiated the negotiation the specs
1419f734fe00Sskrll * WILL be within chip limits. If it
14207d4a1addSreinoud * was the scsi unit that initiated
14217d4a1addSreinoud * the negotiation, the specs may be
14227d4a1addSreinoud * to high.
14237d4a1addSreinoud */
14247d4a1addSreinoud if (offset > 16)
14257d4a1addSreinoud offset = 16;
14267d4a1addSreinoud if ((period < 200) &&
14277d4a1addSreinoud (dev->sc_clock_freq <= 25))
14287d4a1addSreinoud period = 200;
14297d4a1addSreinoud
14307d4a1addSreinoud if (offset == 0)
14317d4a1addSreinoud period = 5*dev->sc_clock_period;
14327d4a1addSreinoud
14337d4a1addSreinoud nexus->syncper = period/
14347d4a1addSreinoud dev->sc_clock_period;
14357d4a1addSreinoud nexus->syncoff = offset;
14367d4a1addSreinoud
14377d4a1addSreinoud if (period < 200)
14387d4a1addSreinoud nexus->config3 |= SFAS_CFG3_FASTSCSI;
14397d4a1addSreinoud else
14407d4a1addSreinoud nexus->config3 &=~SFAS_CFG3_FASTSCSI;
14417d4a1addSreinoud
14427d4a1addSreinoud nexus->flags |= SFAS_NF_SYNC_TESTED;
14437d4a1addSreinoud
14447d4a1addSreinoud *rp->sfas_syncper = nexus->syncper;
14457d4a1addSreinoud *rp->sfas_syncoff = nexus->syncoff;
14467d4a1addSreinoud *rp->sfas_config3 = nexus->config3;
14477d4a1addSreinoud
14487d4a1addSreinoud /*
14497d4a1addSreinoud * Hmmm, it seems that the scsi unit
14507d4a1addSreinoud * initiated sync negotiation, so lets
14518324be4cSandvar * reply according to scsi-2 standard.
14527d4a1addSreinoud */
14537d4a1addSreinoud if (!(nexus->flags& SFAS_NF_SDTR_SENT))
14547d4a1addSreinoud {
14557d4a1addSreinoud if ((dev->sc_config_flags &
14567d4a1addSreinoud SFAS_NO_SYNCH) ||
14577d4a1addSreinoud (dev->sc_config_flags &
14587d4a1addSreinoud SFAS_NO_DMA) ||
14597d4a1addSreinoud sfas_inhibit_sync[
14607d4a1addSreinoud nexus->lun_unit & 7]) {
14617d4a1addSreinoud period = 200;
14627d4a1addSreinoud offset = 0;
14637d4a1addSreinoud }
14647d4a1addSreinoud
14657d4a1addSreinoud nexus->offset = offset;
14667d4a1addSreinoud nexus->period = period;
14677d4a1addSreinoud nexus->flags |= SFAS_NF_DO_SDTR;
14687d4a1addSreinoud *rp->sfas_command = SFAS_CMD_SET_ATN;
14697d4a1addSreinoud }
14707d4a1addSreinoud
14717d4a1addSreinoud nexus->flags &= ~SFAS_NF_SDTR_SENT;
14727d4a1addSreinoud break;
14737d4a1addSreinoud
14747d4a1addSreinoud case 0x00: /* MODIFY DATA POINTERS */
14757d4a1addSreinoud case 0x02: /* EXTENDED IDENTIFY (SCSI-1) */
14767d4a1addSreinoud case 0x03: /* WIDE DATA TRANSFER REQUEST */
14777d4a1addSreinoud default:
14788324be4cSandvar /* Reject any unhandled messages. */
14797d4a1addSreinoud
14807d4a1addSreinoud dev->sc_msg_out[0] = 0x07;
14817d4a1addSreinoud dev->sc_msg_out_len = 1;
14827d4a1addSreinoud *rp->sfas_command = SFAS_CMD_SET_ATN;
14837d4a1addSreinoud cmd = SFAS_CMD_MESSAGE_ACCEPTED;
14847d4a1addSreinoud break;
14857d4a1addSreinoud }
14867d4a1addSreinoud break;
14877d4a1addSreinoud
14887d4a1addSreinoud default:
14898324be4cSandvar /* Reject any unhandled messages. */
14907d4a1addSreinoud
14917d4a1addSreinoud dev->sc_msg_out[0] = 0x07;
14927d4a1addSreinoud dev->sc_msg_out_len = 1;
14937d4a1addSreinoud *rp->sfas_command = SFAS_CMD_SET_ATN;
14947d4a1addSreinoud cmd = SFAS_CMD_MESSAGE_ACCEPTED;
14957d4a1addSreinoud break;
14967d4a1addSreinoud }
14977d4a1addSreinoud nexus->flags &= ~SFAS_NF_HAS_MSG;
14987d4a1addSreinoud dev->sc_msg_in_len = 0;
14997d4a1addSreinoud }
15007d4a1addSreinoud break;
15017d4a1addSreinoud default:
15027d4a1addSreinoud printf("SFASINTR: UNKNOWN PHASE! phase: %d\n",
15037d4a1addSreinoud dev->sc_status & SFAS_STAT_PHASE_MASK);
15047d4a1addSreinoud dev->sc_led(dev, 0);
15057d4a1addSreinoud sfas_scsidone(dev, nexus->xs, -4);
15067d4a1addSreinoud
15077d4a1addSreinoud return(-1);
15087d4a1addSreinoud }
15097d4a1addSreinoud
15107d4a1addSreinoud if (cmd)
15117d4a1addSreinoud *rp->sfas_command = cmd;
15127d4a1addSreinoud
15137d4a1addSreinoud return(0);
15147d4a1addSreinoud }
15157d4a1addSreinoud
15167d4a1addSreinoud /*
15177d4a1addSreinoud * Stub for interrupt machine.
15187d4a1addSreinoud */
15197d4a1addSreinoud void
sfasintr(struct sfas_softc * dev)1520454af1c0Sdsl sfasintr(struct sfas_softc *dev)
15217d4a1addSreinoud {
15227d4a1addSreinoud sfas_regmap_p rp;
15237d4a1addSreinoud struct nexus *nexus;
15247d4a1addSreinoud
15257d4a1addSreinoud rp = dev->sc_fas;
15267d4a1addSreinoud
15277d4a1addSreinoud if (!sfas_pretests(dev, rp)) {
15287d4a1addSreinoud
15297d4a1addSreinoud nexus = dev->sc_cur_nexus;
15307d4a1addSreinoud if (nexus == NULL)
15317d4a1addSreinoud nexus = dev->sc_sel_nexus;
15327d4a1addSreinoud
15337d4a1addSreinoud if (nexus)
15347d4a1addSreinoud if (!sfas_midaction(dev, rp, nexus))
15357d4a1addSreinoud sfas_postaction(dev, rp, nexus);
15367d4a1addSreinoud }
15377d4a1addSreinoud }
15387d4a1addSreinoud
15397d4a1addSreinoud /*
15407d4a1addSreinoud * sfasicmd is used to perform IO when we can't use interrupts. sfasicmd
15417d4a1addSreinoud * emulates the normal environment by waiting for the chip and calling
15427d4a1addSreinoud * sfasintr.
15437d4a1addSreinoud */
15447d4a1addSreinoud void
sfasicmd(struct sfas_softc * dev,struct sfas_pending * pendp)1545454af1c0Sdsl sfasicmd(struct sfas_softc *dev, struct sfas_pending *pendp)
15467d4a1addSreinoud {
15477d4a1addSreinoud struct nexus *nexus;
15487d4a1addSreinoud
15497d4a1addSreinoud nexus = &dev->sc_nexus[pendp->xs->xs_periph->periph_target];
15507d4a1addSreinoud
15517d4a1addSreinoud if (!sfasselect(dev, pendp, (char *)pendp->xs->cmd, pendp->xs->cmdlen,
15527d4a1addSreinoud (char *)pendp->xs->data, pendp->xs->datalen,
15537d4a1addSreinoud SFAS_SELECT_I))
15547d4a1addSreinoud panic("sfasicmd: Couldn't select unit");
15557d4a1addSreinoud
15567d4a1addSreinoud while(nexus->state != SFAS_NS_FINISHED) {
15577d4a1addSreinoud sfasiwait(dev);
15587d4a1addSreinoud sfasintr(dev);
15597d4a1addSreinoud }
15607d4a1addSreinoud
15617d4a1addSreinoud nexus->flags &= ~SFAS_NF_SYNC_TESTED;
15627d4a1addSreinoud }
15637d4a1addSreinoud
15647d4a1addSreinoud
15657d4a1addSreinoud #ifdef SFAS_DEBUG
15667d4a1addSreinoud
15677d4a1addSreinoud void
dump_nexus(struct nexus * nexus)1568454af1c0Sdsl dump_nexus(struct nexus *nexus)
15697d4a1addSreinoud {
15707d4a1addSreinoud int loop;
15717d4a1addSreinoud
15727d4a1addSreinoud printf("nexus=%08x\n", (u_int)nexus);
15737d4a1addSreinoud printf("scsi_fer=%08x\n", (u_int)nexus->xs);
15747d4a1addSreinoud printf("ID=%02x\n", nexus->ID);
15757d4a1addSreinoud printf("clen=%02x\n", nexus->clen);
15767d4a1addSreinoud printf("cbuf=");
15777d4a1addSreinoud for (loop = 0; loop< 14; ++loop)
15787d4a1addSreinoud printf(" %02x\n", nexus->cbuf[loop]);
15797d4a1addSreinoud printf("\n");
15801ffa7b76Swiz printf("DMA:\n");
15817d4a1addSreinoud for (loop = 0; loop < MAXCHAIN; ++loop)
1582*fcdad19eSandvar printf("dma_chain: %8p %04x %04x\n", (void *)nexus->dma[loop].ptr,
15837d4a1addSreinoud nexus->dma[loop].len, nexus->dma[loop].flg);
15847d4a1addSreinoud printf("\n");
15857d4a1addSreinoud
15867d4a1addSreinoud printf("max_link=%d\n", nexus->max_link);
15877d4a1addSreinoud printf("cur_link=%d\n", nexus->cur_link);
15887d4a1addSreinoud
15897d4a1addSreinoud printf("buf=%08x\n", (u_int)nexus->buf);
15907d4a1addSreinoud printf("len=%08x\n", nexus->len);
15917d4a1addSreinoud printf("dma_buf=%08x\n", (u_int)nexus->dma_buf);
15927d4a1addSreinoud printf("dma_len=%08x\n", nexus->dma_len);
15937d4a1addSreinoud printf("dma_blk_ptr=%08x\n", (u_int)nexus->dma_blk_ptr);
15947d4a1addSreinoud printf("dma_blk_len=%08x\n", nexus->dma_blk_len);
15957d4a1addSreinoud printf("dma_blk_flag=%08x\n", nexus->dma_blk_flg);
15967d4a1addSreinoud printf("state=%02x\n", nexus->state);
15977d4a1addSreinoud printf("flags=%04x\n", nexus->flags);
15987d4a1addSreinoud printf("period=%d\n", nexus->period);
15997d4a1addSreinoud printf("offset=%d\n", nexus->offset);
16007d4a1addSreinoud printf("syncper=%d\n", nexus->syncper);
16017d4a1addSreinoud printf("syncoff=%d\n", nexus->syncoff);
16027d4a1addSreinoud printf("config3=%02x\n", nexus->config3);
16037d4a1addSreinoud printf("lun_unit=%d\n", nexus->lun_unit);
16047d4a1addSreinoud printf("status=%02x\n", nexus->status);
16057d4a1addSreinoud printf("\n");
16067d4a1addSreinoud }
16077d4a1addSreinoud
16087d4a1addSreinoud void
dump_nexii(struct sfas_softc * sc)1609454af1c0Sdsl dump_nexii(struct sfas_softc *sc)
16107d4a1addSreinoud {
16117d4a1addSreinoud int loop;
16127d4a1addSreinoud
16137d4a1addSreinoud for (loop = 0; loop < 8; ++loop) {
16147d4a1addSreinoud dump_nexus(&sc->sc_nexus[loop]);
16157d4a1addSreinoud }
16167d4a1addSreinoud }
16177d4a1addSreinoud
16187d4a1addSreinoud void
dump_sfassoftc(struct sfas_softc * sc)1619454af1c0Sdsl dump_sfassoftc(struct sfas_softc *sc)
16207d4a1addSreinoud {
16217d4a1addSreinoud printf("sfassoftc @ 0x%08x\n", (u_int)sc);
16227d4a1addSreinoud printf("clock_freq = %d\n", sc->sc_clock_freq);
16237d4a1addSreinoud printf("timeout = %d\n", sc->sc_timeout);
16247d4a1addSreinoud printf("host_id = %d\n", sc->sc_host_id);
16257d4a1addSreinoud printf("config_flags = 0x%08x\n", sc->sc_config_flags);
16267d4a1addSreinoud printf("led_status = %d\n", sc->sc_led_status);
16277d4a1addSreinoud
16287d4a1addSreinoud dump_nexii(sc);
16297d4a1addSreinoud printf("cur_nexus = 0x%08x\n", (u_int)sc->sc_cur_nexus);
16307d4a1addSreinoud printf("sel_nexus = 0x%08x\n", (u_int)sc->sc_sel_nexus);
16317d4a1addSreinoud printf("\n");
16327d4a1addSreinoud }
16337d4a1addSreinoud
16347d4a1addSreinoud #endif /* SFAS_DEBUG */
1635