1*ce099b40Smartin /* $NetBSD: cscreg.h,v 1.2 2008/04/28 20:23:10 martin Exp $ */ 27d4a1addSreinoud 37d4a1addSreinoud /*- 47d4a1addSreinoud * Copyright (c) 1998 The NetBSD Foundation, Inc. 57d4a1addSreinoud * All rights reserved. 67d4a1addSreinoud * 77d4a1addSreinoud * This code is derived from software contributed to The NetBSD Foundation 87d4a1addSreinoud * by Scott Stevens. 97d4a1addSreinoud * 107d4a1addSreinoud * Redistribution and use in source and binary forms, with or without 117d4a1addSreinoud * modification, are permitted provided that the following conditions 127d4a1addSreinoud * are met: 137d4a1addSreinoud * 1. Redistributions of source code must retain the above copyright 147d4a1addSreinoud * notice, this list of conditions and the following disclaimer. 157d4a1addSreinoud * 2. Redistributions in binary form must reproduce the above copyright 167d4a1addSreinoud * notice, this list of conditions and the following disclaimer in the 177d4a1addSreinoud * documentation and/or other materials provided with the distribution. 187d4a1addSreinoud * 197d4a1addSreinoud * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 207d4a1addSreinoud * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 217d4a1addSreinoud * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 227d4a1addSreinoud * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 237d4a1addSreinoud * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 247d4a1addSreinoud * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 257d4a1addSreinoud * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 267d4a1addSreinoud * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 277d4a1addSreinoud * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 287d4a1addSreinoud * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 297d4a1addSreinoud * POSSIBILITY OF SUCH DAMAGE. 307d4a1addSreinoud */ 317d4a1addSreinoud 327d4a1addSreinoud /* 337d4a1addSreinoud * Cumana SCSI-2 with FAS216 SCSI interface hardware description. 347d4a1addSreinoud */ 357d4a1addSreinoud 367d4a1addSreinoud #ifndef _CSCREG_H_ 377d4a1addSreinoud #define _CSCREG_H_ 387d4a1addSreinoud 397d4a1addSreinoud #include <acorn32/podulebus/sfasvar.h> 407d4a1addSreinoud 417d4a1addSreinoud typedef volatile unsigned short vu_short; 427d4a1addSreinoud 437d4a1addSreinoud typedef struct csc_regmap { 447d4a1addSreinoud sfas_regmap_t FAS216; 457d4a1addSreinoud vu_char *status0; 467d4a1addSreinoud vu_char *alatch; 477d4a1addSreinoud vu_short *dack; 487d4a1addSreinoud } csc_regmap_t; 497d4a1addSreinoud typedef csc_regmap_t *csc_regmap_p; 507d4a1addSreinoud 517d4a1addSreinoud /* 527d4a1addSreinoud * Register information 537d4a1addSreinoud */ 547d4a1addSreinoud #define CSC_STATUS0 0x0000 557d4a1addSreinoud #define CSC_ALATCH 0x0014 567d4a1addSreinoud #define CSC_DACK 0x0200 577d4a1addSreinoud #define CSC_FAS_OFFSET_BASE 0x0300 587d4a1addSreinoud #define CSC_FAS_OFFSET_TCL 0x00 597d4a1addSreinoud #define CSC_FAS_OFFSET_TCM 0x04 607d4a1addSreinoud #define CSC_FAS_OFFSET_FIFO 0x08 617d4a1addSreinoud #define CSC_FAS_OFFSET_COMMAND 0x0c 627d4a1addSreinoud #define CSC_FAS_OFFSET_DESTID 0x10 637d4a1addSreinoud #define CSC_FAS_OFFSET_TIMEOUT 0x14 647d4a1addSreinoud #define CSC_FAS_OFFSET_PERIOD 0x18 657d4a1addSreinoud #define CSC_FAS_OFFSET_OFFSET 0x1c 667d4a1addSreinoud #define CSC_FAS_OFFSET_CONFIG1 0x20 677d4a1addSreinoud #define CSC_FAS_OFFSET_CLKCONV 0x24 687d4a1addSreinoud #define CSC_FAS_OFFSET_TEST 0x28 697d4a1addSreinoud #define CSC_FAS_OFFSET_CONFIG2 0x2c 707d4a1addSreinoud #define CSC_FAS_OFFSET_CONFIG3 0x30 717d4a1addSreinoud #define CSC_FAS_OFFSET_TCH 0x38 727d4a1addSreinoud #define CSC_FAS_OFFSET_FIFOBOT 0x3c 737d4a1addSreinoud 747d4a1addSreinoud #define CSC_STATUS0_INT 0x01 757d4a1addSreinoud #define CSC_STATUS0_DREQ 0x02 767d4a1addSreinoud #define CSC_STATUS0_EDOUT 0x04 777d4a1addSreinoud #define CSC_STATUS0_LATCHED 0x08 787d4a1addSreinoud 797d4a1addSreinoud #define CSC_ALATCH_DEFS_P7 0x01 807d4a1addSreinoud #define CSC_ALATCH_DEFS_INTEN 0x02 817d4a1addSreinoud #define CSC_ALATCH_DEFS_TERM 0x04 827d4a1addSreinoud #define CSC_ALATCH_DEFS_RSVD 0x08 837d4a1addSreinoud #define CSC_ALATCH_DEFS_PROG 0x10 847d4a1addSreinoud #define CSC_ALATCH_DEFS_DMA32 0x20 857d4a1addSreinoud #define CSC_ALATCH_DEFS_DMAEN 0x40 867d4a1addSreinoud #define CSC_ALATCH_DEFS_DMADIR 0x80 877d4a1addSreinoud 887d4a1addSreinoud #endif 89