1*02cdf4d2Sdsl /* $NetBSD: irqhandler.h,v 1.9 2009/03/14 14:45:51 dsl Exp $ */ 27d4a1addSreinoud 37d4a1addSreinoud /* 47d4a1addSreinoud * Copyright (c) 1994-1996 Mark Brinicombe. 57d4a1addSreinoud * Copyright (c) 1994 Brini. 67d4a1addSreinoud * All rights reserved. 77d4a1addSreinoud * 87d4a1addSreinoud * This code is derived from software written for Brini by Mark Brinicombe 97d4a1addSreinoud * 107d4a1addSreinoud * Redistribution and use in source and binary forms, with or without 117d4a1addSreinoud * modification, are permitted provided that the following conditions 127d4a1addSreinoud * are met: 137d4a1addSreinoud * 1. Redistributions of source code must retain the above copyright 147d4a1addSreinoud * notice, this list of conditions and the following disclaimer. 157d4a1addSreinoud * 2. Redistributions in binary form must reproduce the above copyright 167d4a1addSreinoud * notice, this list of conditions and the following disclaimer in the 177d4a1addSreinoud * documentation and/or other materials provided with the distribution. 187d4a1addSreinoud * 3. All advertising materials mentioning features or use of this software 197d4a1addSreinoud * must display the following acknowledgement: 207d4a1addSreinoud * This product includes software developed by Mark Brinicombe 217d4a1addSreinoud * for the NetBSD Project. 227d4a1addSreinoud * 4. The name of the company nor the name of the author may be used to 237d4a1addSreinoud * endorse or promote products derived from this software without specific 247d4a1addSreinoud * prior written permission. 257d4a1addSreinoud * 267d4a1addSreinoud * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 277d4a1addSreinoud * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 287d4a1addSreinoud * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 297d4a1addSreinoud * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 307d4a1addSreinoud * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 317d4a1addSreinoud * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 327d4a1addSreinoud * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 337d4a1addSreinoud * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 347d4a1addSreinoud * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 357d4a1addSreinoud * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 367d4a1addSreinoud * SUCH DAMAGE. 377d4a1addSreinoud * 387d4a1addSreinoud * IRQ related stuff (defines + structures) 397d4a1addSreinoud * 407d4a1addSreinoud * Created : 30/09/94 417d4a1addSreinoud */ 427d4a1addSreinoud 437d4a1addSreinoud #ifndef _ARM32_IRQHANDLER_H_ 447d4a1addSreinoud #define _ARM32_IRQHANDLER_H_ 457d4a1addSreinoud 467d4a1addSreinoud #if defined(_KERNEL_OPT) 477d4a1addSreinoud #include "iomd.h" 487d4a1addSreinoud #endif 497d4a1addSreinoud 507d4a1addSreinoud #ifndef _LOCORE 517d4a1addSreinoud #include <sys/types.h> 527d4a1addSreinoud #endif /* _LOCORE */ 537d4a1addSreinoud 547d4a1addSreinoud /* Define the IRQ bits */ 557d4a1addSreinoud 567d4a1addSreinoud /* 577d4a1addSreinoud * XXX this is really getting rather horrible. 587d4a1addSreinoud * Shortly to be replaced with system specific interrupt tables and handling 597d4a1addSreinoud */ 607d4a1addSreinoud 617d4a1addSreinoud #if NIOMD > 0 627d4a1addSreinoud 637d4a1addSreinoud /* Only for ARM7500 : */ 647d4a1addSreinoud 657d4a1addSreinoud /*#define IRQ_PRINTER 0x00*/ 6691825be6Schris #define IRQ_INT2 0x00 677d4a1addSreinoud /*#define IRQ_RESERVED0 0x01*/ 687d4a1addSreinoud #define IRQ_BUTTON 0x02 6991825be6Schris #define IRQ_NINT1 0x02 707d4a1addSreinoud #define IRQ_FLYBACK 0x03 7191825be6Schris #define IRQ_NPOR 0x04 727d4a1addSreinoud #define IRQ_TIMER0 0x05 737d4a1addSreinoud #define IRQ_TIMER1 0x06 7491825be6Schris #define IRQ_SOFTINT 0x07 757d4a1addSreinoud 767d4a1addSreinoud #define IRQ_DREQ3 0x08 7791825be6Schris #define IRQ_NINT8 0x08 787d4a1addSreinoud /*#define IRQ_HD1 0x09*/ 7991825be6Schris #define IRQ_INT7 0x09 807d4a1addSreinoud /*#define IRQ_HD IRQ_HD1*/ 817d4a1addSreinoud #define IRQ_DREQ2 0x0A 8291825be6Schris #define IRQ_NINT6 0x0A 8391825be6Schris #define IRQ_INT5 0x0B 847d4a1addSreinoud /*#define IRQ_FLOPPY 0x0C*/ 8591825be6Schris #define IRQ_NINT4 0x0C 867d4a1addSreinoud /*#define IRQ_SERIAL 0x0D*/ 8791825be6Schris #define IRQ_NINT3 0x0D 887d4a1addSreinoud #define IRQ_KBDTX 0x0E 897d4a1addSreinoud #define IRQ_KBDRX 0x0F 907d4a1addSreinoud 917d4a1addSreinoud #define IRQ_IRQ3 0x10 927d4a1addSreinoud #define IRQ_IRQ4 0x11 937d4a1addSreinoud #define IRQ_IRQ5 0x12 947d4a1addSreinoud #define IRQ_IRQ6 0x13 957d4a1addSreinoud #define IRQ_IRQ7 0x14 967d4a1addSreinoud #define IRQ_IRQ9 0x15 977d4a1addSreinoud #define IRQ_IRQ10 0x16 987d4a1addSreinoud #define IRQ_IRQ11 0x17 997d4a1addSreinoud 10091825be6Schris #define IRQ_IOP0 0x10 10191825be6Schris #define IRQ_IOP1 0x11 10291825be6Schris #define IRQ_IOP2 0x12 10391825be6Schris #define IRQ_IOP3 0x13 10491825be6Schris #define IRQ_IOP4 0x14 10591825be6Schris #define IRQ_IOP5 0x15 10691825be6Schris #define IRQ_IOP6 0x16 10791825be6Schris #define IRQ_IOP7 0x17 10891825be6Schris 1097d4a1addSreinoud #define IRQ_MSDRX 0x18 1107d4a1addSreinoud #define IRQ_MSDTX 0x19 1117d4a1addSreinoud #define IRQ_ATOD 0x1A 1120415feb0Schris #define IRQ_NEVENT1 0x1B 1137d4a1addSreinoud #define IRQ_CLOCK 0x1B 1140415feb0Schris #define IRQ_NEVENT2 0x1C 1157d4a1addSreinoud #define IRQ_PANIC 0x1C 1167d4a1addSreinoud /*#define IRQ_RESERVED2 0x1D*/ 1177d4a1addSreinoud /*#define IRQ_RESERVED3 0x1E*/ 1187d4a1addSreinoud 1197d4a1addSreinoud 1207d4a1addSreinoud /* 1217d4a1addSreinoud * Note that Sound DMA IRQ is on the 31st vector. 1227d4a1addSreinoud * It's not part of the IRQD. 1237d4a1addSreinoud */ 1247d4a1addSreinoud #define IRQ_SDMA 0x1F 1257d4a1addSreinoud 1267d4a1addSreinoud /* Several interrupts are different between the A7000 and RC7500 */ 1277d4a1addSreinoud #ifdef RC7500 1287d4a1addSreinoud 1297d4a1addSreinoud #define IRQ_FIQDOWN 0x07 1307d4a1addSreinoud #define IRQ_ETHERNET 0x0B 1317d4a1addSreinoud #define IRQ_HD2 IRQ_IRQ11 1327d4a1addSreinoud 1337d4a1addSreinoud #else /* RC7500 */ 1347d4a1addSreinoud 1357d4a1addSreinoud /*#define IRQ_RESERVED1 0x07 */ 1367d4a1addSreinoud #define IRQ_EXTENDED 0x0B 1377d4a1addSreinoud #define IRQ_PODULE 0x0D 1387d4a1addSreinoud 1397d4a1addSreinoud #endif /* RC7500 */ 1407d4a1addSreinoud 1417d4a1addSreinoud 1427d4a1addSreinoud 1437d4a1addSreinoud 1447d4a1addSreinoud /* for non ARM7500 machines : */ 1457d4a1addSreinoud 1467d4a1addSreinoud /*#define IRQ_PRINTER 0x00*/ 1477d4a1addSreinoud /*#define IRQ_RESERVED0 0x01*/ 1487d4a1addSreinoud /*#define IRQ_FLOPPYIDX 0x02*/ 1497d4a1addSreinoud #define IRQ_FLYBACK 0x03 1507d4a1addSreinoud #define IRQ_POR 0x04 1517d4a1addSreinoud #define IRQ_TIMER0 0x05 1527d4a1addSreinoud #define IRQ_TIMER1 0x06 1537d4a1addSreinoud /*#define IRQ_RESERVED1 0x07*/ 1547d4a1addSreinoud 1557d4a1addSreinoud /*#define IRQ_RESERVED2 0x08*/ 1567d4a1addSreinoud /*#define IRQ_HD 0x09*/ 1577d4a1addSreinoud /*#define IRQ_SERIAL 0x0A*/ 1587d4a1addSreinoud #define IRQ_EXTENDED 0x0B 1597d4a1addSreinoud /*#define IRQ_FLOPPY 0x0C*/ 1607d4a1addSreinoud #define IRQ_PODULE 0x0D 1617d4a1addSreinoud #define IRQ_KBDTX 0x0E 1627d4a1addSreinoud #define IRQ_KBDRX 0x0F 1637d4a1addSreinoud 1647d4a1addSreinoud #define IRQ_DMACH0 0x10 1657d4a1addSreinoud #define IRQ_DMACH1 0x11 1667d4a1addSreinoud #define IRQ_DMACH2 0x12 1677d4a1addSreinoud #define IRQ_DMACH3 0x13 1687d4a1addSreinoud #define IRQ_DMASCH0 0x14 1697d4a1addSreinoud #define IRQ_DMASCH1 0x15 1707d4a1addSreinoud /*#define IRQ_RESERVED3 0x16*/ 1717d4a1addSreinoud /*#define IRQ_RESERVED4 0x17*/ 1727d4a1addSreinoud 1737d4a1addSreinoud 1747d4a1addSreinoud 1757d4a1addSreinoud #endif /* NIOMD > 0 */ 1767d4a1addSreinoud 1777d4a1addSreinoud #define IRQ_VSYNC IRQ_FLYBACK /* Aliased */ 1787d4a1addSreinoud #define IRQ_NETSLOT IRQ_EXTENDED 1797d4a1addSreinoud 1807d4a1addSreinoud #define IRQ_INSTRUCT -1 1817d4a1addSreinoud #define NIRQS 0x20 1827d4a1addSreinoud 1837d4a1addSreinoud #include <machine/intr.h> 1847d4a1addSreinoud 1857d4a1addSreinoud #ifndef _LOCORE 1867d4a1addSreinoud typedef struct irqhandler { 187*02cdf4d2Sdsl int (*ih_func)(void *arg);/* handler function */ 1887d4a1addSreinoud void *ih_arg; /* Argument to handler */ 1897d4a1addSreinoud int ih_level; /* Interrupt level */ 1907d4a1addSreinoud int ih_num; /* Interrupt number (for accounting) */ 1917d4a1addSreinoud const char *ih_name; /* Name of interrupt (for vmstat -i) */ 1927d4a1addSreinoud u_int ih_flags; /* Interrupt flags */ 1937d4a1addSreinoud u_int ih_maskaddr; /* mask address for expansion cards */ 1947d4a1addSreinoud u_int ih_maskbits; /* interrupt bit for expansion cards */ 1957d4a1addSreinoud struct irqhandler *ih_next; /* next handler */ 1967d4a1addSreinoud } irqhandler_t; 1977d4a1addSreinoud 1987d4a1addSreinoud #ifdef _KERNEL 19900caca48Smatt extern u_int irqmasks[NIPL]; 2007d4a1addSreinoud extern irqhandler_t *irqhandlers[NIRQS]; 2017d4a1addSreinoud 202*02cdf4d2Sdsl void irq_init(void); 203*02cdf4d2Sdsl int irq_claim(int, irqhandler_t *); 204*02cdf4d2Sdsl int irq_release(int, irqhandler_t *); 205*02cdf4d2Sdsl void *intr_claim(int irq, int level, const char *name, int (*func)(void *), void *arg); 206*02cdf4d2Sdsl int intr_release(void *ih); 207*02cdf4d2Sdsl void irq_setmasks(void); 208*02cdf4d2Sdsl void disable_irq(int); 209*02cdf4d2Sdsl void enable_irq(int); 210*02cdf4d2Sdsl void stray_irqhandler(u_int); 2117d4a1addSreinoud #endif /* _KERNEL */ 2127d4a1addSreinoud #endif /* _LOCORE */ 2137d4a1addSreinoud 2147d4a1addSreinoud #define IRQ_FLAG_ACTIVE 0x00000001 /* This is the active handler in list */ 2157d4a1addSreinoud 2167d4a1addSreinoud #endif /* _ARM32_IRQHANDLER_H_ */ 2177d4a1addSreinoud 2187d4a1addSreinoud /* End of irqhandler.h */ 219