1*99199cfcSjmcneill.\" $NetBSD: pci.9,v 1.49 2018/11/02 15:01:18 jmcneill Exp $ 28752c231Sgmcgarry.\" 35472a338Sthorpej.\" Copyright (c) 2001, 2003 The NetBSD Foundation, Inc. 48752c231Sgmcgarry.\" All rights reserved. 58752c231Sgmcgarry.\" 68752c231Sgmcgarry.\" This code is derived from software contributed to The NetBSD Foundation 78752c231Sgmcgarry.\" by Gregory McGarry. 88752c231Sgmcgarry.\" 98752c231Sgmcgarry.\" Redistribution and use in source and binary forms, with or without 108752c231Sgmcgarry.\" modification, are permitted provided that the following conditions 118752c231Sgmcgarry.\" are met: 128752c231Sgmcgarry.\" 1. Redistributions of source code must retain the above copyright 138752c231Sgmcgarry.\" notice, this list of conditions and the following disclaimer. 148752c231Sgmcgarry.\" 2. Redistributions in binary form must reproduce the above copyright 158752c231Sgmcgarry.\" notice, this list of conditions and the following disclaimer in the 168752c231Sgmcgarry.\" documentation and/or other materials provided with the distribution. 178752c231Sgmcgarry.\" 188752c231Sgmcgarry.\" THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 198752c231Sgmcgarry.\" ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 208752c231Sgmcgarry.\" TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 218752c231Sgmcgarry.\" PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 228752c231Sgmcgarry.\" BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 238752c231Sgmcgarry.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 248752c231Sgmcgarry.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 258752c231Sgmcgarry.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 268752c231Sgmcgarry.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 278752c231Sgmcgarry.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 288752c231Sgmcgarry.\" POSSIBILITY OF SUCH DAMAGE. 298752c231Sgmcgarry.\" 30*99199cfcSjmcneill.Dd November 2, 2018 318752c231Sgmcgarry.Dt PCI 9 328752c231Sgmcgarry.Os 338752c231Sgmcgarry.Sh NAME 348752c231Sgmcgarry.Nm PCI , 354f29764cSchristos.Nm pci_activate , 367d12941cSdyoung.Nm pci_bus_devorder , 37a5b1adfdSdyoung.Nm pci_chipset_tag_create , 38a5b1adfdSdyoung.Nm pci_chipset_tag_destroy , 398752c231Sgmcgarry.Nm pci_conf_read , 408752c231Sgmcgarry.Nm pci_conf_write , 418752c231Sgmcgarry.Nm pci_conf_print , 42439b200fSjmcneill.Nm pci_conf_capture , 43439b200fSjmcneill.Nm pci_conf_restore , 44f1ad946aSgmcgarry.Nm pci_find_device , 458752c231Sgmcgarry.Nm pci_get_capability , 46ae22aa76Sknakahara.Nm pci_get_ht_capability , 47605f564fSmsaitoh.Nm pci_get_ext_capability , 48*99199cfcSjmcneill.Nm pci_get_segment , 498752c231Sgmcgarry.Nm pci_mapreg_type , 508752c231Sgmcgarry.Nm pci_mapreg_map , 518752c231Sgmcgarry.Nm pci_mapreg_info , 528752c231Sgmcgarry.Nm pci_intr_map , 538752c231Sgmcgarry.Nm pci_intr_string , 548752c231Sgmcgarry.Nm pci_intr_evcnt , 558752c231Sgmcgarry.Nm pci_intr_establish , 56d7a314d2Sknakahara.Nm pci_intr_establish_xname , 578752c231Sgmcgarry.Nm pci_intr_disestablish , 58d7a314d2Sknakahara.Nm pci_intr_type , 59d7a314d2Sknakahara.Nm pci_intr_setattr , 60704898a9Sgmcgarry.Nm pci_get_powerstate , 61704898a9Sgmcgarry.Nm pci_set_powerstate , 625472a338Sthorpej.Nm pci_vpd_read , 635472a338Sthorpej.Nm pci_vpd_write , 648752c231Sgmcgarry.Nm pci_make_tag , 658752c231Sgmcgarry.Nm pci_decompose_tag , 668752c231Sgmcgarry.Nm pci_findvendor , 678752c231Sgmcgarry.Nm pci_devinfo , 688752c231Sgmcgarry.Nm PCI_VENDOR , 698752c231Sgmcgarry.Nm PCI_PRODUCT , 708752c231Sgmcgarry.Nm PCI_REVISION 718752c231Sgmcgarry.Nd Peripheral Component Interconnect 728752c231Sgmcgarry.Sh SYNOPSIS 739a37c59cSdyoung.In sys/bus.h 74472351e1Swiz.In dev/pci/pcivar.h 75472351e1Swiz.In dev/pci/pcireg.h 76472351e1Swiz.In dev/pci/pcidevs.h 774f29764cSchristos.Ft int 787d12941cSdyoung.Fn pci_bus_devorder "pci_chipset_tag_t pc" "int bus" "uint8_t *devs" \ 797d12941cSdyoung"int maxdevs" 807d12941cSdyoung.Ft int 816655a8f4Scegger.Fn pci_activate "pci_chipset_tag_t pc" "pcitag_t tag" "device_t dev" \ 828b6ff78bSwiz"int (*wakeup)(pci_chipset_tag_t pc, pcitag_t tag, device_t dev, pcireg_t reg)" 83a5b1adfdSdyoung.Ft int 84a5b1adfdSdyoung.Fn pci_chipset_tag_create "pci_chipset_tag_t opc" "uint64_t present" \ 85a5b1adfdSdyoung"const struct pci_overrides *ov" "void *ctx" "pci_chipset_tag_t *pcp" 86a5b1adfdSdyoung.Ft void 87a5b1adfdSdyoung.Fn pci_chipset_tag_destroy "pci_chipset_tag_t pc" 888752c231Sgmcgarry.Ft pcireg_t 898752c231Sgmcgarry.Fn pci_conf_read "pci_chipset_tag_t pc" "pcitag_t tag" "int reg" 908752c231Sgmcgarry.Ft void 918752c231Sgmcgarry.Fn pci_conf_write "pci_chipset_tag_t pc" "pcitag_t tag" "int reg" \ 928752c231Sgmcgarry"pcireg_t val" 938752c231Sgmcgarry.Ft void 948752c231Sgmcgarry.Fn pci_conf_print "pci_chipset_tag_t pc" "pcitag_t tag" \ 958b6ff78bSwiz"void (*func)(pci_chipset_tag_t, pcitag_t, const pcireg_t *)" 96439b200fSjmcneill.Ft void 97439b200fSjmcneill.Fn pci_conf_capture "pci_chipset_tag_t pc" "pcitag_t tag" \ 98439b200fSjmcneill"struct pci_conf_state *" 99439b200fSjmcneill.Ft void 100439b200fSjmcneill.Fn pci_conf_restore "pci_chipset_tag_t pc" "pcitag_t tag" \ 101439b200fSjmcneill"struct pci_conf_state *" 1028752c231Sgmcgarry.Ft int 103f1ad946aSgmcgarry.Fn pci_find_device "struct pci_attach_args *pa" \ 10438c5ac17Sdyoung"int (*func)(const struct pci_attach_args *)" 105f1ad946aSgmcgarry.Ft int 1068752c231Sgmcgarry.Fn pci_get_capability "pci_chipset_tag_t pc" "pcitag_t tag" \ 1078752c231Sgmcgarry"int capid" "int *offsetp" "pcireg_t *valuep" 108ae22aa76Sknakahara.Ft int 109ae22aa76Sknakahara.Fn pci_get_ht_capability "pci_chipset_tag_t pc" "pcitag_t tag" \ 110f60a13e9Sknakahara"int capid" "int *offsetp" "pcireg_t *valuep" 111605f564fSmsaitoh.Ft int 112605f564fSmsaitoh.Fn pci_get_ext_capability "pci_chipset_tag_t pc" "pcitag_t tag" \ 113605f564fSmsaitoh"int capid" "int *offsetp" "pcireg_t *valuep" 114*99199cfcSjmcneill.Ft u_int 115*99199cfcSjmcneill.Fn pci_get_segment "pci_chipset_tag_t pc" 1168752c231Sgmcgarry.Ft pcireg_t 1178752c231Sgmcgarry.Fn pci_mapreg_type "pci_chipset_tag_t pc" "pcitag_t tag" "int reg" 1188752c231Sgmcgarry.Ft int 11938c5ac17Sdyoung.Fn pci_mapreg_map "const struct pci_attach_args *pa" "int reg" \ 1208752c231Sgmcgarry"pcireg_t type" "int busflags" "bus_space_tag_t *tagp" \ 1218752c231Sgmcgarry"bus_space_handle_t *handlep" "bus_addr_t *basep" "bus_size_t *sizep" 1228752c231Sgmcgarry.Ft int 1238752c231Sgmcgarry.Fn pci_mapreg_info "pci_chipset_tag_t pc" "pcitag_t tag" "int reg" \ 1248752c231Sgmcgarry"pcireg_t type" "bus_addr_t *basep" "bus_size_t *sizep" "int *flagsp" 1258752c231Sgmcgarry.Ft int 12638c5ac17Sdyoung.Fn pci_find_rom "const struct pci_attach_args *pa" \ 127f0d12e0dSgdamore"bus_space_tag_t bst" "bus_space_handle_t bsh" "int code" \ 128f0d12e0dSgdamore"bus_space_handle_t *handlep" "bus_space_size_t *sizep" 129f0d12e0dSgdamore.Ft int 13038c5ac17Sdyoung.Fn pci_intr_map "const struct pci_attach_args *pa" "pci_intr_handle_t *ih" 1318752c231Sgmcgarry.Ft const char * 1328752c231Sgmcgarry.Fn pci_intr_string "pci_chipset_tag_t pc" "pci_intr_handle_t ih" 1338752c231Sgmcgarry.Ft const struct evcnt * 1348752c231Sgmcgarry.Fn pci_intr_evcnt "pci_chipset_tag_t pc" "pci_intr_handle_t ih" 1358752c231Sgmcgarry.Ft void * 1368752c231Sgmcgarry.Fn pci_intr_establish "pci_chipset_tag_t pc" "pci_intr_handle_t ih" \ 1378752c231Sgmcgarry"int level" "int (*handler)(void *)" "void *arg" 138d7a314d2Sknakahara.Ft void * 139d7a314d2Sknakahara.Fn pci_intr_establish_xname "pci_chipset_tag_t pc" "pci_intr_handle_t ih" \ 140d7a314d2Sknakahara"int level" "int (*handler)(void *)" "void *arg" "const char *xname" 1418752c231Sgmcgarry.Ft void 1428752c231Sgmcgarry.Fn pci_intr_disestablish "pci_chipset_tag_t pc" "void *ih" 143d7a314d2Sknakahara.Ft pci_intr_type_t 144d7a314d2Sknakahara.Fn pci_intr_type "pci_chipset_tag_t pc" "pci_intr_handle_t ih" 145d7a314d2Sknakahara.Ft int 146d7a314d2Sknakahara.Fn pci_intr_setattr "pci_chipset_tag_t pc" "pci_intr_handle_t *ih" "int attr" "uint64_t data" 147704898a9Sgmcgarry.Ft int 148704898a9Sgmcgarry.Fn pci_set_powerstate "pci_chipset_tag_t pc" "pcitag_t tag" \ 1494f29764cSchristos"pcireg_t newstate" 150704898a9Sgmcgarry.Ft int 1514f29764cSchristos.Fn pci_get_powerstate "pci_chipset_tag_t pc" "pcitag_t tag" "pcireg_t *state" 1525472a338Sthorpej.Ft int 1535472a338Sthorpej.Fn pci_vpd_read "pci_chipset_tag_t pc" "pcitag_t tag" "int offset" \ 1545472a338Sthorpej"int count" "pcireg_t *data" 1555472a338Sthorpej.Ft int 1565472a338Sthorpej.Fn pci_vpd_write "pci_chipset_tag_t pc" "pcitag_t tag" "int offset" \ 1575472a338Sthorpej"int count" "pcireg_t *data" 1588752c231Sgmcgarry.Ft pcitag_t 1598752c231Sgmcgarry.Fn pci_make_tag "pci_chipset_tag_t pc" "int bus" "int device" \ 1608752c231Sgmcgarry"int function" 1618752c231Sgmcgarry.Ft void 1628752c231Sgmcgarry.Fn pci_decompose_tag "pci_chipset_tag_t pc" "pcitag_t tag" \ 1638752c231Sgmcgarry"int *busp" "int *devicep" "int *functionp" 1648752c231Sgmcgarry.Ft char * 1658752c231Sgmcgarry.Fn pci_findvendor "pcireg_t id" 1668752c231Sgmcgarry.Ft void 1679bfa4ce9Skleink.Fn pci_devinfo "pcireg_t id" "pcireg_t class" "int show" "char *cp" "size_t len" 16875699fcfSdrochner.Ft void 16975699fcfSdrochner.Fn pci_aprint_devinfo "struct pci_attach_args *pa" "const char *naive" 1708752c231Sgmcgarry.Ft int 1718752c231Sgmcgarry.Fn PCI_VENDOR "pcireg_t id" 1728752c231Sgmcgarry.Ft int 1738752c231Sgmcgarry.Fn PCI_PRODUCT "pcireg_t id" 1748752c231Sgmcgarry.Ft int 1758752c231Sgmcgarry.Fn PCI_REVISION "pcireg_t id" 1768752c231Sgmcgarry.Sh DESCRIPTION 1778752c231SgmcgarryThe machine-independent 1788752c231Sgmcgarry.Nm 1798752c231Sgmcgarrysubsystem provides support for PCI devices. 1808752c231Sgmcgarry.Pp 1818752c231SgmcgarryThe PCI bus was initially developed by Intel in the early 1990's to 182770eef21Swizreplace the ISA bus for interfacing with their Pentium processor. 183770eef21SwizThe PCI specification is widely regarded as well designed, and the 184770eef21SwizPCI bus has found widespread acceptance in machines ranging from 185770eef21SwizApple's PowerPC-based systems to Sun's UltraSPARC-based machines. 1868752c231Sgmcgarry.Pp 1879c540fd0ShubertfThe PCI bus is a multiplexed bus, allowing addresses and data on the same 188770eef21Swizpins for a reduced number of pins. 189770eef21SwizData transfers can be 8-bit, 16-bit or 32-bit. 190770eef21SwizA 64-bit extended PCI bus is also defined. 191770eef21SwizMulti-byte transfers are little-endian. 192770eef21SwizThe PCI bus operates up to 33MHz and any device on the bus can be 193770eef21Swizthe bus master. 1948752c231Sgmcgarry.Pp 1958752c231SgmcgarryAGP is a version of PCI optimised for high-throughput data rates, 1968752c231Sgmcgarryparticularly for accelerated frame buffers. 1978752c231Sgmcgarry.Pp 1988752c231SgmcgarryThe PCI bus is a "plug and play" bus, in the sense that devices can be 199770eef21Swizconfigured dynamically by software. 200770eef21SwizThe PCI interface chip on a PCI device bus presents a small window 201770eef21Swizof registers into the PCI configuration space. 202770eef21SwizThese registers contain information about the device such as the vendor 203770eef21Swizand a product ID. 204770eef21SwizThe configuration registers can also be written to by software to alter 205770eef21Swizhow the device interfaces to the PCI bus. 206770eef21SwizAn important register in the configuration space is the Base Address 207770eef21SwizRegister (BAR). 208770eef21SwizThe BAR is written to by software to map the device registers into a 209770eef21Swizwindow of processor address space. 210770eef21SwizOnce this mapping is done, the device registers can be accessed relative 211770eef21Swizto the base address. 2128752c231Sgmcgarry.Sh DATA TYPES 2138752c231SgmcgarryDrivers for devices attached to the 2148752c231Sgmcgarry.Nm 2158752c231Sgmcgarrywill make use of the following data types: 2168752c231Sgmcgarry.Bl -tag -width compact 2178752c231Sgmcgarry.It Fa pcireg_t 2188752c231SgmcgarryConfiguration space register. 2198752c231Sgmcgarry.It Fa pci_chipset_tag_t 2208752c231SgmcgarryChipset tag for the PCI bus. 2218752c231Sgmcgarry.It Fa pcitag_t 2228752c231SgmcgarryConfiguration tag describing the location and function of the PCI 223770eef21Swizdevice. 224770eef21SwizIt contains the tuple 2258752c231Sgmcgarry.Ao 2268752c231Sgmcgarrybus, device, function 2278752c231Sgmcgarry.Ac . 2288752c231Sgmcgarry.It Fa pci_intr_handle_t 2298752c231SgmcgarryThe opaque handle describing an established interrupt handler. 2308752c231Sgmcgarry.It Fa struct pci_attach_args 231770eef21SwizDevices have their identity recorded in this structure. 232770eef21SwizIt contains the following members: 2338752c231Sgmcgarry.Bd -literal 2348752c231Sgmcgarry bus_space_tag_t pa_iot; /* pci i/o space tag */ 2358752c231Sgmcgarry bus_space_tag_t pa_memt; /* pci mem space tag */ 2368752c231Sgmcgarry bus_dma_tag_t pa_dmat; /* DMA tag */ 2378752c231Sgmcgarry pci_chipset_tag_t pa_pc; 2388752c231Sgmcgarry int pa_flags; /* flags */ 2398752c231Sgmcgarry pcitag_t pa_tag; 2408752c231Sgmcgarry pcireg_t pa_id; 2418752c231Sgmcgarry pcireg_t pa_class; 2428752c231Sgmcgarry.Ed 243439b200fSjmcneill.It Fa struct pci_conf_state 2442fe0d840SwizStores the PCI configuration state of a device. 2452fe0d840SwizIt contains the following member: 246439b200fSjmcneill.Bd -literal 247439b200fSjmcneill pcireg_t reg[16]; /* pci conf register */ 248439b200fSjmcneill.Ed 249a5b1adfdSdyoung.It Fa struct pci_overrides 250a5b1adfdSdyoungStores pointers to functions that override the architecture's 251a5b1adfdSdyoungdefault 2523562b7c5Swiz.Nm 253a5b1adfdSdyoungand 254a5b1adfdSdyoung.Xr pci_intr 9 255a5b1adfdSdyoungimplementation. 256a5b1adfdSdyoungIt contains the following members: 257a5b1adfdSdyoung.Bd -literal 258a5b1adfdSdyoung pcireg_t (*ov_conf_read)(void *, 259a5b1adfdSdyoung pci_chipset_tag_t, pcitag_t, int); 260a5b1adfdSdyoung void (*ov_conf_write)(void *, 261a5b1adfdSdyoung pci_chipset_tag_t, pcitag_t, int, pcireg_t); 262a5b1adfdSdyoung int (*ov_intr_map)(void *, 26338c5ac17Sdyoung const struct pci_attach_args *, pci_intr_handle_t *); 264a5b1adfdSdyoung const char *(*ov_intr_string)(void *, 265a5b1adfdSdyoung pci_chipset_tag_t, pci_intr_handle_t); 266a5b1adfdSdyoung const struct evcnt *(*ov_intr_evcnt)(void *, 267a5b1adfdSdyoung pci_chipset_tag_t, pci_intr_handle_t); 268a5b1adfdSdyoung void *(*ov_intr_establish)(void *, 269a5b1adfdSdyoung pci_chipset_tag_t, pci_intr_handle_t, 270a5b1adfdSdyoung int, int (*)(void *), void *); 271a5b1adfdSdyoung void (*ov_intr_disestablish)(void *, 272a5b1adfdSdyoung pci_chipset_tag_t, void *); 273a5b1adfdSdyoung pcitag_t (*ov_make_tag)(void *, 274a5b1adfdSdyoung pci_chipset_tag_t, int, int, int); 275a5b1adfdSdyoung void (*ov_decompose_tag)(void *, 276a5b1adfdSdyoung pci_chipset_tag_t, pcitag_t, int *, int *, int *); 277a5b1adfdSdyoung.Ed 2788752c231Sgmcgarry.El 2798752c231Sgmcgarry.Sh FUNCTIONS 2808752c231Sgmcgarry.Bl -tag -width compact 2817d12941cSdyoung.It Fn pci_bus_devorder "pc" "bus" "devs" "maxdevs" 2827d12941cSdyoungTell how many devices a PCI bus driver should probe 2837d12941cSdyoungand in what order. 2847d12941cSdyoungIf 2857d12941cSdyoung.Fa maxdevs 2867d12941cSdyoungis less than or equal to zero, return 0 and 2877d12941cSdyoungdo not modify 2887d12941cSdyoung.Fa devs . 2897d12941cSdyoungOtherwise, return 2907d12941cSdyoung.Fa maxdevs 2917d12941cSdyoungor the number of devices on 2927d12941cSdyoung.Fa bus 2937d12941cSdyoungto probe, whichever is less, and copy to 2947d12941cSdyoung.Fa devs 2957d12941cSdyoungeach of the PCI device numbers to probe in the order that they 2967d12941cSdyoungshould be probed. 2977d12941cSdyoung.Fn pci_bus_devorder 2987d12941cSdyoungwill not copy more than 2997d12941cSdyoung.Fa maxdevs 3007d12941cSdyoungdevice numbers to 3017d12941cSdyoung.Fa devs . 3026655a8f4Scegger.It Fn pci_activate "pc" "tag" "dev" "fun" 3034f29764cSchristosAttempt to bring the device to state D0. 3044f29764cSchristosIf the device is not in the D0 state call 3054f29764cSchristos.Fa fun 3064f29764cSchristosto restore its state. 3074f29764cSchristosIf 3084f29764cSchristos.Fa fun 3094f29764cSchristosis 3104f29764cSchristos.Dv NULL 3114f29764cSchristosthen restoring from state D3 is going to fail. 312a5b1adfdSdyoung.It Fn pci_chipset_tag_create "opc" "present" "ov" "ctx" "pcp" 313a5b1adfdSdyoungCreate a copy of the tag 314a5b1adfdSdyoung.Fa opc 315a5b1adfdSdyoungat 316a5b1adfdSdyoung.Fa *pcp . 317a5b1adfdSdyoungExcept for the behavior 318a5b1adfdSdyoungoverridden by 319a5b1adfdSdyoung.Fa ov , 320a5b1adfdSdyoung.Fa *pcp 321a5b1adfdSdyounginherits the behavior of 322a5b1adfdSdyoung.Fa opc 323a5b1adfdSdyoungunder 324a5b1adfdSdyoung.Nm 325a5b1adfdSdyoungcalls. 326a5b1adfdSdyoung.Pp 327a5b1adfdSdyoung.Fa ov 328a5b1adfdSdyoungcontains function pointers corresponding to 329a5b1adfdSdyoung.Nm 330a5b1adfdSdyoungroutines. 331a5b1adfdSdyoungEach function pointer has a corresponding bit in 332a5b1adfdSdyoung.Fa present , 333a5b1adfdSdyoungand if that bit is 1, the function pointer overrides the corresponding 334a5b1adfdSdyoung.Nm 335a5b1adfdSdyoungcall for the new tag. 336a5b1adfdSdyoungAny combination of these bits may be set in 337a5b1adfdSdyoung.Fa present : 338a5b1adfdSdyoung.Pp 339a5b1adfdSdyoung.Bl -tag -width PCI_OVERRIDE_INTR_DISESTABLISH -compact 340a5b1adfdSdyoung.It Dv PCI_OVERRIDE_CONF_READ 341a5b1adfdSdyoung.It Dv PCI_OVERRIDE_CONF_WRITE 342a5b1adfdSdyoung.It Dv PCI_OVERRIDE_INTR_MAP 343a5b1adfdSdyoung.It Dv PCI_OVERRIDE_INTR_STRING 344a5b1adfdSdyoung.It Dv PCI_OVERRIDE_INTR_EVCNT 345a5b1adfdSdyoung.It Dv PCI_OVERRIDE_INTR_ESTABLISH 346a5b1adfdSdyoung.It Dv PCI_OVERRIDE_INTR_DISESTABLISH 347a5b1adfdSdyoung.It Dv PCI_OVERRIDE_MAKE_TAG 348a5b1adfdSdyoung.It Dv PCI_OVERRIDE_DECOMPOSE_TAG 349a5b1adfdSdyoung.El 350a5b1adfdSdyoung.Pp 351a5b1adfdSdyoung.Fn pci_chipset_tag_create 352a5b1adfdSdyoungdoes not copy 353a5b1adfdSdyoung.Fa ov . 354a5b1adfdSdyoungAfter a new tag is created 355a5b1adfdSdyoungby 356a5b1adfdSdyoung.Fn pci_chipset_tag_create , 357a5b1adfdSdyoung.Fa ov 358a5b1adfdSdyoungmust not be destroyed until after the 359a5b1adfdSdyoungtag is destroyed by 360a5b1adfdSdyoung.Fn pci_chipset_tag_destroy . 361a5b1adfdSdyoung.Pp 362a5b1adfdSdyoungThe first argument of every override-function is a 363a5b1adfdSdyoung.Vt "void *" , 364a5b1adfdSdyoungand 365a5b1adfdSdyoung.Fa ctx 366a5b1adfdSdyoungis passed in that argument. 367a5b1adfdSdyoung.Pp 368a5b1adfdSdyoungReturn 0 if the call succeeds. 369a5b1adfdSdyoungReturn 370a5b1adfdSdyoung.Dv EOPNOTSUPP 371a5b1adfdSdyoungif the architecture does not support overrides. 372a5b1adfdSdyoungReturn 373a5b1adfdSdyoung.Dv EINVAL 374a5b1adfdSdyoungif 375a5b1adfdSdyoung.Fa present 376a5b1adfdSdyoungis 0, if 377a5b1adfdSdyoung.Fa ov 378a5b1adfdSdyoungis 379a5b1adfdSdyoung.Dv NULL , 380a5b1adfdSdyoungor if 381a5b1adfdSdyoung.Fa present 382a5b1adfdSdyoungindicates that an override is present, but the corresponding override 383a5b1adfdSdyoungin 384a5b1adfdSdyoung.Fa ov 385a5b1adfdSdyoungis 386a5b1adfdSdyoung.Dv NULL . 387a5b1adfdSdyoung.Pp 388a5b1adfdSdyoungIf the call does not succeed, 389a5b1adfdSdyoung.Fa *pcp 390a5b1adfdSdyoungis undefined. 391a5b1adfdSdyoung.It Fn pci_chipset_tag_destroy "pc" 392a5b1adfdSdyoungDestroy a tag, 393a5b1adfdSdyoung.Fa pc , 394a5b1adfdSdyoungcreated by a prior call to 395a5b1adfdSdyoung.Fn pci_chipset_tag_create . 396a5b1adfdSdyoungIf 397a5b1adfdSdyoung.Fa pc 398a5b1adfdSdyoungwas not created by 399a5b1adfdSdyoung.Fn pci_chipset_tag_create , 400a5b1adfdSdyoungresults are undefined. 401a5b1adfdSdyoungIf 402a5b1adfdSdyoung.Fa pc 403a5b1adfdSdyoungwas already destroyed, results are undefined. 4048752c231Sgmcgarry.It Fn pci_conf_read "pc" "tag" "reg" 4058752c231SgmcgarryRead from register 4068752c231Sgmcgarry.Fa reg 407770eef21Swizin PCI configuration space. 408770eef21SwizThe argument 4098752c231Sgmcgarry.Fa tag 4108752c231Sgmcgarryis the PCI tag for the current device attached to PCI chipset 4118752c231Sgmcgarry.Fa pc . 4128752c231Sgmcgarry.It Fn pci_conf_write "pc" "tag" "reg" "val" 4138752c231SgmcgarryWrite to register 4148752c231Sgmcgarry.Fa reg 415770eef21Swizin PCI configuration space. 416770eef21SwizThe argument 4178752c231Sgmcgarry.Fa tag 4188752c231Sgmcgarryis the PCI tag for the current device attached to PCI chipset 4198752c231Sgmcgarry.Fa pc . 4208752c231Sgmcgarry.It Fn pci_conf_print "pc" "tag" "func" 4218752c231SgmcgarryPrint out most of the registers in the PCI configuration for the 422770eef21Swizdevice. 423770eef21SwizThe argument 4248752c231Sgmcgarry.Fa tag 4258752c231Sgmcgarryis the PCI tag for the current device attached to PCI chipset 4268752c231Sgmcgarry.Fa pc . 4278752c231SgmcgarryThe argument 4288752c231Sgmcgarry.Fa func 4298752c231Sgmcgarryis a function called by 4308752c231Sgmcgarry.Fn pci_conf_print 431770eef21Swizto print the device-dependent registers. 432770eef21SwizThis function is only useful for driver development and is usually 433770eef21Swizwrapped in pre-processor declarations. 434439b200fSjmcneill.It Fn pci_conf_capture "pc" "tag" "pcs" 435439b200fSjmcneillCapture PCI configuration space into structure 436e3b661b1Swiz.Fa pcs . 437e3b661b1SwizThe argument 438439b200fSjmcneill.Fa tag 439439b200fSjmcneillis the PCI tag for the current device attached to the PCI 440439b200fSjmcneillchipset 441439b200fSjmcneill.Fa pc . 442439b200fSjmcneill.It Fn pci_conf_restore "pc" "tag" "pcs" 443439b200fSjmcneillRestores PCI configuration space from structure 444e3b661b1Swiz.Fa pcs . 445e3b661b1SwizThe argument 446439b200fSjmcneill.Fa tag 447439b200fSjmcneillis the PCI tag for the current device attached to the PCI 448439b200fSjmcneillchipset 449439b200fSjmcneill.Fa pc . 450f1ad946aSgmcgarry.It Fn pci_find_device "pa" "func" 451770eef21SwizFind a device using a match function on all probed busses. 452770eef21SwizThe argument 453f1ad946aSgmcgarry.Fa func 454f1ad946aSgmcgarryis called by 455f1ad946aSgmcgarry.Fn pci_find_device 456770eef21Swizto match a device. 457770eef21SwizThe argument 458f1ad946aSgmcgarry.Fa pa 459f1ad946aSgmcgarryis filled in if the device is matched. 460f1ad946aSgmcgarry.Fn pci_find_device 461770eef21Swizreturns 1 if the device is matched, and zero otherwise. 4620efea177SadThis function is specifically for use by kernel modules 463f1ad946aSgmcgarryand its use otherwise is strongly discouraged. 4648752c231Sgmcgarry.It Fn pci_get_capability "pc" "tag" "capid" "offsetp" "valuep" 4658752c231SgmcgarryParse the device capability list in configuration space looking for 4668752c231Sgmcgarrycapability 4678752c231Sgmcgarry.Fa capid . 4688752c231SgmcgarryIf 4698752c231Sgmcgarry.Fa offsetp 4707b9a7472Swizis not 4717b9a7472Swiz.Dv NULL , 4727b9a7472Swizthe register offset in configuration space is returned in 4738752c231Sgmcgarry.Fa offsetp . 4748752c231SgmcgarryIf 4758752c231Sgmcgarry.Fa valuep 4767b9a7472Swizis not 4777b9a7472Swiz.Dv NULL , 4787b9a7472Swizthe value of the capability is returned in 4798752c231Sgmcgarry.Fa valuep . 4808752c231SgmcgarryThe argument 4818752c231Sgmcgarry.Fa tag 4828752c231Sgmcgarryis the PCI tag for the current device attached to PCI chipset 4838752c231Sgmcgarry.Fa pc . 484770eef21SwizThis function returns 1 if the capability was found. 485770eef21SwizIf the capability was not found, it returns zero, and 4868752c231Sgmcgarry.Fa offsetp 4878752c231Sgmcgarryand 4888752c231Sgmcgarry.Fa valuep 4898752c231Sgmcgarryremain unchanged. 490f60a13e9Sknakahara.It Fn pci_get_ht_capability "pc" "tag" "capid" "offsetp" "valuep" 491f60a13e9SknakaharaParse the device capability list in HyperTransport configuration 492f60a13e9Sknakaharaspace looking for capability 493f60a13e9Sknakahara.Fa capid . 494f60a13e9SknakaharaIf 495f60a13e9Sknakahara.Fa offsetp 4967b9a7472Swizis not 4977b9a7472Swiz.Dv NULL , 4987b9a7472Swizthe register offset in configuration space is returned in 499f60a13e9Sknakahara.Fa offsetp . 500f60a13e9SknakaharaIf 501f60a13e9Sknakahara.Fa valuep 5027b9a7472Swizis not 5037b9a7472Swiz.Dv NULL , 5047b9a7472Swizthe value of the capability is returned in 505f60a13e9Sknakahara.Fa valuep . 506f60a13e9SknakaharaThe argument 507f60a13e9Sknakahara.Fa tag 508f60a13e9Sknakaharais the PCI tag for the current device attached to PCI chipset 509f60a13e9Sknakahara.Fa pc . 510f60a13e9SknakaharaThis function returns 1 if the capability was found. 511f60a13e9SknakaharaIf the capability was not found, it returns zero, and 512f60a13e9Sknakahara.Fa offsetp 513f60a13e9Sknakaharaand 514f60a13e9Sknakahara.Fa valuep 515f60a13e9Sknakahararemain unchanged. 516605f564fSmsaitoh.It Fn pci_get_ext_capability "pc" "tag" "capid" "offsetp" "valuep" 517605f564fSmsaitohParse the device capability list in extended configuration space looking for 518605f564fSmsaitohcapability 519605f564fSmsaitoh.Fa capid . 520605f564fSmsaitohIf 521605f564fSmsaitoh.Fa offsetp 522605f564fSmsaitohis not 523605f564fSmsaitoh.Dv NULL , 524605f564fSmsaitohthe register offset in extended configuration space is returned in 525605f564fSmsaitoh.Fa offsetp . 526605f564fSmsaitohIf 527605f564fSmsaitoh.Fa valuep 528605f564fSmsaitohis not 529605f564fSmsaitoh.Dv NULL , 530605f564fSmsaitohthe value of the capability is returned in 531605f564fSmsaitoh.Fa valuep . 532605f564fSmsaitohThe argument 533605f564fSmsaitoh.Fa tag 534605f564fSmsaitohis the PCI tag for the current device attached to PCI chipset 535605f564fSmsaitoh.Fa pc . 536605f564fSmsaitohThis function returns 1 if the capability was found. 537605f564fSmsaitohIf the capability was not found, it returns zero, and 538605f564fSmsaitoh.Fa offsetp 539605f564fSmsaitohand 540605f564fSmsaitoh.Fa valuep 541605f564fSmsaitohremain unchanged. 542*99199cfcSjmcneill.It Fn pci_get_segment "pc" 543*99199cfcSjmcneillReturn the PCI segment number for PCI chipset 544*99199cfcSjmcneill.Fa pc . 545*99199cfcSjmcneillThis machine-dependent function is only available if 546*99199cfcSjmcneill.Dv __HAVE_PCI_GET_SEGMENT 547*99199cfcSjmcneillis defined in the header 548*99199cfcSjmcneill.In machine/pci_machdep.h . 5498752c231Sgmcgarry.It Fn pci_mapreg_type "pc" "tag" "reg" 5508752c231SgmcgarryInterrogates the Base Address Register (BAR) in configuration space 5518752c231Sgmcgarryspecified by 5528752c231Sgmcgarry.Fa reg 553770eef21Swizand returns the default (or current) mapping type. 554770eef21SwizValid returns values are: 5558752c231Sgmcgarry.Bl -tag -width compact 5562fe0d840Swiz.It Dv PCI_MAPREG_TYPE_IO 5578752c231SgmcgarryThe mapping is to I/O address space. 5582fe0d840Swiz.It Dv PCI_MAPREG_TYPE_MEM 5598752c231SgmcgarryThe mapping is to memory address space. 5602fe0d840Swiz.It Dv PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_64BIT 5618752c231SgmcgarryThe mapping is to 64-bit memory address space. 5622fe0d840Swiz.It Dv PCI_MAPREG_TYPE_ROM 5632fe0d840SwizThe mapping is to ROM. 5642fe0d840SwizNote that in the current implementation, 5652fe0d840Swiz.Dv PCI_MAPREG_TYPE_ROM 5662fe0d840Swizhas the same numeric value as 5672fe0d840Swiz.Dv PCI_MAPREG_TYPE_MEM . 5688752c231Sgmcgarry.El 569fa0d64afSwiz.Pp 5708752c231SgmcgarryThe argument 5718752c231Sgmcgarry.Fa tag 5728752c231Sgmcgarryis the PCI tag for the current device attached to PCI chipset 5738752c231Sgmcgarry.Fa pc . 574b93a29cdSwiz.It Fn pci_mapreg_map "pa" "reg" "type" "busflags" "tagp" "handlep" "basep" "sizep" 5758752c231SgmcgarryMaps the register windows for the device into kernel virtual address 576770eef21Swizspace. 577770eef21SwizThis function is generally only called during the driver attach step 578770eef21Swizand takes a pointer to the 5798752c231Sgmcgarry.Em struct pci_attach_args 5808752c231Sgmcgarryin 5818752c231Sgmcgarry.Fa pa . 5828752c231SgmcgarryThe physical address of the mapping is in the Base Address Register 5838752c231Sgmcgarry(BAR) in configuration space specified by 5848752c231Sgmcgarry.Fa reg . 5858752c231SgmcgarryValid values for the type of mapping 5860f93dcddSmrg.Fa type , 5870f93dcddSmrgwhich can be obtained from 5880f93dcddSmrg.Fn pci_mapreg_type , 5898752c231Sgmcgarryare: 5908752c231Sgmcgarry.Bl -tag -width compact 5912fe0d840Swiz.It Dv PCI_MAPREG_TYPE_IO 5928752c231SgmcgarryThe mapping should be to I/O address space. 5932fe0d840Swiz.It Dv PCI_MAPREG_TYPE_MEM 5948752c231SgmcgarryThe mapping should be to memory address space. 5950f93dcddSmrg.It Dv PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_64BIT 5960f93dcddSmrgThe mapping should be to 64-bit memory address space. 5972fe0d840Swiz.It Dv PCI_MAPREG_TYPE_ROM 5982fe0d840SwizThe mapping is to access ROM. 5992fe0d840SwizThis type of mapping is only permitted when the value for 6009342d0e1Sgdamore.Fa reg 6012fe0d840Swizis 6022fe0d840Swiz.Dv PCI_MAPREG_ROM . 6038752c231Sgmcgarry.El 604fa0d64afSwiz.Pp 6058752c231SgmcgarryThe argument 6068752c231Sgmcgarry.Fa busflags 6078752c231Sgmcgarryare bus-space flags passed to 6088752c231Sgmcgarry.Fn bus_space_map 6098752c231Sgmcgarryto perform the mapping (see 6108752c231Sgmcgarry.Xr bus_space 9 ) . 6118752c231SgmcgarryThe bus-space tag and handle for the mapped register window are 6128752c231Sgmcgarryreturned in 6138752c231Sgmcgarry.Fa tagp 6148752c231Sgmcgarryand 6158752c231Sgmcgarry.Fa handlep 616770eef21Swizrespectively. 617770eef21SwizThe bus-address and size of the mapping are returned in 6188752c231Sgmcgarry.Fa basep 6198752c231Sgmcgarryand 6208752c231Sgmcgarry.Fa sizep 621770eef21Swizrespectively. 622770eef21SwizIf any of 6238752c231Sgmcgarry.Fa tagp , 6248752c231Sgmcgarry.Fa handlep , 6258752c231Sgmcgarry.Fa basep , 6268752c231Sgmcgarryor 6278752c231Sgmcgarry.Fa sizep 6287b9a7472Swizare 6297b9a7472Swiz.Dv NULL 6307b9a7472Swizthen 6318752c231Sgmcgarry.Fn pci_mapreg_map 632770eef21Swizdoes not define their return value. 633770eef21SwizThis function returns zero on success and non-zero on error. 6348752c231Sgmcgarry.It Fn pci_mapreg_info "pc" "tag" "reg" "type" "basep" "sizep" "flagsp" 6358752c231SgmcgarryPerforms the same operations as 6368752c231Sgmcgarry.Fn pci_mapreg_map 6378752c231Sgmcgarrybut doesn't actually map the register window into kernel virtual 638770eef21Swizaddress space. 639770eef21SwizReturns the bus-address, size and bus flags in 6408752c231Sgmcgarry.Fa basep , 6418752c231Sgmcgarry.Fa sizep 6428752c231Sgmcgarryand 6438752c231Sgmcgarry.Fa flagsp 644770eef21Swizrespectively. 645770eef21SwizThese return values can be used by 6468752c231Sgmcgarry.Fn bus_space_map 6478752c231Sgmcgarryto actually map the register window into kernel virtual address space. 6488752c231SgmcgarryThis function is useful for setting up the registers in configuration 6498752c231Sgmcgarryspace and deferring the mapping to a later time, such as in a 6508752c231Sgmcgarrybus-independent attachment routine. 6518752c231Sgmcgarry.Fa pci_mapreg_info 6528752c231Sgmcgarryreturns zero on success and non-zero on failure. 653f0d12e0dSgdamore.It Fn pci_find_rom "pa" "bst" "bsh" "code" "handlep" "sizep" 654f0d12e0dSgdamoreLocates a suitable ROM image within a PCI expansion ROM previously mapped with 655f0d12e0dSgdamore.Fn pci_mapreg_map 656f0d12e0dSgdamoreand creates a subregion for it with 657f0d12e0dSgdamore.Fn bus_space_subregion . 658f0d12e0dSgdamoreThe 659f0d12e0dSgdamore.Fa bst 660f0d12e0dSgdamoreand 661f0d12e0dSgdamore.Fa bsh 662daeef781Swizarguments are the bus tag and handle obtained with the prior call to 663f0d12e0dSgdamore.Fn pci_mapreg_map . 664f0d12e0dSgdamoreValid values for the image type 665f0d12e0dSgdamore.Fa code 666f0d12e0dSgdamoreare: 667f0d12e0dSgdamore.Bl -tag -width compact 6682fe0d840Swiz.It Dv PCI_ROM_CODE_TYPE_X86 669f0d12e0dSgdamoreFind a ROM image containing i386 executable code for use by PC BIOS. 6702fe0d840Swiz.It Dv PCI_ROM_CODE_TYPE_OFW 6712fe0d840SwizFind a ROM image containing Forth code for use by Open Firmware. 6722fe0d840Swiz.It Dv PCI_ROM_CODE_TYPE_HPPA 673f0d12e0dSgdamoreFind a ROM image containing HP PA/RISC executable code. 674f0d12e0dSgdamore.El 675daeef781Swiz.Pp 676f0d12e0dSgdamoreThe created subregion will cover the entire selected ROM image, including 677f0d12e0dSgdamoreheader data. 678f0d12e0dSgdamoreThe handle to this subregion is returned in 679f0d12e0dSgdamore.Fa handlep . 680f0d12e0dSgdamoreThe size of the image (and the corresponding subregion) is returned in 681f0d12e0dSgdamore.Fa sizep . 682f0d12e0dSgdamoreThis function can only be used with expansion ROMs located at the 6832fe0d840Swiz.Dv PCI_MAPREG_ROM 6842fe0d840Swizbase address register (BAR). 6858752c231Sgmcgarry.It Fn pci_intr_map "pa" "ih" 6868752c231SgmcgarrySee 6878752c231Sgmcgarry.Xr pci_intr 9 . 6888752c231Sgmcgarry.It Fn pci_intr_string "pc" "ih" 6898752c231SgmcgarrySee 6908752c231Sgmcgarry.Xr pci_intr 9 . 6918752c231Sgmcgarry.It Fn pci_intr_evcnt "pc" "ih" 6928752c231SgmcgarrySee 6938752c231Sgmcgarry.Xr pci_intr 9 . 6948752c231Sgmcgarry.It Fn pci_intr_establish "pc" "ih" "level" "handler" "arg" 6958752c231SgmcgarrySee 6968752c231Sgmcgarry.Xr pci_intr 9 . 697d7a314d2Sknakahara.It Fn pci_intr_establish_xname "pc" "ih" "level" "handler" "arg" "xname" 698d7a314d2SknakaharaSee 699d7a314d2Sknakahara.Xr pci_intr 9 . 7008752c231Sgmcgarry.It Fn pci_intr_disestablish "pc" "ih" 7018752c231SgmcgarrySee 7028cfe831aSrin.Xr pci_intr 9 . 703d7a314d2Sknakahara.It Fn pci_intr_type "pc" "ih" 704d7a314d2SknakaharaSee 7058cfe831aSrin.Xr pci_msi 9 . 706d7a314d2Sknakahara.It Fn pci_intr_setattr "pc" "ih" "attr" "data" 707d7a314d2SknakaharaSee 7088752c231Sgmcgarry.Xr pci_intr 9 . 709704898a9Sgmcgarry.It Fn pci_set_powerstate "pc" "tag" "newstate" 710770eef21SwizSet power state of the device to newstate. 711770eef21SwizValid values for 712704898a9Sgmcgarry.Fa newstate 713704898a9Sgmcgarryare: 714704898a9Sgmcgarry.Pp 7154f29764cSchristos.Bl -tag -width PCI_PMCSR_STATE_D0 -compact 7164f29764cSchristos.It Dv PCI_PMCSR_STATE_D0 7174f29764cSchristos.It Dv PCI_PMCSR_STATE_D1 7184f29764cSchristos.It Dv PCI_PMCSR_STATE_D2 7194f29764cSchristos.It Dv PCI_PMCSR_STATE_D3 720704898a9Sgmcgarry.El 72135c2a3d2Swiz.It Fn pci_get_powerstate "pc" "tag" "state" 722704898a9SgmcgarryGet current power state of the device. 7235472a338Sthorpej.It Fn pci_vpd_read "pc" "tag" "offset" "count" "data" 7245472a338SthorpejRead 7255472a338Sthorpej.Fa count 7265472a338Sthorpej32-bit words of Vital Product Data for the device starting at offset 7275472a338Sthorpej.Fa offset 7285472a338Sthorpejinto the buffer pointed to by 7295472a338Sthorpej.Fa data . 730d3de02abSwizReturns 0 on success or non-zero if the device has no Vital Product Data 731d3de02abSwizcapability or if reading the Vital Product Data fails. 7325472a338Sthorpej.It Fn pci_vpd_write "pc" "tag" "offset" "count" "data" 7335472a338SthorpejWrite 7345472a338Sthorpej.Fa count 7355472a338Sthorpej32-bit words of Vital Product Data for the device starting at offset 7365472a338Sthorpej.Fa offset 7375472a338Sthorpejfrom the buffer pointed to by 7385472a338Sthorpej.Fa data . 7395472a338SthorpejReturns 0 on success or non-zero if the device has no Vital Product Data 740d3de02abSwizcapability of if writing the Vital Product Data fails. 7418752c231Sgmcgarry.It Fn pci_make_tag "pc" "bus" "device" "function" 7428752c231SgmcgarryCreate a new PCI tag for the PCI device specified by the tuple 7438752c231Sgmcgarry.Ao 7448752c231Sgmcgarrybus, device, function 7458752c231Sgmcgarry.Ac . 746770eef21SwizThis function is not useful to the usual PCI device driver. 747770eef21SwizIt is generally used by drivers of multi-function devices when 748770eef21Swizattaching other PCI device drivers to each function. 7498752c231Sgmcgarry.It Fn pci_decompose_tag "pc" "tag" "busp" "devicep" "fnp" 7508752c231SgmcgarryDecompose the PCI tag 7518752c231Sgmcgarry.Fa tag 7528752c231Sgmcgarrygenerated by 7538752c231Sgmcgarry.Fn pci_make_tag 7548752c231Sgmcgarryinto its 7558752c231Sgmcgarry.Ao 7568752c231Sgmcgarrybus, device, function 7578752c231Sgmcgarry.Ac 7588752c231Sgmcgarrytuple. 7598752c231Sgmcgarry.It Fn pci_findvendor "id" 7608752c231SgmcgarryReturn the string of the vendor name for the device specified by 7618752c231Sgmcgarry.Fa id . 7629bfa4ce9Skleink.It Fn pci_devinfo "id" "class" "show" "cp" "len" 7638752c231SgmcgarryReturns the description string from the in-kernel PCI database for the 7648752c231Sgmcgarrydevice described by 7658752c231Sgmcgarry.Fa id 7668752c231Sgmcgarryand 7678752c231Sgmcgarry.Fa class . 7688752c231SgmcgarryThe description string is returned in 7699bfa4ce9Skleink.Fa cp ; 7709bfa4ce9Skleinkthe size of that storage is given in 7719bfa4ce9Skleink.Fa len . 7728752c231SgmcgarryThe argument 7738752c231Sgmcgarry.Fa show 7748752c231Sgmcgarryspecifies whether the PCI subsystem should report the string to the 7758752c231Sgmcgarryconsole. 77675699fcfSdrochner.It Fn pci_aprint_devinfo "pa" "naive" 77775699fcfSdrochnerPrint device information to the console and system log, using the 77875699fcfSdrochner.Xr aprint_normal 9 77975699fcfSdrochnerand 78075699fcfSdrochner.Xr aprint_naive 9 78175699fcfSdrochnerfunctions. 78275699fcfSdrochnerFor the device information, the 78375699fcfSdrochner.Dq pci_devinfo 78475699fcfSdrochnerfunction above is used, or the 78575699fcfSdrochner.Ar naive 78675699fcfSdrochnerargument in the 78775699fcfSdrochner.Dq AB_QUIET 78875699fcfSdrochnercase. 78975699fcfSdrochnerThis function is intended to be used early in device attach. 7908752c231Sgmcgarry.It Fn PCI_VENDOR "id" 7918752c231SgmcgarryReturn the PCI vendor id for device 7928752c231Sgmcgarry.Fa id . 7938752c231Sgmcgarry.It Fn PCI_PRODUCT "id" 7948752c231SgmcgarryReturn the PCI product id for device 7958752c231Sgmcgarry.Fa id . 7968752c231Sgmcgarry.It Fn PCI_REVISION "id" 7978752c231SgmcgarryReturn the PCI product revision for device 7988752c231Sgmcgarry.Fa id . 7998752c231Sgmcgarry.El 8008752c231Sgmcgarry.Sh AUTOCONFIGURATION 8018752c231SgmcgarryDuring autoconfiguration, a 8028752c231Sgmcgarry.Nm 8038752c231Sgmcgarrydriver will receive a pointer to 8048752c231Sgmcgarry.Fa struct pci_attach_args 805770eef21Swizdescribing the device attaches to the PCI bus. 806770eef21SwizDrivers match the device using the 8078752c231Sgmcgarry.Fa pa_id 8088752c231Sgmcgarrymember using 8098752c231Sgmcgarry.Fn PCI_VENDOR . 8108752c231Sgmcgarry.Fn PCI_PRODUCT 8118752c231Sgmcgarryand 8128752c231Sgmcgarry.Fn PCI_REVISION . 8138752c231Sgmcgarry.Pp 8148752c231SgmcgarryDuring the driver attach step, drivers can read the device 8158752c231Sgmcgarryconfiguration space using 8168752c231Sgmcgarry.Fn pci_conf_read . 8178752c231SgmcgarryThe meaning attached to registers in the PCI configuration space are 8188752c231Sgmcgarrydevice-dependent, but will usually contain physical addresses of the 819770eef21Swizdevice register windows. 820770eef21SwizDevice options can also be stored into the PCI configuration space using 8218752c231Sgmcgarry.Fn pci_conf_write . 8228752c231SgmcgarryFor example, the driver can request support for bus-mastering DMA by 8238752c231Sgmcgarrywriting the option to the PCI configuration space. 8248752c231Sgmcgarry.Pp 8258752c231SgmcgarryDevice capabilities can be queried using 8268752c231Sgmcgarry.Fn pci_get_capability , 8278752c231Sgmcgarryand returns device-specific information which can be found in the PCI 8288752c231Sgmcgarryconfiguration space to alter device operation. 8298752c231Sgmcgarry.Pp 8308752c231SgmcgarryAfter reading the physical addresses of the device register windows 8318752c231Sgmcgarryfrom configuration space, these windows must be mapped into kernel 8328752c231Sgmcgarryvirtual address space using 8338752c231Sgmcgarry.Fn pci_mapreg_map . 8348752c231SgmcgarryDevice registers can now be accessed using the standard bus-space API 8358752c231Sgmcgarry(see 8368752c231Sgmcgarry.Xr bus_space 9 ) . 8378752c231Sgmcgarry.Pp 8388752c231SgmcgarryDetails of using PCI interrupts is described in 8398752c231Sgmcgarry.Xr pci_intr 9 . 8408752c231Sgmcgarry.Sh DMA SUPPORT 841770eef21SwizThe PCI bus supports bus-mastering operations from any device on the bus. 842770eef21SwizThe DMA facilities are accessed through the standard 8438752c231Sgmcgarry.Xr bus_dma 9 844770eef21Swizinterface. 845770eef21SwizTo support DMA transfers from the device to the host, it is necessary 846770eef21Swizto enable bus-mastering in the PCI configuration space for the device. 8478752c231Sgmcgarry.Pp 8488752c231SgmcgarryDuring system shutdown, it is necessary to abort any DMA transfers in 8498752c231Sgmcgarryprogress by registering a shutdown hook (see 8506cf928b2Sdyoung.Xr pmf 9 ) . 8518752c231Sgmcgarry.Sh CODE REFERENCES 8528752c231SgmcgarryThe PCI subsystem itself is implemented within the files 8538752c231Sgmcgarry.Pa sys/dev/pci/pci.c , 8548752c231Sgmcgarry.Pa sys/dev/pci/pci_subr.c , 8558752c231Sgmcgarry.Pa sys/dev/pci/pci_map.c , 8568752c231Sgmcgarry.Pa sys/dev/pci/pci_quirks.c , 8578752c231Sgmcgarryand 8588752c231Sgmcgarry.Pa sys/dev/pci/pciconf.c . 8598752c231SgmcgarryMachine-dependent portions are implemented within the file 86001869ca4Swiz.Pa sys/arch/<arch>/pci/pci_machdep.c . 8618752c231Sgmcgarry.Pp 8628752c231SgmcgarryThe database of known devices exists within the file 8638752c231Sgmcgarry.Pa sys/dev/pci/pcidevs_data.h 8648752c231Sgmcgarryand is generated automatically from the file 8658752c231Sgmcgarry.Pa sys/dev/pci/pcidevs . 866770eef21SwizNew vendor and product identifiers should be added to this file. 867770eef21SwizThe database can be regenerated using the Makefile 8688752c231Sgmcgarry.Pa sys/dev/pci/Makefile.pcidevs . 8698752c231Sgmcgarry.Sh SEE ALSO 8708752c231Sgmcgarry.Xr pci 4 , 8718752c231Sgmcgarry.Xr autoconf 9 , 8728752c231Sgmcgarry.Xr bus_dma 9 , 8738752c231Sgmcgarry.Xr bus_space 9 , 8748752c231Sgmcgarry.Xr driver 9 , 8758752c231Sgmcgarry.Xr pci_configure_bus 9 , 8768752c231Sgmcgarry.Xr pci_intr 9 , 877d7a314d2Sknakahara.Xr pci_msi 9 , 8786cf928b2Sdyoung.Xr pmf 9 8798752c231Sgmcgarry.Sh HISTORY 8808752c231SgmcgarryThe machine-independent PCI subsystem appeared in 8818752c231Sgmcgarry.Nx 1.2 . 882