xref: /netbsd-src/lib/libc/arch/alpha/sys/__sigtramp2.S (revision a7d9970d1b1865bd7c0cd315e1345df813b7d312)
1*a7d9970dSthorpej/*	$NetBSD: __sigtramp2.S,v 1.8 2021/11/20 19:26:20 thorpej Exp $	*/
2b3ec0a1dSskd
3b3ec0a1dSskd/*
4b3ec0a1dSskd * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University.
5b3ec0a1dSskd * All rights reserved.
6b3ec0a1dSskd *
7b3ec0a1dSskd * Author: Chris G. Demetriou
8b3ec0a1dSskd *
9b3ec0a1dSskd * Permission to use, copy, modify and distribute this software and
10b3ec0a1dSskd * its documentation is hereby granted, provided that both the copyright
11b3ec0a1dSskd * notice and this permission notice appear in all copies of the
12b3ec0a1dSskd * software, derivative works or modified versions, and any portions
13b3ec0a1dSskd * thereof, and that both notices appear in supporting documentation.
14b3ec0a1dSskd *
15b3ec0a1dSskd * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
16b3ec0a1dSskd * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
17b3ec0a1dSskd * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
18b3ec0a1dSskd *
19b3ec0a1dSskd * Carnegie Mellon requests users of this software to return to
20b3ec0a1dSskd *
21b3ec0a1dSskd *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
22b3ec0a1dSskd *  School of Computer Science
23b3ec0a1dSskd *  Carnegie Mellon University
24b3ec0a1dSskd *  Pittsburgh PA 15213-3890
25b3ec0a1dSskd *
26b3ec0a1dSskd * any improvements or extensions that they make and grant Carnegie the
27b3ec0a1dSskd * rights to redistribute these changes.
28b3ec0a1dSskd */
29b3ec0a1dSskd
30b3ec0a1dSskd#include "SYS.h"
3148c5aec8Sthorpej#include "assym.h"
32b3ec0a1dSskd
33b3ec0a1dSskd/*
34b3ec0a1dSskd * The Alpha signal trampoline is invoked only to return from
35b3ec0a1dSskd * the signal; the kernel calls the signal handler directly.
36b3ec0a1dSskd *
37b3ec0a1dSskd * On entry, the stack looks like:
38b3ec0a1dSskd *
39b3ec0a1dSskd *		ucontext structure	[128] == sp + sizeof(siginfo_t)]
40b3ec0a1dSskd *	sp->	siginfo structure	[0]
41*a7d9970dSthorpej *
42*a7d9970dSthorpej * The DWARF register numbers for the general purpose registers are the
43*a7d9970dSthorpej * same as the architected register numbers.  For Alpha, there is a DWARF
44*a7d9970dSthorpej * pseudo-register for signal handler return addresses.
45b3ec0a1dSskd */
46521b46f7Sthorpej
47*a7d9970dSthorpej#if defined(__LIBGCC_DWARF_ALT_FRAME_RETURN_COLUMN__)
48*a7d9970dSthorpej#define	DWARF_SIGRETURN_REG		__LIBGCC_DWARF_ALT_FRAME_RETURN_COLUMN__
49*a7d9970dSthorpej#else
50*a7d9970dSthorpej#define	DWARF_SIGRETURN_REG		64
51*a7d9970dSthorpej#endif
52*a7d9970dSthorpej
53*a7d9970dSthorpej#define	CFI_OFFSET_DWARF_REG(d, r)	.cfi_offset d, r*8
54*a7d9970dSthorpej#define	CFI_OFFSET(r)			CFI_OFFSET_DWARF_REG(r, r)
55521b46f7Sthorpej
56521b46f7Sthorpej	.cfi_startproc simple
57521b46f7Sthorpej	.cfi_signal_frame
58c570a444Sthorpej	.cfi_def_cfa _REG_SP, SIZEOF_SIGINFO + UC_GREGS
59521b46f7Sthorpej	CFI_OFFSET(_REG_V0)
60521b46f7Sthorpej	CFI_OFFSET(_REG_T0)
61521b46f7Sthorpej	CFI_OFFSET(_REG_T1)
62521b46f7Sthorpej	CFI_OFFSET(_REG_T2)
63521b46f7Sthorpej	CFI_OFFSET(_REG_T3)
64521b46f7Sthorpej	CFI_OFFSET(_REG_T4)
65521b46f7Sthorpej	CFI_OFFSET(_REG_T5)
66521b46f7Sthorpej	CFI_OFFSET(_REG_T6)
67521b46f7Sthorpej	CFI_OFFSET(_REG_T7)
68521b46f7Sthorpej	CFI_OFFSET(_REG_S0)
69521b46f7Sthorpej	CFI_OFFSET(_REG_S1)
70521b46f7Sthorpej	CFI_OFFSET(_REG_S2)
71521b46f7Sthorpej	CFI_OFFSET(_REG_S3)
72521b46f7Sthorpej	CFI_OFFSET(_REG_S4)
73521b46f7Sthorpej	CFI_OFFSET(_REG_S5)
74521b46f7Sthorpej	CFI_OFFSET(_REG_S6)
75521b46f7Sthorpej	CFI_OFFSET(_REG_A0)
76521b46f7Sthorpej	CFI_OFFSET(_REG_A1)
77521b46f7Sthorpej	CFI_OFFSET(_REG_A2)
78521b46f7Sthorpej	CFI_OFFSET(_REG_A3)
79521b46f7Sthorpej	CFI_OFFSET(_REG_A4)
80521b46f7Sthorpej	CFI_OFFSET(_REG_A5)
81521b46f7Sthorpej	CFI_OFFSET(_REG_T8)
82521b46f7Sthorpej	CFI_OFFSET(_REG_T9)
83521b46f7Sthorpej	CFI_OFFSET(_REG_T10)
84521b46f7Sthorpej	CFI_OFFSET(_REG_T11)
85*a7d9970dSthorpej	CFI_OFFSET(_REG_RA)
86521b46f7Sthorpej	CFI_OFFSET(_REG_T12)	/* a.k.a. _REG_PV */
87521b46f7Sthorpej	CFI_OFFSET(_REG_AT)
88521b46f7Sthorpej	CFI_OFFSET(_REG_GP)
89521b46f7Sthorpej	CFI_OFFSET(_REG_SP)
90*a7d9970dSthorpej	.cfi_return_column DWARF_SIGRETURN_REG
91*a7d9970dSthorpej	CFI_OFFSET_DWARF_REG(DWARF_SIGRETURN_REG, _REG_PC)
92521b46f7Sthorpej
93521b46f7Sthorpej/*
94521b46f7Sthorpej * The unwind entry includes one instruction slot prior to the trampoline
95521b46f7Sthorpej * because the unwinder will look up to (return PC - 1 insn) while unwinding.
96521b46f7Sthorpej * Normally this would be the jump / branch, but since there isn't one in
97a8ff863cSthorpej * this case, we place an explicit nop there instead.
98521b46f7Sthorpej */
99521b46f7Sthorpej	nop
100521b46f7Sthorpej
101b3ec0a1dSskdNESTED_NOPROFILE(__sigtramp_siginfo_2,0,0,ra,0,0)
10258bd20f6Sdrochner	ldgp	gp,0(ra)
10348c5aec8Sthorpej	lda	a0,(SIZEOF_SIGINFO)(sp)	/* get pointer to ucontext */
104b3ec0a1dSskd	CALLSYS_NOERROR(setcontext)	/* and call setcontext() with it */
10558bd20f6Sdrochner	ldiq	a0,-1			/* if that failed, set an exit code */
10658bd20f6Sdrochner	CALLSYS_NOERROR(exit)		/* and call exit() */
107521b46f7Sthorpej	.cfi_endproc
108b3ec0a1dSskdEND(__sigtramp_siginfo_2)
109