xref: /netbsd-src/external/gpl3/gdb/dist/sim/sh/sh-sim.h (revision 4d1eaf9104083d3c1d72a17f5c414777b18c6935)
1*4d1eaf91Schristos /* Moxie Simulator definition.
2*4d1eaf91Schristos    Copyright (C) 2009-2024 Free Software Foundation, Inc.
3*4d1eaf91Schristos 
4*4d1eaf91Schristos This file is part of the GNU simulators.
5*4d1eaf91Schristos 
6*4d1eaf91Schristos This program is free software; you can redistribute it and/or modify
7*4d1eaf91Schristos it under the terms of the GNU General Public License as published by
8*4d1eaf91Schristos the Free Software Foundation; either version 3 of the License, or
9*4d1eaf91Schristos (at your option) any later version.
10*4d1eaf91Schristos 
11*4d1eaf91Schristos This program is distributed in the hope that it will be useful,
12*4d1eaf91Schristos but WITHOUT ANY WARRANTY; without even the implied warranty of
13*4d1eaf91Schristos MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14*4d1eaf91Schristos GNU General Public License for more details.
15*4d1eaf91Schristos 
16*4d1eaf91Schristos You should have received a copy of the GNU General Public License
17*4d1eaf91Schristos along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
18*4d1eaf91Schristos 
19*4d1eaf91Schristos #ifndef SH_SIM_H
20*4d1eaf91Schristos #define SH_SIM_H
21*4d1eaf91Schristos 
22*4d1eaf91Schristos typedef struct
23*4d1eaf91Schristos {
24*4d1eaf91Schristos   int regs[20];
25*4d1eaf91Schristos } regstacktype;
26*4d1eaf91Schristos 
27*4d1eaf91Schristos typedef union
28*4d1eaf91Schristos {
29*4d1eaf91Schristos 
30*4d1eaf91Schristos   struct
31*4d1eaf91Schristos   {
32*4d1eaf91Schristos     int regs[16];
33*4d1eaf91Schristos     int pc;
34*4d1eaf91Schristos 
35*4d1eaf91Schristos     /* System registers.  For sh-dsp this also includes A0 / X0 / X1 / Y0 / Y1
36*4d1eaf91Schristos        which are located in fregs.  Probably should include pc too - to avoid
37*4d1eaf91Schristos        alignment repercussions.  */
38*4d1eaf91Schristos     union {
39*4d1eaf91Schristos       struct {
40*4d1eaf91Schristos 	int mach;
41*4d1eaf91Schristos 	int macl;
42*4d1eaf91Schristos 	int pr;
43*4d1eaf91Schristos 	int dummy3, dummy4;
44*4d1eaf91Schristos 	int fpul; /* A1 for sh-dsp -  but only for movs etc.  */
45*4d1eaf91Schristos 	int fpscr; /* dsr for sh-dsp */
46*4d1eaf91Schristos 
47*4d1eaf91Schristos 	/* sh3e / sh-dsp */
48*4d1eaf91Schristos 	union fregs_u {
49*4d1eaf91Schristos 	  float f[16];
50*4d1eaf91Schristos 	  double d[8];
51*4d1eaf91Schristos 	  int i[16];
52*4d1eaf91Schristos 	} fregs[2];
53*4d1eaf91Schristos       };
54*4d1eaf91Schristos       int sregs[39];
55*4d1eaf91Schristos     };
56*4d1eaf91Schristos 
57*4d1eaf91Schristos     /* Control registers; on the SH4, ldc / stc is privileged, except when
58*4d1eaf91Schristos        accessing gbr.  */
59*4d1eaf91Schristos     union
60*4d1eaf91Schristos       {
61*4d1eaf91Schristos 	struct
62*4d1eaf91Schristos 	  {
63*4d1eaf91Schristos 	    int sr;
64*4d1eaf91Schristos 	    int gbr;
65*4d1eaf91Schristos 	    int vbr;
66*4d1eaf91Schristos 	    int ssr;
67*4d1eaf91Schristos 	    int spc;
68*4d1eaf91Schristos 	    int mod;
69*4d1eaf91Schristos 	    /* sh-dsp */
70*4d1eaf91Schristos 	    int rs;
71*4d1eaf91Schristos 	    int re;
72*4d1eaf91Schristos 	    /* sh3 */
73*4d1eaf91Schristos 	    int bank[8];
74*4d1eaf91Schristos 	    int dbr;		/* debug base register */
75*4d1eaf91Schristos 	    int sgr;		/* saved gr15 */
76*4d1eaf91Schristos 	    int ldst;		/* load/store flag (boolean) */
77*4d1eaf91Schristos 	    int tbr;
78*4d1eaf91Schristos 	    int ibcr;		/* sh2a bank control register */
79*4d1eaf91Schristos 	    int ibnr;		/* sh2a bank number register */
80*4d1eaf91Schristos 	  };
81*4d1eaf91Schristos 	int cregs[16];
82*4d1eaf91Schristos       };
83*4d1eaf91Schristos 
84*4d1eaf91Schristos     unsigned char *insn_end;
85*4d1eaf91Schristos 
86*4d1eaf91Schristos     int ticks;
87*4d1eaf91Schristos     int stalls;
88*4d1eaf91Schristos     int memstalls;
89*4d1eaf91Schristos     int cycles;
90*4d1eaf91Schristos     int insts;
91*4d1eaf91Schristos 
92*4d1eaf91Schristos     int prevlock;
93*4d1eaf91Schristos     int thislock;
94*4d1eaf91Schristos     int exception;
95*4d1eaf91Schristos 
96*4d1eaf91Schristos     int end_of_registers;
97*4d1eaf91Schristos 
98*4d1eaf91Schristos     int msize;
99*4d1eaf91Schristos #define PROFILE_FREQ 1
100*4d1eaf91Schristos #define PROFILE_SHIFT 2
101*4d1eaf91Schristos     int profile;
102*4d1eaf91Schristos     unsigned short *profile_hist;
103*4d1eaf91Schristos     unsigned char *memory;
104*4d1eaf91Schristos     int xyram_select, xram_start, yram_start;
105*4d1eaf91Schristos     unsigned char *xmem;
106*4d1eaf91Schristos     unsigned char *ymem;
107*4d1eaf91Schristos     unsigned char *xmem_offset;
108*4d1eaf91Schristos     unsigned char *ymem_offset;
109*4d1eaf91Schristos     unsigned long bfd_mach;
110*4d1eaf91Schristos     regstacktype *regstack;
111*4d1eaf91Schristos   } asregs;
112*4d1eaf91Schristos   int asints[40];
113*4d1eaf91Schristos } saved_state_type;
114*4d1eaf91Schristos 
115*4d1eaf91Schristos /* TODO: Move into sim_cpu.  */
116*4d1eaf91Schristos extern saved_state_type saved_state;
117*4d1eaf91Schristos 
118*4d1eaf91Schristos #endif
119