xref: /netbsd-src/external/gpl3/gdb/dist/sim/lm32/lm32.c (revision 88241920d21b339bf319c0e979ffda80c49a2936)
14e98e3e1Schristos /* Lattice Mico32 simulator support code.
24e98e3e1Schristos    Contributed by Jon Beniston <jon@beniston.com>
34e98e3e1Schristos 
4*88241920Schristos    Copyright (C) 2009-2024 Free Software Foundation, Inc.
54e98e3e1Schristos 
64e98e3e1Schristos    This file is part of GDB.
74e98e3e1Schristos 
84e98e3e1Schristos    This program is free software; you can redistribute it and/or modify
94e98e3e1Schristos    it under the terms of the GNU General Public License as published by
104e98e3e1Schristos    the Free Software Foundation; either version 3 of the License, or
114e98e3e1Schristos    (at your option) any later version.
124e98e3e1Schristos 
134e98e3e1Schristos    This program is distributed in the hope that it will be useful,
144e98e3e1Schristos    but WITHOUT ANY WARRANTY; without even the implied warranty of
154e98e3e1Schristos    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
164e98e3e1Schristos    GNU General Public License for more details.
174e98e3e1Schristos 
184e98e3e1Schristos    You should have received a copy of the GNU General Public License
194e98e3e1Schristos    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
204e98e3e1Schristos 
214b169a6bSchristos /* This must come before any other includes.  */
224b169a6bSchristos #include "defs.h"
234b169a6bSchristos 
244e98e3e1Schristos #define WANT_CPU lm32bf
254e98e3e1Schristos #define WANT_CPU_LM32BF
264e98e3e1Schristos 
274e98e3e1Schristos #include "sim-main.h"
284e98e3e1Schristos #include "cgen-mem.h"
294e98e3e1Schristos #include "cgen-ops.h"
304e98e3e1Schristos 
314e98e3e1Schristos /* The contents of BUF are in target byte order.  */
324e98e3e1Schristos 
334e98e3e1Schristos int
344b169a6bSchristos lm32bf_fetch_register (SIM_CPU * current_cpu, int rn, void *buf, int len)
354e98e3e1Schristos {
364e98e3e1Schristos   if (rn < 32)
374e98e3e1Schristos     SETTSI (buf, lm32bf_h_gr_get (current_cpu, rn));
384e98e3e1Schristos   else
394e98e3e1Schristos     switch (rn)
404e98e3e1Schristos       {
414e98e3e1Schristos       case SIM_LM32_PC_REGNUM:
424e98e3e1Schristos 	SETTSI (buf, lm32bf_h_pc_get (current_cpu));
434e98e3e1Schristos 	break;
444e98e3e1Schristos       default:
454e98e3e1Schristos 	return 0;
464e98e3e1Schristos       }
474e98e3e1Schristos 
484e98e3e1Schristos   return -1;
494e98e3e1Schristos }
504e98e3e1Schristos 
514e98e3e1Schristos /* The contents of BUF are in target byte order.  */
524e98e3e1Schristos 
534e98e3e1Schristos int
544b169a6bSchristos lm32bf_store_register (SIM_CPU * current_cpu, int rn, const void *buf, int len)
554e98e3e1Schristos {
564e98e3e1Schristos   if (rn < 32)
574e98e3e1Schristos     lm32bf_h_gr_set (current_cpu, rn, GETTSI (buf));
584e98e3e1Schristos   else
594e98e3e1Schristos     switch (rn)
604e98e3e1Schristos       {
614e98e3e1Schristos       case SIM_LM32_PC_REGNUM:
624e98e3e1Schristos 	lm32bf_h_pc_set (current_cpu, GETTSI (buf));
634e98e3e1Schristos 	break;
644e98e3e1Schristos       default:
654e98e3e1Schristos 	return 0;
664e98e3e1Schristos       }
674e98e3e1Schristos 
684e98e3e1Schristos   return -1;
694e98e3e1Schristos }
704e98e3e1Schristos 
714e98e3e1Schristos 
724e98e3e1Schristos 
734e98e3e1Schristos #if WITH_PROFILE_MODEL_P
744e98e3e1Schristos 
754e98e3e1Schristos /* Initialize cycle counting for an insn.
764e98e3e1Schristos    FIRST_P is non-zero if this is the first insn in a set of parallel
774e98e3e1Schristos    insns.  */
784e98e3e1Schristos 
794e98e3e1Schristos void
804e98e3e1Schristos lm32bf_model_insn_before (SIM_CPU * cpu, int first_p)
814e98e3e1Schristos {
824e98e3e1Schristos }
834e98e3e1Schristos 
844e98e3e1Schristos /* Record the cycles computed for an insn.
854e98e3e1Schristos    LAST_P is non-zero if this is the last insn in a set of parallel insns,
864e98e3e1Schristos    and we update the total cycle count.
874e98e3e1Schristos    CYCLES is the cycle count of the insn.  */
884e98e3e1Schristos 
894e98e3e1Schristos void
904e98e3e1Schristos lm32bf_model_insn_after (SIM_CPU * cpu, int last_p, int cycles)
914e98e3e1Schristos {
924e98e3e1Schristos }
934e98e3e1Schristos 
944e98e3e1Schristos int
954e98e3e1Schristos lm32bf_model_lm32_u_exec (SIM_CPU * cpu, const IDESC * idesc,
964e98e3e1Schristos 			  int unit_num, int referenced)
974e98e3e1Schristos {
984e98e3e1Schristos   return idesc->timing->units[unit_num].done;
994e98e3e1Schristos }
1004e98e3e1Schristos 
1014e98e3e1Schristos #endif /* WITH_PROFILE_MODEL_P */
102